ONSEMI NLU1G08AMX1TCG

NLU1G08
Single 2-Input AND Gate
The NLU1G08 MiniGatet is an advanced high-speed CMOS
2-input AND gate in ultra-small footprint.
The NLU1G08 input and output structures provide protection when
voltages up to 7.0 V are applied, regardless of the supply voltage.
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Features
•High Speed: tPD = 3.5 ns (Typ) @ VCC = 5.0 V
•Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
•Power Down Protection Provided on inputs
•Balanced Propagation Delays
•Overvoltage Tolerant (OVT) Input and Output Pins
•Ultra-Small Packages
•These are Pb-Free Devices
MARKING
DIAGRAMS
1
1
IN B
1
IN A
6
5
2
GND
3
4
UDFN6
MU SUFFIX
CASE 517AA
2M
ULLGA6
1.0 x 1.0
CASE 613AD
2M
ULLGA6
1.2 x 1.0
CASE 613AE
2M
ULLGA6
1.45 x 1.0
CASE 613AF
2M
VCC
1
NC
OUT Y
1
2
M
Figure 1. Pinout (Top View)
= Device Marking
= Date Code
PIN ASSIGNMENT
IN A
&
IN B
1
OUT Y
Figure 2. Logic Symbol
IN B
2
IN A
3
GND
4
OUT Y
5
NC
6
VCC
FUNCTION TABLE
Input
Output
A
B
Y
L
L
H
H
L
H
L
H
L
L
L
H
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2008
March, 2008 - Rev. 2
1
Publication Order Number:
NLU1G08/D
NLU1G08
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
DC Supply Voltage
-0.5 to +7.0
V
VIN
DC Input Voltage
-0.5 to +7.0
V
DC Output Voltage
-0.5 to +7.0
V
VIN < GND
-20
mA
VOUT < GND
±20
mA
VOUT
Parameter
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Source/Sink Current
±12.5
mA
ICC
DC Supply Current Per Supply Pin
±25
mA
IGND
DC Ground Current per Ground Pin
±25
mA
TSTG
Storage Temperature Range
-65 to +150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction Temperature Under Bias
150
°C
MSL
Moisture Sensitivity
FR
Flammability Rating
ILATCHUP
Level 1
Oxygen Index: 28 to 34
UL 94 V-0 @ 0.125 in
±500
Latchup Performance Above VCC and Below GND at 125°C (Note 2)
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA / JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Positive DC Supply Voltage
VIN
Digital Input Voltage
VOUT
Output Voltage
TA
Operating Free-Air Temperature
Dt/DV
Input Transition Rise or Fall Rate
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
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2
Min
Max
Unit
1.65
5.5
V
0
5.5
V
0
5.5
V
-55
+125
°C
0
0
100
20
ns/V
NLU1G08
DC ELECTRICAL CHARACTERISTICS
Symbol
VIH
VIL
VOH
VOL
Parameter
VCC
(V)
Conditions
Low-Level
Input Voltage
Low-Level
Input Voltage
High-Level
Output Voltage
Low-Level
Output Voltage
TA = 25 5C
Min
Typ
TA = +855C
Max
Min
1.65
0.75 x
VCC
0.75 x
VCC
2.3 to
5.5
0.70 x
VCC
0.70 x
VCC
Max
TA = -555C to
+1255C
Min
Max
V
1.65
0.25 x
VCC
0.25 x
VCC
0.25 x
VCC
2.3 to
5.5
0.30 x
VCC
0.30 x
VCC
0.30 x
VCC
VIN = VIH or VIL
IOH = -50 mA
2.0
3.0
4.5
1.9
2.9
4.4
VIN = VIH or VIL
IOH = -4 mA
IOH = -8 mA
3.0
4.5
2.58
3.94
VIN = VIH or VIL
IOL = 50 mA
2.0
3.0
4.5
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
2.0
3.0
4.5
Unit
1.9
2.9
4.4
1.9
2.9
4.4
2.48
3.80
2.34
3.66
V
V
V
0
0
0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
IIN
Input Leakage
Current
0 v VIN v 5.5 V
0 to
5.5
±0.1
±1.0
±1.0
mA
ICC
Quiescent
Supply Current
0 v VIN v VCC
5.5
1.0
10
40
mA
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 nS)
Symbol
Parameter
tPLH,
tPHL
Propagation Delay,
Input A or B to
Output Y
CIN
Input Capacitance
CPD
Power Dissipation
Capacitance
(Note 3)
VCC
(V)
Test
Condition
3.0 to
3.6
4.5 to
5.5
TA = 25 5C
Min
TA = +855C
Typ
Max
CL = 15 pF
4.1
8.8
CL = 50 pF
5.9
CL = 15 pF
CL = 50 pF
5.0
Max
Unit
10.5
12.5
ns
12.3
14
16.5
3.5
5.9
7.0
9.0
4.2
7.9
9.0
11
5.5
10
10
10
11
Min
Max
TA = -555C to
+1255C
Min
pF
pF
3. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without
load. Average operating current can be obtained by the equation ICC(OPR) = CPD • VCC • fin + ICC. CPD is used to determine the no-load
dynamic power consumption: PD = CPD • VCC2 • fin + ICC • VCC.
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3
NLU1G08
VCC
OUTPUT
INPUT
Input A or B
50% VCC
50%
CL*
GND
tPLH
tPHL
VOH
Output Y
*Includes all probe and jig capacitance.
A 1-MHz square input wave is recommended
for propagation delay tests.
50% VCC
VOL
Figure 3. Switching Waveforms
Figure 4. Test Circuit
ORDERING INFORMATION
Package
Shipping†
UDFN6
(Pb-Free)
3000 / Tape & Reel
NLU1G08AMX1TCG
ULLGA6, 1.45 x 1.0
(Pb-Free)
3000 / Tape & Reel
NLU1G08BMX1TCG
ULLGA6, 1.2 x 1.0
(Pb-Free)
3000 / Tape & Reel
NLU1G08CMX1TCG
ULLGA6, 1.0 x 1.0
(Pb-Free)
3000 / Tape & Reel
Device
NLU1G08MUTCG
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NLU1G08
PACKAGE DIMENSIONS
UDFN6, 1.2x1.0, 0.4P
CASE 517AA-01
ISSUE C
EDGE OF PACKAGE
PIN ONE
REFERENCE
2X
0.10 C
L1
ÉÉ
ÉÉ
E
DETAIL A
Bottom View
(Optional)
TOP VIEW
2X
EXPOSED Cu
0.10 C
(A3)
0.10 C
A1
A
10X
0.08 C
ÉÉÉ
ÉÉÉ
ÉÉÉ
A3
DETAIL B
Side View
(Optional)
5X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
0.30
0.40
0.00
0.15
0.40
0.50
MOUNTING FOOTPRINT*
6X
C
A1
DIM
A
A1
A3
b
D
E
e
L
L1
L2
MOLD CMPD
SEATING
PLANE
SIDE VIEW
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
D
6X
0.42
0.22
L
3
L2
6X
b
0.10 C A B
0.05 C
6
4
0.40
PITCH
e
NOTE 3
1.07
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
NLU1G08
PACKAGE DIMENSIONS
ULLGA6 1.0x1.0, 0.35P
CASE 613AD-01
ISSUE A
PIN ONE
REFERENCE
0.10 C
ÉÉ
ÉÉ
ÉÉ
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
A
B
D
E
DIM
A
A1
b
D
E
e
L
L1
TOP VIEW
0.05 C
A
6X
0.05 C
SEATING
PLANE
SIDE VIEW
MOUNTING FOOTPRINT
SOLDERMASK DEFINED*
C
A1
MILLIMETERS
MIN
MAX
--0.40
0.00
0.05
0.12
0.22
1.00 BSC
1.00 BSC
0.35 BSC
0.25
0.35
0.30
0.40
5X
0.48
6X
0.22
e
5X
L
NOTE 4
3
1
1.18
L1
0.53
6
4
6X
b
0.10 C A B
BOTTOM VIEW
1
PKG
OUTLINE
0.05 C
0.35
PITCH
DIMENSIONS: MILLIMETERS
NOTE 3
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
NLU1G08
PACKAGE DIMENSIONS
ULLGA6 1.2x1.0, 0.4P
CASE 613AE-01
ISSUE A
PIN ONE
REFERENCE
0.10 C
ÉÉ
ÉÉ
ÉÉ
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
A
B
D
E
DIM
A
A1
b
D
E
e
L
L1
TOP VIEW
0.05 C
A
6X
0.05 C
SEATING
PLANE
SIDE VIEW
MOUNTING FOOTPRINT
SOLDERMASK DEFINED*
C
A1
MILLIMETERS
MIN
MAX
--0.40
0.00
0.05
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
0.25
0.35
0.35
0.45
5X
0.49
e
5X
L
6X
0.26
NOTE 4
3
1
1.24
L1
0.53
6
4
6X
b
0.10 C A B
BOTTOM VIEW
0.05 C
1
PKG
OUTLINE
0.40
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
NOTE 3
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7
NLU1G08
PACKAGE DIMENSIONS
ULLGA6 1.45x1.0, 0.5P
CASE 613AF-01
ISSUE A
PIN ONE
REFERENCE
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
A
B
D
ÉÉÉ
ÉÉÉ
ÉÉÉ
E
DIM
A
A1
b
D
E
e
L
L1
TOP VIEW
0.10 C
0.05 C
MILLIMETERS
MIN
MAX
--0.40
0.00
0.05
0.15
0.25
1.45 BSC
1.00 BSC
0.50 BSC
0.25
0.35
0.30
0.40
A
6X
0.05 C
MOUNTING FOOTPRINT
SOLDERMASK DEFINED*
SEATING
PLANE
SIDE VIEW
C
A1
e
5X
L
5X
0.49
NOTE 4
3
1
1.24
L1
0.53
6
6X
0.30
4
BOTTOM VIEW
6X
b
0.10 C A B
0.05 C
1
PKG
OUTLINE
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
NOTE 3
MiniGate is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
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associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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PUBLICATION ORDERING INFORMATION
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8
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For additional information, please contact your local
Sales Representative
NLU1G08/D