NCS5651 D

NCS5651
Product Preview
2 Amp PLC Line Driver
Description
The NCS5651 is a high efficiency, Class A/B, low distortion power
line driver. It is optimized to accept a signal from a Power Line Carrier
modem. The device consists of two Operational Amplifiers (opamps).
The output opamp is designed to drive up to 2 A peak into an
isolation transformer or simple coil coupling to the mains. At an
output current of 1.5 A, the output voltage is guaranteed to swing
within 1 V or less of either rail giving the user improved SNR.
In addition to the output amplifier, a small−signal opamp is provided
which can be configured as a unity gain follower buffer or can provide
the first stage of a 4−pole low pass filter.
The NCS5651 offers a current limit, programmable with a single
resistor, RLIM, together with a current limit flag. The device provides
two independent thermal flags with hysteresis: a thermal warning flag
to let the user know the internal junction temperature has reached a
user programmable thermal warning threshold and a thermal error flag
that indicates the internal junction temperature has exceeded 150°C.
The NCS5651 has a power supply voltage range of 6−12 V. It can be
shut down, leaving the outputs highly−impedant. The NCS5651
comes in a 20−lead QFN package (4 × 4 × 1 mm3) with an exposed
thermal pad for enhanced thermal reliability.
•
•
•
•
•
MARKING
DIAGRAM
20
1
1
20
QFN20
CASE 485E
Rail−to−Rail: Drop of Only ±1 V with IOUT = 1.5 A
VBB Supply Voltage: 6−12 V
Flexible 4th−Order Filtering
Current−Limit Set with One Resistor
Diagnostic Flags Level Shifted to VCC to Simplify Interface with
External MCU
♦ Thermal Warning Flag with Flexible Threshold Setting
♦ Thermal Error flag and Shutdown
♦ Overcurrent Flag
Enable/Shutdown Control
Extended Junction Temperature Range: −40°C to +125°C
Small Package: 20−pin 4 × 4 × 1 mm3 NQFP with Exposed Thermal
Pad
Optimized for Operation in the CENELEC A to D Frequency Band
This is a Pb−Free Device
NCS
5651
ALYWG
G
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
NCS5651MNTXG
Features
•
•
•
•
•
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Package
Shipping†
QFN20 3000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part or orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Typical Applications
• Power Line Communication Driver in AMM and AMR Metering
Systems
• Valve, Actuator, and Motor Driver
• Audio
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2015
January, 2015 − Rev. P2
1
Publication Order Number:
NCS5651/D
NCS5651
GND
VCC
TW
TSD
ILIM
20
19
18
17
16
Exposed
Pad
EN
1
15
RLIMIT
VCOM
2
14
VWARN
A+
3
13
B+
A−
4
12
B−
5
11
VEE
AOUT
NCS5651
6
7
8
9
10
VBB
VBB
BOUT
BOUT
VEE
Figure 1. Pin Out NCS5651 in 20−pin NQFP (top view)
Table 1. NCS5651 PINOUT
Signal Name
Type
Pin #
Pin Description
ENB
Input
1
Enable input (active low)
VCOM
Power
2
Virtual Common Voltage = (VCC − VEE)/2 (Note 1)
A+
Input
3
Non inverting input of opamp A
A−
Input
4
Inverting input of opamp A
AOUT
Output
5
Output of opamp A
VBB
Power
6, 7
Positive Power Supply Amplifiers
BOUT
Output
8, 9
Output of opamp B
VEE
Power
10, 11
B−
Input
12
Inverting input of opamp B
B+
Input
13
Non inverting input of opamp B
VWARN
Input
14
Thermal Warning Temp Set
RLIMIT
Input
15
Output B Current Limit Set Resistor
ILIM
Output
16
Current Limit Flag
TSD
Output
17
Thermal Shutdown Flag
TW
Output
18
Thermal Warning Flag
VCC
Power
19
Logic supply
GND
Power
20
Logic ground
EXP
Power
−
Exposed pad. To be connected to VEE potential
Negative Power Supply Amplifiers
1. The principal purpose of pin 2 is to facilitate the implementation of the 4th−order low pass filter when operating on single−sided supply by
providing a virtual common at mid−supply. When operating on dual balanced supplies, Pin 2 must be left floating and the external common
of the dual supplies should be used for the filter implementation
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2
NCS5651
VBB
6
NCS5651
7
V+
V+
4
A−
5
AOUT
3
A+
19
V−
EN
VCC
1
17
EN
TSD
TSD
18
VWARN
TW
TWARN
14
VWARN
16
ILIM
ILIM
20
EN
V+
12
9
B−
B+
GND
13
8
V−
BOUT
1.215 V
V+
2
VCOM
BIAS
V−
V−
15
10
RLIMIT
11
VEE
Figure 2. NCS5651 Block Diagram
Table 2. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
Max
Unit
TJ
Junction temperature
−40
+160
°C
TSTG
Storage temperature
−65
+165
°C
Supply voltage (VBB to VEE)
−0.3
13.2
V
VEE − 0.3
VBB + 0.3
V
5.5
V
VCC + 0.3
V
VS
VICR
Common Mode Voltage Range input
VCCM
Logic Supply Voltage
VI
Logic Input Voltage
GND − 0.3
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 3. THERMAL CHARACTERISTICS RqJA obtained with 2S2P test boards according to JEDEC JESD51 standard.
Symbol
RqJA
Rating
Thermal Resistance, Junction−to−Air (Note 3)
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3
Typical Value
Unit
38
°C/W
NCS5651
Table 4. RECOMMENDED OPERATING CONDITIONS (Note 2)
Symbol
Parameter
TA
Ambient Temperature
VS
Supply voltage (VBB to VEE)
VCC
Logic Supply voltage)
Min
Max
Unit
−40
+125
°C
6
12
V
3.0
5.0
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
2. Refer to the electrical characteristics and the application information for Safe Operating Area.
Table 5. ELECTRICAL CHARACTERISTICS VBB = 12 V; −40°C ≤ TJ ≤ +125°C
Symbol
Parameter
Condition
Min
Typ
Max
Unit
Input offset voltage
±3
± 10
mV
Power supply rejection ratio
25
150
mV/V
OPERATIONAL AMPLIFIER A
VOS,A
PSRRA
IB,A
Input bias current (Note 3)
en,A
Input voltage noise density
VCM,A
CMRRA
Common Mode Rejection Ration
Differential Input Impedance
ZICM,A
Common Mode Input Impedance
AOL,A
Open Loop Gain (Note 3)
GBWA
Gain Bandwidth Product
FPBWA
Full Power Bandwidth (Note 3)
THD+NA
250
VEE − 0.1
VEE − 0.1 ≤ VCM ≤ VCC − 3
RL = 500 W
70
80
Total Harmonic Distortion + Noise
Output swing from Positive Rail
VOL,A
Output swing from Negative Rail
ISC,A
Short−Circuit Current
ZO,A
Output Impedance
nA
nV/√Hz
VBB − 3
V
85
dB
0.2 | 1.5
GW | pF
0.2 | 3
GW | pF
100
dB
80
MHz
1.5
MHz
60
V/ms
CLG = +1; RL = 500 W; VO =
8 VPP; f = 1 kHz; Cin = 220 mF;
Cout = 330 mF
0.015
%
CLG = +1; RL = 50 W; VO =
8 VPP; f = 1 kHz; Cin = 220 mF;
Cout = 330 mF
0.023
%
CLG = +5; VOUT = 11 VPP
Slew Rate
VOH,A
CLOAD,A
f = 1 kHz; VIN = GND;
BW = 131 kHz
Common Mode voltage range
ZIDM,A
SRA
1
RL = 500 W to mid−supply
CLG = 4; f = 100 kHz
Capacitive Load Drive
0.3
1
V
0.3
1
V
280
mA
0.25
W
100
pF
OPERATIONAL AMPLIFIER B
Input offset voltage
±3
± 10
mV
PSRRB
Offset versus power supply
25
150
mV/V
IB,B
Input bias current (Note 3)
en,B
Input voltage noise density
VOS,B
VCM,B
CMRRB
1
f = 1 kHz; VIN = GND;
BW = 131 kHz
Common Mode voltage range
Common Mode Rejection Ratio
125
VEE − 0.1
VEE − 0.1 ≤ VCM ≤VBB − 3
70
nA
nV/√Hz
VBB − 3
V
85
dB
ZiDIF,B
Differential Input Impedance
0.2 | 11
GW | pF
ZiCM,B
Common Mode Input Impedance
0.2 | 22
GW | pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Guaranteed by characterization or design
4. CLG = Closed Loop Gain
5. The VCOM voltage is generated by an internal resistive divider. The pin should not be loaded.
6. Characterization data only. Not tested in production.
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4
NCS5651
Table 5. ELECTRICAL CHARACTERISTICS VBB = 12 V; −40°C ≤ TJ ≤ +125°C
Symbol
Parameter
Condition
Min
Typ
Max
Unit
RL = 5 W
80
100
dB
60
MHz
OPERATIONAL AMPLIFIER B
AOL,B
Open Loop Gain (Note 3)
GBWB
Gain Bandwidth Product
FPBWB
Full Power Bandwidth (Note 3)
SRB
THD+NB
VOH,B
VOL,B
CLG = +5; VOUT = 11 VPP
200
400
kHz
70
V/ms
0.015
%
CLG = +1; RL = 50 W;
VO = 8 VPP; f = 100 kHz
0.023
%
Slew Rate
Total Harmonic Distortion + Noise
Output swing from Positive Rail
Output swing from Negative Rail
CLG = +1; RL = 50 W;
VO = 8 VPP; f = 1 kHz
IOUT = −1.5 A @ TJ = 25°C
0.7
1
IOUT = −1.0 A @ TJ = 125°C
0.7
1
IOUT = +1.5 A @ TJ = 25°C
0.4
1
IOUT = +1.0 A @ TJ = 125°C
0.4
1
V
ISC,B
Short−Circuit Current
ZO,B
Output Impedance
CLG = 1; f = 100 kHz; ENB = 0
0.065
W
ZO,B
Output Impedance
ENB = 1
12
MW
500
nF
CLOAD,B
280
V
Capacitive Load Drive
mA
BOTH AMPLIFIERS COMBINED
TJ,SD
Junction temperature shutdown threshold
(Note 6)
+160
°C
TJ,SD,R
Junction temperature shutdown recovery
threshold
(Note 6)
+135
°C
TW is determined by the
ratio of 2 resistors
± 10
°C
ILIM is determined by
a single resistor
± 50
mA
+150
TW
Thermal warning tolerance (Note 4)
ILIM
Current Limit Tolerance
IQE
Quiescent Current, enabled
ENB = 0
20
40
mA
IQD
Quiescent Current, disabled
ENB = 1
120
150
mA
Common mode reference output voltage
(Note 5)
6.0
6.2
V
VCOM
Common mode reference output
impedance
5.8
(Notes 5 and 6)
110
kW
LOGIC
VIH
ENB input level high
VIL
ENB input level low
IIH
ENB input current
GND + 2
V
0.8
V
VENB = 3.3 V
10
mA
VENB = 0 V
0.1
mA
IIL
VOH
Flag Output High level
VOL
Flag Output Low level
GND + 2
tsd
Output Shutdown time
ENB 0 → 1
60
ten
Output Enable time
ENB 1 → 0
5
GND + 0.8
V
V
ns
10
ms
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Guaranteed by characterization or design
4. CLG = Closed Loop Gain
5. The VCOM voltage is generated by an internal resistive divider. The pin should not be loaded.
6. Characterization data only. Not tested in production.
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5
NCS5651
−30
−35
−35
THIRD HARMONIC (dBc)
−30
−40
−45
−50
RL = 1.4 W
−55
RL = 8.3 W
−60
RL = 50.0 W
−65
−40
−45
RL = 1.4 W
−50
RL = 8.3 W
−55
−60
−65
RL = 50.0 W
−70
−70
−75
−75
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
4.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
OUTPUT VOLTAGE (VRMS)
OUTPUT VOLTAGE (VRMS)
Figure 3. Second Harmonic Distortion of the
Output opamp vs. Output Amplitude, for f =
100 kHz and RL (top to bottom) = 1.4 W, 8.3 W,
50 W.
Figure 4. Third Harmonic Distortion of the
Output opamp vs. Output Amplitude, for f =
100 kHz and RL (top to bottom) = 1.4 W, 8.3 W,
50 W.
12 V
3 kW
100 nF
22 μ F
3 pF
3 kW
VEE
A+
AOUT
50 μ F
B−
A−
BOUT
B+
RL
½ NCS5651
½ NCS5651
6V
Figure 5. Test Circuit for Figures 3 and 4
8
Output low,
VUC = 5 V
7
Current sunk/sourced from pin [mA]
SECOND HARMONIC (dBc)
TYPICAL PERFORMANCE CHARACTERISTICS
6
5
Output low,
VUC = 3.3 V
4
3
2
1
Output high,
VUC = 3.3 V
Output high,
VUC = 5 V
0
0
1
2
3
Voltage at pin [V]
4
5
Figure 6. Digital Output Pin (ILIM, TSD, TW) Current Sourcing and Sinking Capability
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6
4.0
NCS5651
TYPICAL APPLICATION
the amplifier from high−energy transients from the mains.
For more information on power line communication, refer
to [3]. For more information on circuit design with the
NCS5651, refer to the NCN49597/9 user manual [1].
A typical power line communication (PLC) application for
the NCS5651 is shown in Figure 7. The input amplifier is
used in an MFB topology with the power amplifier
configured as an inverting amplifier (C4 is required for
stability). The circuit formed by D1−D5, L1 and R6 protects
12V
R4
R5
FB
3.3V
C8
C4
12V
C10
C9
12V
C12
R3
R1
12V
D6
C3
U1
VIN C1
C13
OUTA
VCC
5
R2
−A
C2
7
R7
6
D1
NCS5651
+A 3
12V
VBB
−B
12
19
4
1
15
20
9
2
10 16
11
13
17
OUTB
18
3.3V
A
VWARN
EN
RLIM GND VCOM
D3
C5
8
BIAS
14
L1
+B
D2
R6
D4
L2
C7
D7
R8
D5
Tr
C6
ILIM TSD TW
VEE
R9
MAINS
R11
R10
A
R12
R13 R14
U2
C11
ERROR
ENABLE
D9
D10
D8
Figure 7. Typical Application Schematic for PLC modem
Table 6. BILL OF MATERIALS
Reference
Designator
Value
(typical)
Note
Manufacturer
Part Number
U1
Power operational amplifier
ON Semiconductor
NCS5651
U2
AND gate
ON Semiconductor
MC74VHC1G32
D1, D2
Schottky diode
ON Semiconductor
MBRA140
D3, D4
Schottky diode
ON Semiconductor
MBRA340
D5
Zener Transient Voltage suppressor
ON Semiconductor
1SMA11ATG3
D6
Zener Transient Voltage suppressor
ON Semiconductor
1SMA12ATG3
D7
Zener Transient Voltage suppressor
ON Semiconductor
P6SMB11CAT3G
D8, D9, D10
Low power indication LED
Rx
TBD
Cx
TBD
L1
3,3 mH
Saturation current ≥ 2 A
L2
10−27
mH
Depending on transformer and communication carrier
frequency
FB
600 W @
10 MHz
Ferrite bead, ≥ 1.5 A current rating
Tr
Coupling transformer
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7
NCS5651
APPLICATION INFORMATION
Exposed Thermal Pad
10 nF is recommended for each sensitive point. For either
single−supply operation or split supply operation, bypass
should be placed directly across VBB to VEE. In addition add
bypass from VCC to GND (Figure 9).
The NCS5651 is capable of delivering 1.5 A into a
complex load. Output signal swing should be kept as high as
possible. This will minimize internal heat generation,
reducing the internal junction temperature. The NCS5651
can swing to within 1 V of either rail without adding
distortion.
An exposed thermal pad is provided on the bottom of the
device to facilitate heat dissipation. The printed circuit
board and soldering process must be carefully designed to
minimize the thermal resistance between the exposed pad
and the ambient. Refer to [1,2] for more information.
12V
FB
3.3V
600Z
10 mF
100 nF
VCC
100 nF
VBB
−B
19
NCS5651
12
6
7
8
Multi−Feedback Filter (MFB)
OUTB
CENELEC EN 50065−1 is a European standard for
signaling on low−voltage electrical installations in the
frequency range 3 kHz to 148. 5 kHz. More specifically
Part 1 of that specification deals with frequency bands and
electromagnetic disturbances introduced into the electrical
mains. A practical solution to meet this requirement is to
place a 4th−order filter between the output of the modem and
the isolation transformer connected to the mains. In this
datasheet a MFB filter topology is proposed to help meet the
requirements of the CENELEC standard. Four pole filters
require two op amps for implementation. The NCS5651 has
an input pre−amplifier and an output power amplifier.
Therefore only passive components (R’s and C’s) need to be
added. In addition the NCS5651 has a mid−supply virtual
common at pin 2 (Vcom) to facilitate implementation of the
filter topology.
Figure 8 shows the frequency response for each stage and
the overall filter.
BIAS
20
9
13
2
VCOM
GND
11
10
+B
10 nF
VEE
Figure 9. Decoupling Capacitors
Current Limit (R−Limit)
The maximal output current of the NCS5651 can be
programmed by the simple addition of a resistor (RLIM) from
pin 15 to VEE (Figure 7). Figure 8 shows the limiting value
for given resistance, with a tolerance of ±50 mA. Unlike
traditional power amplifiers, the NCS5651 current limit
functions both when sourcing and sinking current. To
calculate the resistance required to program a desired
current limit the following equation can be used:
I LIM + 1.215
R LIM
8197
If the load current reaches the set current limit, the ILIM
flag will go logic high. As an example, the user may act on
this by reducing the signal amplitude. When the current
output recovers, the ILIM flag returns low.
9
BOUT
8
1.215 V
Figure 8. Frequency Response of an EN 50065−1
Compliant Filter
NCS5651
11
15
RLIMIT
Decoupling
10
VEE
RLIM
Optimal stability and noise rejection will be implemented
with power supply bypassing placed as physically close to
the device as possible. A parallel combination of 10 mF and
Figure 10. Programming the Current Limit
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8
NCS5651
Figure 11 illustrates the required resistance to program
the current limit.
VBB
R1
18
VWARN
R2
14
VWARN
11
10
T WARN
TW
NCS5651
VEE
Figure 12. Setting the Thermal Warning Limit by
Applying the Corresponding Threshold Voltage to
Pin 14 (VWARN)
Figure 13 illustrates the linearity of the internal junction
temperature to the required voltage on pin 14 (Twarn).
Figure 11. RLIM in Function of the ILIM
Thermal Shutdown and Thermal Warning Flag
Excessive dissipation inside the amplifier, for instance
during overload conditions, can result in damaging junction
temperatures. A thermal shutdown protection monitors the
junction temperature to protect against this.
When the internal junction temperature reaches
approximately 160°C, the amplifier is disabled and placed
in a high−impedance state. The amplifier will be re−enabled
− assuming the Enable input is still active − when the
junction temperature cools back down to approximately
135°C.
During thermal shutdown the TSD flag (thermal shut
down, pin 17) will go logic high.
The user has the option to avoid entering into the TSD
mode by monitoring the junction temperature via the
Thermal Warning feature.
Any junction temperature (TWARN) from 105°C to 145°C
can be programmed by applying the appropriate voltage to
pin 14. Figure 11 shows how this may be realized with a
voltage divider between VBB (pins 6,7) and VEE (the
negative supply, pin 10 or 11). The voltage ratio required to
program the thermal warning of the NCS5651 can be
calculated using:
V TW + 6.665
10 −3ǒT JǓ ) 1.72
Figure 13. Thermal Warning Threshold in Function of
Junction Temperature
Virtual Common (VCOM)
The principal purpose of VCOM is to provide a convenient
virtual common for implementing the 4th−order CENELEC
filter when operating on single−sided power supply. When
operating on balanced split supplies it is recommended to
use the power supply common for the filter implementation
and to leave VCOM floating.
The output impedance of VCOM is high, about 110 kW;
thus, it is strongly recommended to use VCOM only for
biasing the non−inverting inputs. In addition, it must be
buffered with a ceramic capacitor for optimal supply noise
rejection.
(eq. 1)
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NCS5651
Safe Operating Area
Although voltage−versus−current is the normal
representation of safe operating area, a PLC line driver can
only control one of these variables: voltage and current are
linked through the mains impedance. Figure 15 displays
exactly the same information as Figure 14 but might be
easier to work with. Constant current values are now
represented as canted lines.
The safe operating area (SOA) of an amplifier is the
collection of output currents IL and the output voltages VL
that will result in normal operation with risk of destruction
due to overcurrent or overheating.
In a normal application only the output amplifier of the
line driver must be considered; the load on the small−signal
amplifier is usually negligible.
The output amplifier SOA depends on the thermal
resistance from junction to ambient RqJA, which in turn
strongly depends on board design. RqJA = 50 K/W in free air
is a typical value, which may be used even if the host printed
circuit board (PCB) is mounted in a small closed box,
provided the transmission of frames are infrequent and
widely spread in time.
This typical value is also used in the generation of the
curves plotted in Figures 14 and 15.
Figure 14 shows the SOA in function of output current IL
and output voltage VL with the ambient temperature as
independent parameter. The maximum allowed current is
800 mA RMS. For that reason it is recommended to limit the
output current by using RLIM = 5 kW. This current limitation
is plotted as a horizontal line. The maximal output voltage
is limited by VCC,max, VOH and VOL. This results in the
straight line on the right hand side of the VL–IL plot. The area
below and left from these limitations is considered as safe.
The relation between output voltage and current is the
impedance as seen at the output of the power operational
amplifier. Constant impedance lines are represented by
canted lines.
Figure 15. Example SOA in ZL–VL Space (bottom
right corner is safe)
Again, the safe operating area depends on PCB layout.
Thus, the designer must verify the performance of her
particular design [1].
Digital Power Supply GND−Reference and Translators
In many mixed signal applications analog GND and
digital GND are not at the same potential. To minimize GND
loop issues, the NCS5651 has a separate GND pin (pin 20)
which should be used to reference the digital supply and the
warning flags (pins 16, 17, and 18). In most applications this
would be the same GND reference used for the PLC modem.
Please note that at some point in the application digital GND
and analog GND must be tied together.
REFERENCES
In this document references are made to:
1. ON Semiconductor, Design Manual NCN49597/9,
December 2014. The latest version is available
from your sales representative.
2. ON Semiconductor. AND8402/D Thermal
Considerations for the NCS5651 (application
note). 2014−08−01. Online at
http://www.onsemi.com/pub/Collateral/AND8402
−D.PDF
3. ON Semiconductor. AND9165/D. Getting started
with power line communication (application note).
2014−11−01. Online at
http://www.onsemi.com/pub_link/Collateral/AND
9165−D.PDF
Figure 14. Example SOA in VL–IL Space (bottom
left corner is safe) with Rthj−a = 50 K/W
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10
NCS5651
PACKAGE DIMENSIONS
QFN20, 4x4, 0.5P
CASE 485E
ISSUE B
A
B
D
PIN ONE
REFERENCE
2X
0.15 C
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÇÇ
ÇÇ
ÉÉ
EXPOSED Cu
E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND 0.30 MM
FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
ÉÉ
ÉÉ
ÇÇ
A3
MOLD CMPD
A1
DETAIL B
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
OPTIONAL CONSTRUCTIONS
2X
0.15 C
L
L
TOP VIEW
(A3)
DETAIL B
L1
A
0.10 C
DETAIL A
OPTIONAL CONSTRUCTIONS
0.08 C
A1
SIDE VIEW
C
SEATING
PLANE
SOLDERING FOOTPRINT*
4.30
0.10 C A B
20X
0.58
D2
DETAIL A
MILLIMETERS
MIN
MAX
0.80
1.00
--0.05
0.20 REF
0.20
0.30
4.00 BSC
2.60
2.90
4.00 BSC
2.60
2.90
0.50 BSC
0.20 REF
0.35
0.45
0.00
0.15
20X
L
6
2.88
0.10 C A B
11
1
E2
1
2.88 4.30
20
K
20X
e
b
0.10 C A B
0.05 C
PKG
OUTLINE
NOTE 3
BOTTOM VIEW
20X
0.35
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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