INTERSIL ISL81387

ISL81387, ISL41387
®
Data Sheet
December 20, 2005
±15kV
ESD Protected, Dual Protocol
(RS-232/RS-485) Transceivers
FN6201.1
Features
These devices are BiCMOS interface ICs that are user
configured as either a single RS-422/485 differential
transceiver, or as a dual (2 Tx, 2 Rx) RS-232 transceiver.
In RS-232 mode, the on-board charge pump generates
RS-232 compliant ±5V Tx output levels, from a supply as low
as 4.5V. Four small 0.1µF capacitors are required for the
charge pump. The transceivers are RS-232 compliant, with
the Rx inputs handling up to ±25V, and the Tx outputs
handling ±12V.
In RS-485 mode, the transceivers support both the RS-485
and RS-422 differential communication standards. The
RS-485 receiver features "full failsafe" operation, so the Rx
output remains in a high state if the inputs are open or
shorted together. The RS-485 transmitter supports up to
three data rates, two of which are slew rate limited for
problem free communications. The charge pump disables in
RS-485 mode, thereby saving power, minimizing noise, and
eliminating the charge pump capacitors.
Both RS-232/485 modes feature loopback and shutdown
functions. The loopback mode internally connects the Tx
outputs to the corresponding Rx input, which facilitates the
implementation of board level self test functions. The outputs
remain connected to the loads during loopback, so
connection problems (e.g., shorted connectors or cables)
can be detected. The shutdown mode disables the Tx and
Rx outputs, disables the charge pump if in RS-232 mode,
and places the IC in a low current (20µA) mode.
The ISL41387 is a QFN packaged device that offers
additional functionality, including a lower speed and edge
rate option (115kbps) for EMI sensitive designs, or to allow
longer bus lengths. It also features a logic supply voltage pin
(VL) that sets the VOH level of logic outputs, and the
switching points of logic inputs, to be compatible with
another supply voltage in mixed voltage systems. The QFN's
choice of active high or low Rx enable pins increases design
flexibility, allowing Tx/Rx direction control via a single signal
by connecting DEN and RXEN together.
• User Selectable RS-232 or RS-485/422 Interface Port
(Two RS-232 Transceivers or One RS-485/422
Transceiver)
• ±15kV (HBM) ESD Protected Bus Pins (RS-232 or
RS-485)
• Flow-Through Pinouts Simplify Board Layouts
• Pb-Free Plus Anneal Available (RoHS Compliant)
• Large (2.7V) Differential VOUT for Improved Noise
Immunity in RS-485/422 Networks
• Full Failsafe (Open/Short) Rx in RS-485/422 Mode
• Loopback Mode Facilitates Board Self Test Functions
• User Selectable RS-485 Data Rates . . . . . . . . . . 20Mbps
- Slew Rate Limited. . . . . . . . . . . . . . . . . . . . . . . 460kbps
- Slew Rate Limited (ISL41387 Only) . . . . . . . . . 115kbps
• Fast RS-232 Data Rate . . . . . . . . . . . . . . . Up to 650kbps
• Low Current Shutdown Mode. . . . . . . . . . . . . . . . . . .35µA
• QFN Package Saves Board Space (ISL41387 Only)
• Logic Supply Pin (VL) Eases Operation in Mixed Supply
Systems (ISL41387 Only)
Applications
• Gaming Applications (e.g., Slot machines)
• Single Board Computers
• Factory Automation
• Security Networks
• Industrial/Process Control Networks
• Level Translators (e.g., RS-232 to RS-422)
• Point of Sale Equipment
For a dual port version of these devices, please see the
ISL81334/ISL41334 data sheet.
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
NO. OF
PORTS
PACKAGE OPTIONS
RS-485 DATA
RATE (bps)
RS-232 DATA
RATE (kbps)
VL PIN?
ACTIVE H or L
Rx ENABLE?
LOW POWER
SHUTDOWN?
ISL81387
1
20 Ld SOIC, 20 Ld SSOP
20M, 460k
650
NO
H
YES
ISL41387
1
40 Ld QFN (6 x 6mm)
20M, 460k, 115k
650
YES
BOTH
YES
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL81387, ISL41387
Ordering Information
PART NUMBER (NOTE)
PART MARKING
TEMP. RANGE (°C)
PACKAGE (Pb-Free)
PKG. DWG. #
ISL81387IAZ
81387IAZ
-40 to 85
20 Ld SSOP
M20.209
ISL81387IAZ-T
81387IAZ
-40 to 85
20 Ld SSOP Tape and Reel
M20.209
ISL81387IBZ
ISL81387IBZ
-40 to 85
20 Ld SOIC
M20.3
ISL81387IBZ-T
ISL81387IBZ
-40 to 85
20 Ld SOIC Tape and Reel
M20.3
ISL41387IRZ
41387IRZ
-40 to 85
40 Ld QFN
L40.6x6
ISL41387IRZ-T
41387IRZ
-40 to 85
40 Ld QFN Tape and Reel
L40.6x6
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinouts
ISL81387 (SOIC, SSOP)
TOP VIEW
C1+ 1
20 C2+
C1- 2
19 C2-
V+
3
18 VCC
A 4
17 RA
B 5
16 RB
Y 6
15 DY
Z 7
14 DZ/SLEW
13 ON
485/232 8
DEN 9
12 RXEN
GND 10
11 V-
NC
NC
C1-
C1+
C2+
C2-
VCC
NC
NC
VL
ISL41387 (QFN)
TOP VIEW
40
39
38
37
36
35
34
33
32
31
Y
4
27 DZ/SLEW
Z
5
26 NC
NC
6
25 NC
NC
7
24 NC
NC
8
23 NC
NC
9
22 NC
NC
10
21 ON
485/232
11
2
12
13
14
15
16
17
18
19
20
RXEN
28 DY
V-
3
NC
B
RXEN
29 RB
GND
2
GND
A
SPB
30 RA
NC
1
DEN
V+
FN6201.1
December 20, 2005
ISL81387, ISL41387
TABLE 2. ISL81387 FUNCTION TABLE
RECEIVER
OUTPUTS
CHARGE
PUMPS
(NOTE 1)
LOOPBACK
(NOTE 2)
MODE
RA
RB
Y
Z
DRIVER
SPEED
(Mbps)
N.A.
High-Z
High-Z
High-Z
High-Z
-
ON
OFF
RS-232
1
N.A.
High-Z
High-Z
ON
ON
0.46
ON
OFF
RS-232
1
0
N.A.
ON
ON
High-Z
High-Z
-
ON
OFF
RS-232
1
1
1
N.A.
ON
ON
ON
ON
0.46
ON
OFF
RS-232
0
0
0
1
N.A.
High-Z
High-Z
ON
High-Z
0.46
ON
OFF
RS-232
0
0
1
0
N.A.
High-Z
ON
ON
High-Z
0.46
ON
OFF
RS-232
0
0
1
1
N.A.
ON
ON
ON
ON
0.46
ON
ON
RS-232
X
0
0
0
X
High-Z
High-Z
High-Z
High-Z
-
OFF
OFF
Shutdown
1
1
0
0
X
High-Z
High-Z
High-Z
High-Z
-
OFF
OFF
RS-485
1
X
0
1
1/0
High-Z
High-Z
ON
ON
20/0.46
OFF
OFF
RS-485
1
X
1
0
X
ON
High-Z
High-Z
High-Z
-
OFF
OFF
RS-485
1
1
1
1
1/0
ON
High-Z
ON
ON
20/0.46
OFF
OFF
RS-485
1
0
1
1
1/0
ON
High-Z
ON
ON
20/0.46
OFF
ON
RS-485
INPUTS
485/232
ON
RXEN
0
1
0
0
0
1
0
0
1
0
DEN SLEW
DRIVER OUTPUTS
NOTES:
1. Charge pumps are on if in RS-232 mode and ON or DEN or RXEN are high.
2. Loopback is enabled when ON = 0, and DEN = RXEN = 1.
ISL81387 Truth Tables
RS-485 TRANSMITTING MODE
RS-232 TRANSMITTING MODE
INPUTS (ON = 1)
INPUTS (ON = 1)
OUTPUTS
OUTPUTS
485/232
DEN
DY
DZ
Y
Z
0
1
0
0
1
1
0
1
0
1
1
0
0
1
1
0
0
1
0
1
1
1
0
0
0
0
X
X
High-Z
High-Z
485/232
DEN
DY
SLEW
Y
Z
DATA RATE
(Mbps)
1
1
0
1
1
0
20
1
1
1
1
0
1
20
1
1
0
0
1
0
0.46
1
1
1
0
0
1
0.46
1
0
X
X
-
RS-485 RECEIVING MODE
RS-232 RECEIVING MODE
INPUTS (ON = 1)
INPUTS (ON = 1)
OUTPUT
485/232
RXEN
A
B
RA
RB
0
1
0
0
1
1
0
1
0
1
1
0
0
1
1
0
0
1
0
1
1
1
0
0
0
1
Open
Open
1
1
0
0
X
X
High-Z
High-Z
3
High-Z High-Z
OUTPUT
485/232
RXEN
B-A
RA
RB
1
1
≥ -40mV
1
High-Z
1
1
≤ -200mV
0
High-Z
1
1
Open or Shorted together
1
High-Z
1
0
X
High-Z
High-Z
FN6201.1
December 20, 2005
ISL81387, ISL41387
TABLE 3. ISL41387 FUNCTION TABLE
RECEIVER
OUTPUTS
INPUTS
DRIVER
OUTPUTS
Z
DRIVER
DATA
RATE
(Mbps)
CHARGE
PUMPS
(NOTE 3)
MODE
485/232
ON
RXEN
and/or
RXEN
0
1
1 and 0
0
N.A.
N.A.
High-Z
High-Z
High-Z
High-Z
-
ON
RS-232
0
1
1 and 0
1
N.A.
N.A.
High-Z
High-Z
ON
ON
0.46
ON
RS-232
0
1
0 or 1
0
N.A.
N.A.
ON
ON
High-Z
High-Z
-
ON
RS-232
0
1
0 or 1
1
N.A.
N.A.
ON
ON
ON
ON
0.46
ON
RS-232
0
0
1 and 0
1
N.A.
N.A.
High-Z
High-Z
ON
High-Z
0.46
ON
RS-232
0
0
0 or 1
0
N.A.
N.A.
High-Z
ON
ON
High-Z
0.46
ON
RS-232
0
0
0 or 1
1
N.A.
N.A.
ON
ON
ON
ON
0.46
ON
RS-232 (Note 4)
X
0
1 and 0
0
X
X
High-Z
High-Z
High-Z
High-Z
-
OFF
Shutdown
1
1
1 and 0
0
X
X
High-Z
High-Z
High-Z
High-Z
-
OFF
RS-485
1
X
1 and 0
1
0
1/0
High-Z
High-Z
ON
ON
0.46/0.115
OFF
RS-485
1
X
1 and 0
1
1
X
High-Z
High-Z
ON
ON
20
OFF
RS-485
1
X
0 or 1
0
X
X
ON
High-Z
High-Z
High-Z
-
OFF
RS-485
1
1
0 or 1
1
0
1/0
ON
High-Z
ON
ON
0.46/0.115
OFF
RS-485
1
1
0 or 1
1
1
X
ON
High-Z
ON
ON
20
OFF
RS-485
1
0
0 or 1
1
0
1/0
ON
High-Z
ON
ON
0.46/0.115
OFF
RS-485 (Note 4)
1
0
0 or 1
1
1
X
ON
High-Z
ON
ON
20
OFF
RS-485 (Note 4)
DEN
SLEW
SPB
RA
RB
Y
NOTES:
3. Charge pumps are on if in RS-232 mode and ON or DEN or RXEN is high, or RXEN is low.
4. Loopback is enabled when ON = 0, and DEN = 1, and (RXEN = 1 or RXEN = 0).
ISL41387 Truth Tables
RS-485 TRANSMITTING MODE
RS-232 TRANSMITTING MODE
INPUTS (ON=1)
INPUTS (ON=1)
OUTPUTS
OUTPUTS
DATA
485/232
DEN
SLEW
SPB
DY
Y
Z
Mbps
485/232
DEN
DY
DZ
Y
Z
1
1
0
0
0/1
1/0
0/1
0.115
0
1
0
0
1
1
1
1
0
1
0/1
1/0
0/1
0.460
0
1
0
1
1
0
1
1
1
X
0/1
1/0
0/1
20
0
1
1
0
0
1
1
0
X
X
X
0
1
1
1
0
0
0
0
X
X
High-Z
High-Z
High-Z High-Z
RS-485 RECEIVING MODE
INPUTS (ON=1)
RS-232 RECEIVING MODE
INPUTS (ON=1)
OUTPUT
485/232
RXEN and/or
A
B
RA
RB
0
0 or 1
0
0
1
1
0
0 or 1
0
1
1
0
0
0 or 1
1
0
0
1
0
0 or 1
1
1
0
0
0
0 or 1
Open
Open
1
1
0
1 and 0
X
X
4
-
OUTPUT
485/232
RXEN and/or
B-A
RA
RB
1
0 or 1
≥ -40mV
1
High-Z
1
0 or 1
≤ -200mV
0
High-Z
1
0 or 1
Open or Shorted
together
1
High-Z
1
1 and 0
X
High-Z High-Z
High-Z High-Z
FN6201.1
December 20, 2005
ISL81387, ISL41387
Pin Descriptions
PIN
MODE
FUNCTION
485/232
BOTH
Interface Mode Select input. High for RS-485 Mode and low for RS-232 Mode.
DEN
BOTH
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DEN high. They are high impedance when DEN
is low.
GND
BOTH
Ground connection.
NC
BOTH
No Connection.
ON
BOTH
In RS-232 mode only, ON high enables the charge pumps. ON low, with DEN and RXEN low (and RXEN high if QFN), turns
off the charge pumps (in RS-232 mode), and in either mode places the device in low power shutdown. In both modes, when
ON is low, and DEN is high, and RXEN is high or RXEN is low, loopback is enabled.
RXEN
BOTH
Receiver output enable. Rx is enabled when RXEN is high; Rx is high impedance when RXEN is low and, if using the QFN
package, RXEN is high. When using the QFN and the active high Rx enable function, RXEN should be high or floating.
RXEN
BOTH
Active low receiver output enable. Rx is enabled when RXEN is low; Rx is high impedance when RXEN is high and RXEN
is low. (i.e., to use active low Rx enable function, tie RXEN to GND). For single signal Tx/Rx direction control, connect RXEN
to DEN. Internally pulled high. (QFN only)
VCC
BOTH
System power supply input (5V).
VL
BOTH
Logic-Level Supply. All TTL/CMOS inputs and outputs are powered by this supply. (QFN only)
A
RS-232 Receiver input with ±15kV ESD protection. A low on A forces RA high; A high on A forces RA low.
RS-485 Inverting receiver input with ±15kV ESD protection.
B
RS-232 Receiver input with ±15kV ESD protection. A low on B forces RB high; A high on B forces RB low.
RS-485 Noninverting receiver input with ±15kV ESD protection.
DY
RS-232 Driver input. A low on DY forces output Y high. Similarly, a high on DY forces output Y low.
RS-485 Driver input. A low on DY forces output Y high and output Z low. Similarly, a high on DY forces output Y low and output Z high.
DZ
SLEW
SPB
RA
RS-232 Driver input. A low on DZ forces output Z high. Similarly, a high on DZ forces output Z low.
RS-485 Slew rate control. With the SLEW pin high, the drivers run at the maximum slew rate (20Mbps). With the SLEW pin low, the
drivers run at a reduced slew rate (460kbps). On the QFN version, works in conjunction with SPB to select one of three
RS-485 data rates. Internally pulled high in RS-485 mode.
RS-485 Speed control. Works in conjunction with the SLEW pin to select the 20Mbps, 460kbps or 115kbps RS-485 data rate.
Internally pulled high. (QFN only)
RS-232 Receiver output.
RS-485 Receiver output: If B > A by at least -40mV, RA is high; If B < A by -200mV or more, RA is low; RA = High if A and B are
unconnected (floating) or shorted together (i.e., full fail-safe).
RB
RS-232 Receiver output.
RS-485 Not used. Output is high impedance, and unaffected by RXEN and RXEN.
Y
RS-232 Driver output with ±15kV ESD protection.
RS-485 Inverting driver output with ±15kV ESD protection.
Z
RS-232 Driver output with ±15kV ESD protection.
RS-485 Noninverting driver output with ±15kV ESD protection.
C1+
RS-232 External capacitor (voltage doubler) is connected to this lead. Not needed in RS-485 Mode.
C1-
RS-232 External capacitor (voltage doubler) is connected to this lead. Not needed in RS-485 Mode.
C2+
RS-232 External capacitor (voltage inverter) is connected to this lead. Not needed in RS-485 Mode.
C2-
RS-232 External capacitor (voltage inverter) is connected to this lead. Not needed in RS-485 Mode.
V+
RS-232 Internally generated positive RS-232 transmitter supply (+5.5V). C3 not needed in RS-485 Mode.
V-
RS-232 Internally generated negative RS-232 transmitter supply (-5.5V). C4 not needed in RS-485 Mode.
5
FN6201.1
December 20, 2005
ISL81387, ISL41387
Typical Operating Circuit
/
RS-232 MODE WITHOUT LOOPBACK
+5V
+
C1
0.1µF
C2
0.1µF
+5V
0.1µF
1
+
2
20
+
19
C1+
VCC
C2+
V- 11
C2-
16
R
5kΩ
6
15
D
7
Z
17
R
5
Y
V+
14
D
9
VCC
+ C3
0.1µF
C4
0.1µF
+
ON
C1
0.1µF
+
C2
0.1µF
+
C1+
2
20
19
+
C2
0.1µF
+
A
B
Z
C4
0.1µF
+
16
R
RA
RB
DY
6
Y
DZ
7
Z
VCC
15
D
14
D
9
VCC
DZ
12
VCC
RXEN
DEN
8
VCC
DY
485/232
ON
GND
13
10
NOTE: PINOUT FOR SOIC AND SSOP
NOTE: PINOUT FOR SOIC AND SSOP
RS-485 MODE WITH LOOPBACK
+5V
0.1µF
2
20
19
C1+
VCC
C1C2+
V+
3
V- 11
C2-
4
17
R
5
6
15
D
7
9
+ C3
0.1µF
C4
0.1µF
+
+
C2
0.1µF
+
ON
2
20
19
A
4
B
5
C1+
18
VCC
C1C2+
V+
17
R
16
Y
6
15
D
7
SLEW
GND
+ C3
0.1µF
C4
0.1µF
+
RA
LB
Rx
DY
13
3
V- 11
C2-
RB
RXEN
485/232
0.1µF
1
C1
0.1µF
RA
12
DEN
8
+
18
14
VCC
17
R
5kΩ
Z
VCC
V- 11
5
B1
+ C3
0.1µF
LB
Rx
13
16
Y
3
10
1
C1
0.1µF
V+
C2-
4
RS-485 MODE WITHOUT LOOPBACK
+
VCC
C1C2+
GND
+5V
18
5kΩ
RB
RXEN
485/232
0.1µF
1
A1
RA
12
DEN
8
3
C1-
5kΩ
B
+
18
4
A
RS-232 MODE WITH LOOPBACK
VCC
VCC
14
VCC
VCC
9
8
RB
DY
SLEW
12
485/232
VCC
RXEN
DEN
GND
ON
13
10
10
NOTE: PINOUT FOR SOIC AND SSOP
NOTE: PINOUT FOR SOIC AND SSOP
6
FN6201.1
December 20, 2005
ISL81387, ISL41387
Absolute Maximum Ratings (TA = 25°C)
Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
VL (QFN Only) . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V
Input Voltages
All Except A,B (non-QFN Package) . . . . . . -0.5V to (VCC + 0.5V)
All Except A,B (QFN Package). . . . . . . . . . . -0.5V to (VL + 0.5V)
Input/Output Voltages
A, B (Any Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V to +25V
Y, Z (Any Mode, Note 5) . . . . . . . . . . . . . . . . . . . -12.5V to +12.5V
RA, RB (non-QFN Package). . . . . . . . . . . . -0.5V to (VCC + 0.5V)
RA, RB (QFN Package) . . . . . . . . . . . . . . . . -0.5V to (VL + 0.5V)
Output Short Circuit Duration
Y, Z, RA, RB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical, Note 6)
θJA (°C/W)
20 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
65
20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
60
40 Ld QFN Package. . . . . . . . . . . . . . . . . . . . . . . . .
32
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC and SSOP - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
5. One output at a time, IOUT ≤ 100mA for ≤ 10 mins.
6. QFN θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features.
θJA for other packages is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379 and Tech Brief TB389 for details.
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1µF, VL = VCC (for QFN only), Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = 25°C (Note 7)
Electrical Specifications
PARAMETER
TEMP
(°C)
MIN
TYP
MAX
UNITS
Full
-
-
VCC
V
R = 50Ω (RS-422) (Figure 1)
Full
2.5
3.1
-
V
R = 27Ω (RS-485) (Figure 1)
Full
2.2
2.7
5
V
VOD3
RD = 60Ω, R = 375Ω, VCM = -7V to 12V (Figure 1)
Full
2
2.7
5
V
∆VOD
R = 27Ω or 50Ω (Figure 1)
Full
-
0.01
0.2
V
VOC
R = 27Ω or 50Ω (Figure 1) (Note 11)
Full
-
-
3.1
V
∆VOC
R = 27Ω or 50Ω (Figure 1) (Note 11)
Full
-
0.01
0.2
V
Full
35
-
250
mA
VOUT = 12V
Full
-
-
150
µA
VOUT = -7V
Full
-150
-
-
µA
SYMBOL
TEST CONDITIONS
DC CHARACTERISTICS - RS-485 DRIVER (485/232 = VCC)
Driver Differential VOUT (no load)
VOD1
Driver Differential VOUT (with load)
VOD2
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
Driver Common-Mode VOUT
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
Driver Short-Circuit Current,
VOUT = High or Low
IOS
-7V ≤ (VY or VZ) ≤ 12V (Note 9)
Driver Three-State Output Leakage
Current (Y, Z)
IOZ
Outputs Disabled,
VCC = 0V or 5.5V
DC CHARACTERISTICS - RS-232 DRIVER (485/232 = 0V)
Driver Output Voltage Swing
VO
All TOUTS Loaded with 3kΩ to Ground
Full
±5.0
+6/-7
-
V
Driver Output Short-Circuit Current
IOS
VOUT = 0V
Full
-60
25/-35
60
mA
DC CHARACTERISTICS - LOGIC PINS (i.e., DRIVER AND CONTROL INPUT PINS)
Input High Voltage
7
VIH1
VL = VCC if QFN
Full
2
1.6
-
V
VIH2
VL = 3.3V (QFN Only)
Full
2
1.2
-
V
VIH3
VL = 2.5V (QFN Only)
Full
1.5
1
-
V
FN6201.1
December 20, 2005
ISL81387, ISL41387
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1µF, VL = VCC (for QFN only), Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = 25°C (Note 7) (Continued)
Electrical Specifications
PARAMETER
SYMBOL
Input Low Voltage
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
VIL1
VL = VCC if QFN
Full
-
1.4
0.8
V
VIL2
VL = 3.3V (QFN Only)
Full
-
1
0.7
V
VIL3
VL = 2.5V (QFN Only)
Full
-
0.8
0.5
V
IIN1
Except SLEW, RXEN (QFN), and SPB (QFN)
Full
-2
-
2
µA
IIN2
SLEW (Note 12), RXEN (QFN), and SPB (QFN)
Full
-25
-
25
µA
-7V ≤ VCM ≤ 12V, Full Failsafe
Full
-0.2
-
-0.04
V
VCM = 0V
25
-
35
-
mV
VIN = 12V
Full
-
-
0.8
mA
VIN = -7V
Full
-0.64
-
-
mA
Full
15
-
-
kΩ
Input Current
DC CHARACTERISTICS - RS-485 RECEIVER INPUTS (485/232 = VCC)
Receiver Differential Threshold
Voltage
VTH
∆VTH
Receiver Input Hysteresis
Receiver Input Current (A, B)
IIN
Receiver Input Resistance
RIN
VCC = 0V or 4.5 to 5.5V
-7V ≤ VCM ≤ 12V, VCC = 0 (Note 10), or
4.5V ≤ VCC ≤ 5.5V
DC CHARACTERISTICS - RS-232 RECEIVER INPUTS (485/232 = GND)
Receiver Input Voltage Range
VIN
Full
-25
-
25
V
Receiver Input Threshold
VIL
Full
-
1.4
0.8
V
VIH
Full
2.4
1.9
-
V
Receiver Input Hysteresis
∆VTH
25
-
0.5
-
V
Receiver Input Resistance
RIN
Full
3
5
7
kΩ
VIN = ±15V, VCC Powered Up (Note 10)
DC CHARACTERISTICS - RECEIVER OUTPUTS (485 OR 232 MODE)
Receiver Output High Voltage
VOH1
IO = -2mA (VL = VCC if QFN)
Full
3.5
4.6
-
V
VOH2
IO = -650µA, VL = 3V, QFN Only
Full
2.6
2.9
-
V
VOH3
IO = -500µA, VL = 2.5V, QFN Only
Full
2
2.4
-
V
Receiver Output Low Voltage
VOL
IO = 3mA
Full
-
0.1
0.4
V
Receiver Short-Circuit Current
IOSR
0V ≤ VO ≤ VCC
Full
7
-
85
mA
Receiver Three-State Output
Current
IOZR
Output Disabled, 0V ≤ VO ≤ VCC (or VL for QFN)
Full
-
-
±10
µA
ICC232
485/232 = 0V, ON = VCC
Full
-
3.7
7
mA
ICC485
485/232 = VCC, ON = VCC
Full
-
1.6
5
mA
ISHDN232
ON = DEN = RXEN = 0V
(RXEN = SPB = VCC if QFN)
Full
-
5
30
µA
ISHDN485
ON = DEN = RXEN = SLEW = 0V
(RXEN = VCC, SPB = 0V if QFN)
Full
-
35
60
µA
Bus Pins (A, B, Y, Z) Any Mode
Human Body Model
25
-
15
-
kV
All Other Pins
Human Body Model
25
-
4
-
kV
POWER SUPPLY CHARACTERISTICS
No-Load Supply Current, Note 8
Shutdown Supply Current
ESD CHARACTERISTICS
RS-232 DRIVER and RECEIVER SWITCHING CHARACTERISTICS (485/232 = 0V, ALL VERSIONS AND SPEEDS)
Driver Output Transition Region
Slew Rate
SR
8
RL = 3kΩ, Measured From 3V to CL ≥ 15pF
-3V or -3V to 3V
CL ≤ 2500pF
Full
-
18
30
V/µs
Full
4
12
-
V/µs
FN6201.1
December 20, 2005
ISL81387, ISL41387
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1µF, VL = VCC (for QFN only), Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = 25°C (Note 7) (Continued)
Electrical Specifications
PARAMETER
TEMP
(°C)
MIN
TYP
MAX
UNITS
RL = 3kΩ, CL = 2500pF, 10% - 90%
Full
0.22
1.2
3.1
µs
RL = 3kΩ, CL = 1000pF (Figure 6)
Full
-
1
2
µs
Full
-
1.2
2
µs
Full
-
240
400
ns
25
-
800
-
ns
RL = 5kΩ, Measured at VOUT = ±3V
25
-
500
-
ns
VOUT = ±3.0V (Note 13)
25
-
20
-
µs
SYMBOL
Driver Output Transition Time
tr, tf
Driver Propagation Delay
tDPHL
TEST CONDITIONS
tDPLH
Driver Propagation Delay Skew
tDSKEW
Driver Enable Time
tDEN
Driver Disable Time
tDDIS
Driver Enable Time from Shutdown
tDENSD
tDPHL - tDPLH (Figure 6)
Driver Maximum Data Rate
DRD
RL = 3kΩ, CL = 1000pF, One Transmitter
Switching
Full
460
650
-
kbps
Receiver Propagation Delay
tRPHL
CL = 15pF (Figure 7)
Full
-
50
120
ns
Full
-
40
120
ns
tRPHL - tRPLH (Figure 7)
Full
-
10
40
ns
CL = 15pF
Full
0.46
2
-
Mbps
tRPLH
Receiver Propagation Delay Skew
Receiver Maximum Data Rate
tRSKEW
DRR
RS-485 DRIVER SWITCHING CHARACTERISTICS (FAST DATA RATE (20Mbps), 485/232 = VCC, SLEW = VCC, ALL VERSIONS)
Driver Differential Input to Output
Delay
Driver Output Skew
Driver Differential Rise or Fall Time
tDLH, tDHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
15
30
50
ns
tSKEW
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
0.5
10
ns
tR, tF
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
3
11
20
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3)
Full
-
27
60
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3)
Full
-
31
60
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 100pF, SW = VCC (Figure 3)
(Note 13)
Full
-
65
250
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN)
RL = 500Ω, CL = 100pF, SW = GND (Figure 3)
(Note 13)
Full
-
152
250
ns
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
30
-
Mbps
Driver Maximum Data Rate
fMAX
RS-485 DRIVER SWITCHING CHARACTERISTICS (MEDIUM DATA RATE (460kbps), 485/232 = VCC, SLEW = SPB (QFN Only) = GND, ALL
VERSIONS)
Driver Differential Input to Output
Delay
Driver Output Skew
Driver Differential Rise or Fall Time
tDLH, tDHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
200
490
1000
ns
tSKEW
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
110
400
ns
tR, tF
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
300
600
1100
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3)
Full
-
30
300
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3)
Full
-
128
300
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3)
Full
-
31
60
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 100pF, SW = VCC (Figure 3)
(Note 13)
Full
-
65
500
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN)
RL = 500Ω, CL = 100pF, SW = GND (Figure 3)
(Note 13)
Full
-
255
500
ns
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
2000
-
kbps
Driver Maximum Data Rate
fMAX
9
FN6201.1
December 20, 2005
ISL81387, ISL41387
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V, C1 - C4 = 0.1µF, VL = VCC (for QFN only), Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = 25°C (Note 7) (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
RS-485 DRIVER SWITCHING CHARACTERISTICS (SLOW DATA RATE (115kbps, QFN ONLY), 485/232 = VCC, SLEW = 0V, SPB = VCC)
Driver Differential Input to Output
Delay
Driver Output Skew
Driver Differential Rise or Fall Time
tDLH, tDHL RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
800
1500
2500
ns
tSKEW
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
350
1250
ns
tR, tF
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
1000
2000
3100
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC (Figure 3)
Full
-
32
600
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND (Figure 3)
Full
-
300
600
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 3)
Full
-
31
60
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 3)
Full
-
24
60
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 500Ω, CL = 100pF, SW = VCC (Figure 3)
(Note 13)
Full
-
65
800
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN)
RL = 500Ω, CL = 100pF, SW = GND (Figure 3)
(Note 13)
Full
-
420
800
ns
RDIFF = 54Ω, CL = 100pF (Figure 2)
Full
-
800
-
kbps
Driver Maximum Data Rate
fMAX
RS-485 RECEIVER SWITCHING CHARACTERISTICS (485/232 = VCC, ALL VERSIONS AND SPEEDS)
Receiver Input to Output Delay
tPLH, tPHL
(Figure 4)
Full
20
50
90
ns
Receiver Skew | tPLH - tPHL |
tSKEW
(Figure 4)
Full
-
0.1
10
ns
Receiver Maximum Data Rate
fMAX
Full
-
40
-
Mbps
RECEIVER ENABLE/DISABLE CHARACTERISTICS (ALL MODES AND VERSIONS AND SPEEDS)
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC (Figure 5)
Full
-
22
60
ns
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND (Figure 5)
Full
-
23
60
ns
Receiver Disable from Output Low
tLZ
CL = 15pF, SW = VCC (Figure 5)
Full
-
24
60
ns
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND (Figure 5)
Full
-
25
60
ns
Receiver Enable from Shutdown to
Output Low
tZLSHDN
CL = 15pF, SW = VCC (Figure 5)
(Note 13)
RS-485 Mode
Full
-
260
700
ns
RS-232 Mode
25
-
35
-
ns
Receiver Enable from Shutdown to
Output High
tZHSHDN
CL = 15pF, SW = GND (Figure 5) RS-485 Mode
(Note 13)
RS-232 Mode
Full
-
260
700
ns
25
-
25
-
ns
NOTES:
7. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
8. Supply current specification is valid for loaded drivers when DEN = 0V.
9. Applies to peak current. See “Typical Performance Curves” for more information.
10. RIN defaults to RS-485 mode (>15kΩ) when the device is unpowered (VCC = 0V), regardless of the state of the 485/232 pin.
11. VCC ≤ 5.25V.
12. The Slew pin has a pull-up resistor that enables only when in RS-485 mode (485/232 = VCC).
13. ON, RXEN, and DEN all simultaneously switched Low-to-High.
10
FN6201.1
December 20, 2005
ISL81387, ISL41387
Test Circuits and Waveforms
R
DEN
VCC
Y
DY
RD
D
VOD
Z
+
-
VCM
VOC
R
FIGURE 1. RS-485 DRIVER VOD AND VOC TEST CIRCUIT
3V
DY
1.5V
1.5V
0V
VCC
CL = 100pF
DEN
tPHL
VOH
Y
DY
tPLH
RDIFF
D
50%
OUT (Z)
Z
50%
VOL
CL = 100pF
tPLH
tPHL
SIGNAL
GENERATOR
VOH
OUT (Y)
50%
50%
VOL
tDLH
tDHL
90%
DIFF OUT (Z - Y)
+VOD
90%
0V
10%
0V
tR
10%
-VOD
tF
SKEW = |tPLH (Y or Z) - tPHL (Z or Y)|
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2A. TEST CIRCUIT
FIGURE 2. RS-485 DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DEN
Y
DY
ENABLED
500Ω
VCC
D
SIGNAL
GENERATOR
SW
Z
DEN
1.5V
GND
CL
0V
tZH
tZH(SHDN)
FOR SHDN TESTS, SWITCH ON AND DEN L- H SIMULTANEOUSLY
PARAMETER OUTPUT
RXEN
DY
SW
CL (pF)
tHZ
Y/Z
X
0/1
GND
15
tLZ
Y/Z
X
1/0
VCC
15
tZH
Y/Z
X
0/1
GND
100
3V
1.5V
OUT (Y, Z)
OUTPUT HIGH
tHZ
VOH - 0.5V VOH
2.3V
0V
tZL
tZL(SHDN)
OUT (Y, Z)
tLZ
VCC
tZL
Y/Z
X
1/0
VCC
100
2.3V
tZH(SHDN)
Y/Z
0
0/1
GND
100
OUTPUT LOW
tZL(SHDN)
Y/Z
0
1/0
VCC
100
FIGURE 3A. TEST CIRCUIT
VOL + 0.5V V
OL
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. RS-485 DRIVER ENABLE AND DISABLE TIMES
11
FN6201.1
December 20, 2005
ISL81387, ISL41387
Test Circuits and Waveforms (Continued)
RXEN
VCC
+1.5V
15pF
A
0V
R
B
B
0V
RA
0V
-1.5V
tPLH
tPHL
VCC
SIGNAL
GENERATOR
RA
1.5V
1.5V
0V
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4A. TEST CIRCUIT
FIGURE 4. RS-485 RECEIVER PROPAGATION DELAY
RXEN
A
R
SIGNAL
GENERATOR
ENABLED
1kΩ
RA
VCC
SW
B
GND
RXEN
1.5V
3V
1.5V
0V
15pF
tZH
tZH(SHDN)
FOR SHDN TESTS, SWITCH ON AND RXEN L- H SIMULTANEOUSLY
RA
PARAMETER
DEN
B
SW
tHZ
X
+1.5V
GND
tLZ
X
-1.5V
VCC
tZL
tZL(SHDN)
tZH
X
+1.5V
GND
RA
tZL
X
-1.5V
VCC
tZH(SHDN)
0
+1.5V
GND
tZL(SHDN)
0
-1.5V
VCC
OUTPUT HIGH
tHZ
VOH - 0.5V VOH
1.5V
0V
tLZ
VCC
1.5V
VOL + 0.5V V
OUTPUT LOW
OL
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5A. TEST CIRCUIT
FIGURE 5. RS-485 RECEIVER ENABLE AND DISABLE TIMES
VCC
3V
DEN
DY,Z
DY,Z
1.5V
1.5V
CL
Y, Z
0V
D
tDPHL
VO+
RL
SIGNAL
GENERATOR
tDPLH
OUT (Y,Z)
0V
0V
VO-
SKEW = |tDPHL - tDPLH|
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6A. TEST CIRCUIT
FIGURE 6. RS-232 DRIVER PROPAGATION DELAY
VCC
3V
RXEN
A, B
A, B
R
1.3V
1.7V
CL = 15pF
RA, RB
0V
tRPLH
tRPHL
SIGNAL
GENERATOR
2.4V
RA, RB
0.8V
VOH
VOL
SKEW = |tRPHL - tRPLH|
FIGURE 7A. TEST CIRCUIT
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. RS-232 RECEIVER PROPAGATION DELAY
12
FN6201.1
December 20, 2005
ISL81387, ISL41387
Detailed Description
on each bus. Because of the one driver per bus limitation,
RS-422 networks use a two bus, full duplex structure for
bidirectional communication, and the Rx inputs and Tx
outputs (no tri-state required) connect to different busses, as
shown in Figure 9. Tx and Rx enables aren’t required, so
connect RXEN and DEN to VCC through a 1kΩ resistor.
The ISLX1387 port supports dual protocols: RS-485/422,
and RS-232. RS-485 and RS-422 are differential (balanced)
data transmission standards for use in high speed (up to
20Mbps) networks, or long haul and noisy environments.
The differential signalling, coupled with RS-485’s
requirement for extended common mode range (CMR) of
+12V to -7V make these transceivers extremely tolerant of
ground potential differences, as well as voltages induced in
the cable by external fields. Both of these effects are real
concerns when communicating over the RS-485/422
maximum distance of 4000’ (1220m). It is important to note
that the ISLX1387 don’t follow the RS-485 convention
whereby the inverting I/O is labelled “B/Z”, and the
noninverting I/O is “A/Y”. Thus, in the application diagrams
below the 1387 A/Y (B/Z) pins connect to the B/Z (A/Y) pins
of the generic RS-485/422 ICs.
Conversely, RS-485 is a true multipoint standard, which
allows up to 32 devices (any combination of drivers- must be
tri-statable - and receivers) on each bus. Now bidirectional
communication takes place on a single bus, so the Rx inputs
and Tx outputs of a port connect to the same bus lines, as
shown in Figure 8. A port set to RS-485 /422 mode includes
one Rx and one Tx.
RS-232 is a point-to-point, singled ended (signal voltages
referenced to GND) communication protocol targeting fairly
short (<150’, 46m) and low data rate (<1Mbps) applications.
A port contains two transceivers (2 Tx and 2 Rx) in RS-232
mode.
RS-422 is typically a point-to-point (one driver talking to one
receiver on a bus), or a point-to-multipoint (multidrop)
standard that allows only one driver and up to 10 receivers
Protocol selection is handled via the 485/232 logic pin.
+
GENERIC 1/2 DUPLEX 485 XCVR
+5V
+
DI
+5V
B
GENERIC 1/2 DUPLEX 485 XCVR
+5V
D
+
0.1µF
VCC
GND
VCC
RO
R
B/Z
A
RXEN *
DE
R
0.1µF
VCC
R
RE
0.1µF
ISLX1387
RA
RO
RE
Tx/Rx
A/Y
DEN
DE
B/Z
Y
DI
DY
D
D
A/Y
Z
GND
RT
RT
GND
* QFN ONLY,
CONNECT RXEN TO GND
FIGURE 8. TYPICAL HALF DUPLEX RS-485 NETWORK
+
GENERIC 422 Rx (SLAVE)
RO
RE
GENERIC FULL DUPLEX 422 XCVR (SLAVE)
0.1µF
+5V
+
ISL81387 (MASTER)
1kΩ
+5V
R
0.1µF
+5V
VCC
+
GND
B
A
VCC
RT
VCC
D
0.1µF
Z
A
Y
B
DY
DEN
RXEN
RA
Z
RT
A
R
RO
R
DI
B
D
Y
GND
GND
FIGURE 9. TYPICAL RS-422 NETWORK
.
13
FN6201.1
December 20, 2005
ISL81387, ISL41387
ISLX1387 Advantages
Charge Pumps
These dual protocol ICs offer many parametric
improvements versus those offered on competing dual
protocol devices. Some of the major improvements are:
15kV Bus Pin ESD - Eases board level requirements;
2.7V Diff VOUT - Better Noise immunity and/or distance;
Full Failsafe RS-485 Rx - Eliminates bus biasing;
Selectable RS-485 Data Rate - Up to 20Mbps, or slew
rate limited for low EMI and fewer termination issues;
High RS-232 Data Rate - >460kbps
Lower Tx and Rx Skews - Wider, consistent bit widths;
Lower ICC - Max ICC is 2-4X lower than competition;
Flow-Thru Pinouts - Tx, Rx bus pins on one side/logic
pins on the other, for easy routing to connector/UART;
Smaller (SSOP and QFN) and Pb-free Packaging.
The on-chip charge pumps create the RS-232 transmitter
power supplies (typically +6/-7V) from a single supply as low
as 4.5V, and are enabled only if the port is configured for
RS-232 operation, and not in SHDN. The efficient design
requires only four small 0.1µF capacitors for the voltage
doubler and inverter functions. By operating discontinuously
(i.e., turning off as soon as V+ and V- pump up to the
nominal values), the charge pump contribution to RS-232
mode ICC is reduced significantly. Unlike competing devices
that require the charge pump in RS-485 mode, disabling the
charge pump saves power, and minimizes noise. If the
application is a dedicated RS-485 port, then the charge
pump capacitors aren’t even required.
RS-232 Mode
Drivers operate at data rates up to 650kbps, and are
guaranteed for data rates up to 460kbps. The charge pumps
and drivers are designed such that one driver can be
operated at the rated load, and at 460kbps (see Figure 33).
Figure 33 also shows that drivers can easily drive several
thousands of picofarads at data rates up to 250kbps, while
still delivering compliant ±5V output levels.
Rx Features
RS-232 receivers invert and convert RS-232 input levels
(±3V to ±25V) to the standard TTL/CMOS levels required by
a UART, ASIC, or µcontroller serial port. Receivers are
designed to operate at faster data rates than the drivers, and
they feature very low skews (10ns) so the receivers
contribute negligibly to bit width distortion. Inputs include the
standards required 3kΩ to 7kΩ pulldown resistor, so unused
inputs may be left unconnected. Rx inputs also have built-in
hysteresis to increase noise immunity, and to decrease
erroneous triggering due to slowly transitioning input signals.
Rx outputs are short circuit protected, and are tri-statable via
the active high RXEN pin, when the IC is shutdown (SHDN;
see Tables 2 and 3, and the “Low Power Shutdown” section),
or via the active low RXEN pin available on the QFN package
option (see “ISL41387 Special Features” for more details).
Tx Features
RS-232 drivers invert and convert the standard TTL/CMOS
levels from a UART, or µcontroller serial port to RS-232
compliant levels (±5V minimum). The Tx delivers these
compliant output levels even at data rates of 650kbps, and
with loads of 1000pF. The drivers are designed for low skew
(typically 12% of the 500kbps bit width), and are compliant to
the RS-232 slew rate spec (4 to 30V/µs) for a wide range of
load capacitances. Tx inputs float if left unconnected, and
may cause ICC increases. For the best results, connect
unused inputs to GND.
Tx outputs are short circuit protected, and incorporate a
thermal SHDN feature to protect the IC in situations of
severe power dissipation. See the RS-485 section for more
details. Drivers tri-state via the active high DEN pin, in SHDN
(see Tables 2 and 3, and the “Low Power Shutdown”
section), or when the 5V power supply is off.
14
Data Rates and Cabling
Receivers operate at data rates up to 2Mbps. They are
designed for a higher data rate to facilitate faster factory
downloading of software into the final product, thereby
improving the user’s manufacturing throughput.
Figures 36 and 37 illustrate driver and receiver waveforms at
250kbps, and 500kbps, respectively. For these graphs, one
driver drives the specified capacitive load, and a receiver.
RS-232 doesn’t require anything special for cabling; just a
single bus wire per transmitter and receiver, and another
wire for GND. So an ISLX1387 RS-232 port uses a five
conductor cable for interconnection. Bus terminations are
not required, nor allowed, by the RS-232 standard.
RS-485 Mode
Rx Features
RS-485 receivers convert differential input signals as small
as 200mV, as required by the RS-485 and RS-422
standards, to TTL/CMOS output levels. The differential Rx
provides maximum sensitivity, noise immunity, and common
mode rejection. Per the RS-485 standard, receiver inputs
function with common mode voltages as great as ±7V
outside the power supplies (i.e., +12V and -7V), making
them ideal for long networks where induced voltages are a
realistic concern. Each RS-485/422 port includes a single
receiver (RA), and the unused Rx output (RB) is disabled.
Worst case receiver input currents are 20% lower than the 1
“unit load” (1mA) RS-485 limit, which translates to a 15kΩ
minimum input resistance.
FN6201.1
December 20, 2005
ISL81387, ISL41387
These receivers include a “full fail-safe” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating), shorted together, or if the bus is
terminated but undriven (i.e., differential voltage collapses to
near zero due to termination). Failsafe with shorted, or
terminated and undriven inputs is accomplished by setting
the Rx upper switching point at -40mV, thereby ensuring that
the Rx recognizes a 0V differential as a high level.
All the Rx outputs are short circuit protected, and are tristatable via the active high RXEN pin, or when the IC is
shutdown (see Tables 2 and 3, and the “Low Power
Shutdown” section). ISL41387 (QFN) receiver outputs are
also tri-statable via an active low RXEN input (see
“ISL41387 Special Features” for more details).
For the ISL41387 (QFN), when using the active high RXEN
function, the RXEN pin may be left floating (internally pulled
high), or should be connected to VCC through a 1kΩ resistor.
If using the active low RXEN, then the RXEN pin must be
connected to GND.
Tx Features
The RS-485/422 driver is a differential output device that
delivers at least 2.2V across a 54Ω load (RS-485), and at
least 2.5V across a 100Ω load (RS-422). Both levels
significantly exceed the standards requirements, and these
exceptional output voltages increase system noise immunity,
and/or allow for transmission over longer distances. The
drivers feature low propagation delay skew to maximize bit
widths, and to minimize EMI.
To allow multiple drivers on a bus, the RS-485 spec requires
that drivers survive worst case bus contentions undamaged.
The ISLX1387 drivers meet this requirement via driver
output short circuit current limits, and on-chip thermal
shutdown circuitry. The output stages incorporate current
limiting circuitry that ensures that the output current never
exceeds the RS-485 spec, even at the common mode
voltage range extremes. In the event of a major short circuit
condition, devices also include a thermal shutdown feature
that disables the drivers whenever the die temperature
becomes excessive. This eliminates the power dissipation,
allowing the die to cool. The drivers automatically re-enable
after the die temperature drops about 15 degrees. If the
contention persists, the thermal shutdown/re-enable cycle
repeats until the fault is cleared. Receivers stay operational
during thermal shutdown.
RS-485 multi-driver operation also requires drivers to include
tri-state functionality, so the port has a DEN pin to control
this function. If the driver is used in an RS-422 network, such
that driver tri-state isn’t required, then the DEN pin should
connect to VCC through a 1kΩ resistor. Drivers are also tristated when the IC is in SHDN, or when the 5V power supply
is off.
15
Speed Options
The ISL81387 (SOIC/SSOP) features two speed options
that are user selectable via the SLEW pin: a high slew rate
setting optimized for 20Mbps data rates (Fast), and a slew
rate limited option for operation up to 460kbps (Med). The
ISL41387 (QFN) offers an additional, more slew rate limited,
option for data rates up to 115kbps (Slow). See the “Data
Rate“ and “Slew Rate Limited Data Rates” sections for more
information.
Receiver performance is the same for all three speed
options.
Data Rate, Cables, and Terminations
RS-485/422 are intended for network lengths up to 4000’
(1220m), but the maximum system data rate decreases as
the transmission length increases. Devices operating at the
maximum data rate of 20Mbps are limited to lengths of 2030’ (6-9m), while devices operating at or below 115kbps can
operate at the maximum length of 4000’ (1220m).
Higher data rates require faster edges, so both the
ISLX1387 versions offer an edge rate capable of 20Mbps
data rates. They both have a second option for 460kbps, but
the ISL41387 also offers another, very slew rate limited,
edge rate to minimize problems at slow data rates.
Nevertheless, for the best jitter performance when driving
long cables, the faster speed settings may be preferable,
even at low data rates. See the “RS-485 Slew Rate Limited
Data Rates” section for details.
Twisted pair is the cable of choice for RS-485/422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode
signals, which are effectively rejected by the differential
receivers in these ICs.
The preferred cable connection technique is “daisychaining”, where the cable runs from the connector of one
device directly to the connector of the next device, such that
cable stub lengths are negligible. A “backbone” structure,
where stubs run from the main backbone cable to each
device’s connector, is the next best choice, but care must be
taken to ensure that each stub is electrically “short”. See
Table 4 for recommended maximum stub lengths for each
speed option.
TABLE 4. RECOMMENDED STUB LENGTHS
SPEED OPTION
MAXIMUM STUB LENGTH
ft (m)
SLOW
350-500 (107-152)
MED
100-150 (30.5 - 46)
FAST
1-3 (0.3 - 0.9)
FN6201.1
December 20, 2005
ISL81387, ISL41387
In point-to-point, or point-to-multipoint (RS-422) networks,
the main cable should be terminated in its characteristic
impedance (typically 120Ω) at the end farthest from the
driver. In multi-receiver applications, stubs connecting
receivers to the main cable should be kept as short as
possible, but definitely shorter than the limits shown in Table
4. Multipoint (RS-485) systems require that the main cable
be terminated in its characteristic impedance at both ends.
Again, keep stubs connecting a transceiver to the main
cable as short as possible, and refer to Table 4. Avoid “star”,
and other configurations, where there are many “ends”
which would require more than the two allowed terminations
to prevent reflections.
High ESD
All pins on the ISLX1387 include ESD protection structures
rated at ±4kV (HBM), which is good enough to survive ESD
events commonly seen during manufacturing. But the bus
pins (Tx outputs and Rx inputs) are particularly vulnerable to
ESD events because they connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can destroy an unprotected port.
ISLX1387 bus pins are fitted with advanced structures that
deliver ESD protection in excess of ±15kV (HBM), without
interfering with any signal in the RS-485 or the RS-232
range. This high level of protection may eliminate the need
for board level protection, or at the very least will increase
the robustness of any board level scheme.
Small Packages
Many competing dual protocol ICs are available only in
monstrously large 24 to 28 Ld SOIC packages. The
ISL81387’s 20 Ld SSOP is more than 50% smaller than
even a 24 Ld SOIC, and the ISL41387’s tiny 6x6mm QFN is
80% smaller than a 28 Ld SOIC.
Flow Through Pinouts
Even the ISLX1387 pinouts are features, in that the “flowthrough” design simplifies board layout. Having the bus pins
all on one side of the package for easy routing to a cable
connector, and the Rx outputs and Tx inputs on the other
side for easy connection to a UART, avoids costly and
problematic crossovers. Figure 10 illustrates the flowthrough nature of the pinout.
Low Power Shutdown (SHDN) Mode
The ISLX1387 enter the SHDN mode when ON = 0, and the
Tx and Rx are disabled (DEN = 0, RXEN = 0, and RXEN =
1), and the already low supply current drops to as low as
5µA. SHDN disables the Tx and Rx outputs, and disables
16
the charge pumps if the port is in RS-232 mode, so V+
collapses to VCC, and V- collapses to GND.
All but 5µA of SHDN ICC current is due to control input (SPB,
SLEW, RXEN) pull-up resistors (~20µA/resistor), so SHDN
ICC varies depending on the ISLX1387 configuration. The
spec tables indicate the worst case values, but careful
selection of the configuration yields lower currents. For
example, in RS-232 mode the SPB pin isn’t used, so floating
it or tying it high minimizes SHDN ICC.
ISL81387
CONNECTOR
Proper termination is imperative to minimize reflections
when using the 20Mbps speed option. Short networks using
the medium and slow speed options need not be terminated,
but terminations are recommended unless power dissipation
is an overriding concern. Note that the RS-485 spec allows a
maximum of two terminations on a network, otherwise the Tx
output voltage may not meet the required VOD.
A
B
Y
Z
R
RA
D
DY
UART
OR
ASIC
OR
µCONTROLLER
FIGURE 10. ILLUSTRATION OF FLOW THROUGH PINOUT
On the ISL41387, the SHDN ICC increases as VL
decreases. VL powers each control pin input stage and sets
its VOH at VL rather than VCC. VCC powers the second
stage, but the second stage input isn’t driven to the rail, so
some ICC current flows. See Figure 20 for details.
When enabling from SHDN in RS-232 mode, allow at least
20µs for the charge pumps to stabilize before transmitting
data. If fast enables are required, and ICC isn’t the greatest
concern, disable the drivers with the DEN pin to keep the
charge pumps active. The charge pumps aren’t used in
RS-485 mode, so the transceiver is ready to send or receive
data in less than 1µs, which is much faster than competing
devices that require the charge pump for all modes of
operation.
Internal Loopback Mode
Setting ON = 0, DEN = 1, and RXEN = 1 or RXEN = 0 (QFN
only), places the port in the loopback mode, a mode that
facilitates implementing board level self test functions. In
loopback, internal switches disconnect the Rx inputs from
the Rx outputs, and feed back the Tx outputs to the
appropriate Rx output. This way the data driven at the Tx
input appears at the corresponding Rx output (refer to
“Typical Operating Circuits”). The Tx outputs remain
connected to their terminals, so the external loads are
reflected in the loopback performance. This allows the
loopback function to potentially detect some common bus
faults such as one or both driver outputs shorted to GND, or
outputs shorted together.
Note that the loopback mode uses an additional set of
receivers, as shown in the “Typical Operating Circuits”.
FN6201.1
December 20, 2005
ISL81387, ISL41387
These loopback receivers are not standards compliant, so
the loopback mode can’t be used to implement a half-duplex
RS-485 transceiver.
various VL values so the user can ascertain whether or not a
particular VL voltage meets his needs.
TABLE 5. VIH AND VIL vs. VL FOR VCC = 5V
ISL41387 (QFN Package) Special Features
VL (V)
VIH (V)
VIL (V)
Logic Supply (VL Pin)
1.65V
0.79
0.50
1.8V
0.82
0.60
2.0V
0.87
0.69
2.5V
0.99
0.86
3.3V
1.19
1.05
The ISL41387 (QFN) includes a VL pin that powers the logic
inputs (Tx inputs and control pins) and Rx outputs. These
pins interface with “logic” devices such as UARTs, ASICs,
and µcontrollers, and today most of these devices use power
supplies significantly lower than 5V. Thus, a 5V output level
from a 5V powered dual protocol IC might seriously
overdrive and damage the logic device input. Similarly, the
the logic device’s low VOH might not exceed the VIH of a 5V
powered dual protocol input. Connecting the VL pin to the
power supply of the logic device - as shown in Figure 11 limits the ISL41387’s Rx output VOH to VL (see Figure 14),
and reduces the Tx and control input switching points to
values compatible with the logic device output levels.
Tailoring the logic pin input switching points and output levels
to the supply voltage of the UART, ASIC, or µcontroller
eliminates the need for a level shifter/translator between the
two ICs.
VCC = +5V
VCC = +2V
The VL supply current (IL) is typically less than 60µA, as
shown in Figures 19 and 20. All of the DC VL current is due
to inputs with internal pull-up resistors (SPB, SLEW, RXEN)
being driven to the low input state. The worst case IL current
occurs when all three of the inputs are low (see Figure 19),
due to the IL through the pull-up resistors. IIL through an
input pull-up resistor is ~20µA, so the IL in Figure 19 drops
by about 40µA (at VL = 5V) when the SPB is high and 232
mode disables the SLEW pin pull-up (middle vs. top curve).
When all three inputs are driven high, IL drops to ~10nA, so
to minimize power dissipation drive these inputs high when
unneeded (e.g., SPB isn’t used in RS-232 mode, so drive it
high).
Active Low Rx Enable (RXEN)
RA
VOH = 5V
RXD
VIH ≥ 2V
DY
VOH ≤ 2V
ESD
DIODE
TXD
GND
GND
ISL81387
UART/PROCESSOR
VCC = +5V
VCC = +2V
In many RS-485 applications, especially half duplex
configurations, users like to accomplish “echo cancellation”
by disabling the corresponding receiver while its driver is
transmitting data. This function is available on the QFN
package via an active low RXEN pin. The active low function
also simplifies direction control, by allowing a single Tx/Rx
direction control line. If the active high RXEN were used,
either two valuable I/O pins would be used for direction
control, or an external inverter is required between DEN and
RXEN. Figure 12 details the advantage of using the RXEN
pin. When using RXEN, ensure that RXEN is tied to GND.
RS-485 Slew Rate Limited Data Rates
VL
RA
VOH = 2V
RXD
VIH = 0.9V
DY
VOH ≤ 2V
GND
ESD
DIODE
TXD
GND
ISL41387
UART/PROCESSOR
FIGURE 11. USING VL PIN TO ADJUST LOGIC LEVELS
VL can be anywhere from VCC down to 1.65V, but the input
switching points may not provide enough noise margin when
VL < 1.8V. Table 5 indicates typical VIH and VIL values for
17
The ISLX1387 FAST speed option (SLEW = High) utilizes Tx
output transitions optimized for a 20Mbps data rate. These
fast edges may increase EMI and reflection issues, even
though fast transitions aren’t required at the lower data rates
used by many applications. With the SLEW pin low, both
product types switch to a moderately slew rate limited output
transition targeted for 460kbps (MED) data rates. The
ISL41387 (QFN version) offers an additional, slew rate
limited data rate that is optimized for 115kbps (SLOW), and
is selected when SLEW = 0 and SPB = 0 (see Table 3). The
slew limited edges permit longer unterminated networks, or
longer stubs off terminated busses, and help minimize EMI
and reflections. Nevertheless, for the best jitter performance
when driving long cables, the faster speed options may be
preferable, even at lower data rates. The faster output
transitions deliver less variability (jitter) when loaded with the
FN6201.1
December 20, 2005
ISL81387, ISL41387
1kΩ
OR NC
ISL41387 +5V
+
RXEN *
RA
B
R
A
RXEN
Tx/Rx
0.1µF
VCC
DEN
Y
DY
Z
D
GND
ACTIVE HIGH RX ENABLE
ISL41387 +5V
+
VCC
RXEN
RA
R
0.1µF
B
RXEN *
A
DEN
Y
Tx/Rx
DY
D
Z
GND
* QFN ONLY
ACTIVE LOW RX ENABLE
FIGURE 12. USING ACTIVE LOW vs ACTIVE HIGH RX
ENABLE
large capacitance associated with long cables. Figures 42,
43, and 44 detail the jitter performance of the three speed
options while driving three different cable lengths. The
figures show that under all conditions the faster the edge
rate, the better the jitter performance. Of course, faster
transitions require more attention to ensuring short stub
lengths, and quality terminations, so there are trade-offs to
be made. Assuming a jitter budget of 10%, it is likely better
to go with the slow speed option for data rates of 115kbps or
less, to minimize fast edge effects. Likewise, the medium
speed option is a good choice for data rates between
115kbps and 460kbps. For higher data rates, or when the
absolute best jitter is required, use the high speed option.
Evaluation Board
An evaluation board, part number ISL41387EVAL1, is
available to assist in assessing the dual protocol IC’s
performance. The evaluation board contains a QFN
packaged device, but because the same die is used in all
packages, the board is also useful for evaluating the
functionality of the other versions. The board’s design allows
for evaluation of all standard features, plus the QFN specific
features. Refer to the eval board application note for details,
and contact your sales rep for ordering information.
18
FN6201.1
December 20, 2005
ISL81387, ISL41387
Typical Performance Curves
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified
5
50
40
VOL, 85°C
30
20
VOH, 25°C
VOH, 85°C
10
4
HIGH OUTPUT VOLTAGE (V)
RECEIVER OUTPUT CURRENT (mA)
VOL, 25°C
3
IOH = -1mA
2
IOH = -8mA
1
IOH = -4mA
0
0
0
1
2
3
4
5
0
1
2
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 13. RECEIVER OUTPUT CURRENT vs RECEIVER
OUTPUT VOLTAGE
5
3.6
DIFFERENTIAL OUTPUT VOLTAGE (V)
90
DRIVER OUTPUT CURRENT (mA)
4
FIGURE 14. RECEIVER HIGH OUTPUT VOLTAGE vs LOGIC
SUPPLY VOLTAGE (VL)
100
80
70
60
50
40
30
20
10
0
3
VL (V)
0
1
2
3
4
DIFFERENTIAL OUTPUT VOLTAGE (V)
3.5
RDIFF = 100Ω
3.4
3.3
3.2
RDIFF = 54Ω
3.1
3
-40
5
-25
0
25
50
85
75
TEMPERATURE (°C)
FIGURE 16. RS-485, DRIVER DIFFERENTIAL OUTPUT
VOLTAGE vs TEMPERATURE
FIGURE 15. RS-485, DRIVER OUTPUT CURRENT vs
DIFFERENTIAL OUTPUT VOLTAGE
150
4
RS-232, RXEN, RXEN, ON = X, DEN = VCC
Y OR Z = LOW
100
FULL TEMP RANGE
3.5
3
50
ICC (mA)
OUTPUT CURRENT (mA)
RS-232, RXEN, RXEN = X, ON = VCC, DEN = GND
0
Y OR Z = HIGH
-50
2.5
2
RS-485, HALF DUPLEX, DEN = VCC, RXEN, RXEN, ON = X
25°C
85°C
1.5
-100
-40°C
-150
-7 -6
-4
-2
0
2
4
6
OUTPUT VOLTAGE (V)
8
10
12
FIGURE 17. RS-485, DRIVER OUTPUT CURRENT vs SHORT
CIRCUIT VOLTAGE
19
1
-40
RS-485, FULL DUPLEX, DEN = VCC, RXEN, RXEN, ON = X
RS-485, DEN = GND, RXEN, RXEN = X, ON = VCC
-25
0
25
50
75
85
TEMPERATURE (°C)
FIGURE 18. SUPPLY CURRENT vs TEMPERATURE
FN6201.1
December 20, 2005
ISL81387, ISL41387
Typical Performance Curves
500
10m
NO LOAD
VIN = VL or GND
DEN, RXEN, ON = GND
1m
100µ
VL ≤ VCC
DEN, RXEN, DY, DZ/SLEW, ON = GND
NO LOAD
VIN = VL or GND
RXEN = VL
RS-232/RS-485 ICC
VL > VCC
400
RS-485, SLEW, SPB, RXEN = GND
ICC and IL (mA)
IL (A)
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified (Continued)
10µ
RS-232, RXEN = GND, SPB = VL
1µ
300
200
100n
100
RS-232, SPB, RXEN = VL or
10n
RS-485, SLEW, SPB, RXEN = VL
1n
2
3
SPB = VL
RS-232 IL
SPB = GND
RS-485 IL
0
4
5
2
6
2.5
3
3.5
VL (V)
VL (V)
FIGURE 19. RS-232, VL SUPPLY CURRENT vs VL VOLTAGE
(QFN ONLY)
4
4.5
5
FIGURE 20. VCC and VL SHDN SUPPLY CURRENTS vs VL
VOLTAGE (QFN ONLY)
400
1700
RDIFF = 54Ω, CL = 100pF
RDIFF = 54Ω, CL = 100pF
350
|tPHLZ - tPLHY|
300
1600
|tPLHZ - tPHLY|
250
tDHL
1550
SKEW (ns)
PROPAGATION DELAY (ns)
1650
tDLH
1500
150
100
tDHL
1450
200
|tDLH - tDHL|
50
1400
-40
0
-25
50
25
75
-40
85
0
-25
FIGURE 21. RS-485, DRIVER PROPAGATION DELAY vs
TEMPERATURE (SLOW DATA RATE, QFN ONLY)
75
85
120
RDIFF = 54Ω, CL = 100pF
RDIFF = 54Ω, CL = 100pF
100
540
530
|tPHLZ - tPLHY|
80
520
tDHL
510
SKEW (ns)
PROPAGATION DELAY (ns)
50
FIGURE 22. RS-485, DRIVER SKEW vs TEMPERATURE
(SLOW DATA RATE, QFN ONLY)
560
550
25
TEMPERATURE (°C)
TEMPERATURE (°C)
tDLH
500
tDHL
490
60
|tPLHZ - tPHLY|
40
20
480
470
-40
|tDLH - tDHL|
-25
0
25
50
75
TEMPERATURE (°C)
FIGURE 23. RS-485, DRIVER PROPAGATION DELAY vs
TEMPERATURE (MEDIUM DATA RATE, QFN
ONLY)
20
85
0
-40
-25
0
25
TEMPERATURE (°C)
50
75
85
FIGURE 24. RS-485, DRIVER SKEW vs TEMPERATURE
(MEDIUM DATA RATE, QFN ONLY)
FN6201.1
December 20, 2005
ISL81387, ISL41387
Typical Performance Curves
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified (Continued)
2.5
40
RDIFF = 54Ω, CL = 100pF
2
35
|tDLH - tDHL|
1.5
tDHL
30
SKEW (ns)
tDLH
25
1
|tPLHZ - tPHLY|
0.5
-25
0
25
50
|tPHLZ - tPLHY|
0
-40
-25
85
75
TEMPERATURE (°C)
0
RA
0
5
4
3
2
RECEIVER OUTPUT (V)
5
DRIVER INPUT (V)
RDIFF = 60Ω, CL = 100pF
5
Y
Z
1
0
5
DY
0
0
DRIVER OUTPUT (V)
5
4
3
2
1
Y
Z
0
TIME (200ns/DIV)
FIGURE 29. RS-485, DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (MEDIUM DATA RATE, QFN ONLY)
21
0
5
RA
0
5
4
3
2
1
Z
Y
0
FIGURE 28. RS-485, DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (SLOW DATA RATE, QFN ONLY)
RECEIVER OUTPUT (V)
5
DRIVER INPUT (V)
RECEIVER OUTPUT (V)
DRIVER OUTPUT (V)
RDIFF = 60Ω, CL = 100pF
RA
85
75
TIME (400ns/DIV)
FIGURE 27. RS-485, DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (SLOW DATA RATE, QFN ONLY)
5
50
RDIFF = 60Ω, CL = 100pF
TIME (400ns/DIV)
DY
25
FIGURE 26. RS-485, DRIVER SKEW vs TEMPERATURE
(FAST DATA RATE)
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
FIGURE 25. RS-485, DRIVER PROPAGATION DELAY vs
TEMPERATURE (FAST DATA RATE)
DY
0
TEMPERATURE (°C)
DRIVER INPUT (V)
20
-40
RDIFF = 60Ω, CL = 100pF
5
DY
5
0
RA
DRIVER INPUT (V)
PROPAGATION DELAY (ns)
RDIFF = 54Ω, CL = 100pF
0
5
4
3
Z
2
1
Y
0
TIME (200ns/DIV)
FIGURE 30. RS-485, DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (MEDIUM DATA RATE, QFN ONLY)
FN6201.1
December 20, 2005
ISL81387, ISL41387
DY
0
5
RA
0
5
4
3
2
Y
Z
1
0
RDIFF = 60Ω, CL = 100pF
5
DY
5
0
RA
DRIVER INPUT (V)
5
RECEIVER OUTPUT (V)
RDIFF = 60Ω, CL = 100pF
DRIVER INPUT (V)
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified (Continued)
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
Typical Performance Curves
0
5
4
Z
3
2
Y
1
0
TIME (10ns/DIV)
TIME (10ns/DIV)
FIGURE 31. RS-485, DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (FAST DATA RATE)
FIGURE 32. RS-485, DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (FAST DATA RATE)
7.5
VOUT+
5
2.5
ALL TOUTS LOADED WITH 3kΩ TO GND
500kbps
0
1 TRANSMITTER AT 250kbps or 500kbps,
OTHER TRANSMITTER AT 30kbps
-2.5
500kbps
-5
VOUT -7.5
250kbps
0
1000
2000
3000
4000
5000
TRANSMITTER OUTPUT VOLTAGE (V)
250kbps
RS-232 REGION OF NONCOMPLIANCE
TRANSMITTER OUTPUT VOLTAGE (V)
7.5
5
VOUT+
2.5
OUTPUTS STATIC
ALL TOUTS LOADED WITH 3kΩ TO GND
0
-2.5
-5
VOUT -
-7.5
-40
-25
LOAD CAPACITANCE (pF)
FIGURE 33. RS-232, TRANSMITTER OUTPUT VOLTAGE vs
LOAD CAPACITANCE
0
25
TEMPERATURE (°C)
50
75
85
FIGURE 34. RS-232, TRANSMITTER OUTPUT VOLTAGE vs
TEMPERATURE
40
TRANSMITTER OUTPUT CURRENT (mA)
30
5
Y or Z = LOW
20
0
10
CL = 3500pF, 2 CHANNELS SWITCHING
DY
5
VOUT SHORTED TO GND
0
0
-10
-5
-20
5
Y/A
Y or Z = HIGH
-30
-40
-40
-25
0
25
50
0
75
85
RA
2µs/DIV.
TEMPERATURE (°C)
FIGURE 35. RS-232, TRANSMITTER SHORT CIRCUIT
CURRENT vs TEMPERATURE
22
FIGURE 36. RS-232, TRANSMITTER AND RECEIVER
WAVEFORMS AT 250kbps
FN6201.1
December 20, 2005
ISL81387, ISL41387
Typical Performance Curves
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified (Continued)
60
VIN = ±5V
5
RECEIVER + DUTY CYCLE (%)
CL = 1000pF, 2 CHANNELS SWITCHING
DY
0
5
0
Y/A
-5
5
RA
FULL TEMP RANGE
58
56
54
SR IN = 15V/µs
52
SR IN = 100V/µs
50
0
48
500
50
1000
FIGURE 37. RS-232, TRANSMITTER AND RECEIVER
WAVEFORMS AT 500kbps
ALL TOUTS LOADED WITH 5kΩ TO GND
800
700
2 TRANSMITTERS AT 25°C
1 TRANSMITTER AT 25°C
500
400
300
200
1 TRANSMITTER AT 85°C
2 TRANSMITTERS AT 85°C
100
100
1000
2000
3000
LOAD CAPACITANCE (pF)
4000
VOUT+
5
25°C
85°C
2.5
2 TRANSMITTERS SWITCHING
0
ALL TOUTS LOADED WITH 5kΩ TO GND, CL = 1000pF
-2.5
85°C
-5
VOUT -
25°C
-7.5
5000
0
100
200
300
400
500
600
700
RS-232 REGION OF NONCOMPLIANCE
1000
DATA RATE (kbps)
7.5
VOUT ≥ ±4V
600
2000
FIGURE 38. RS-232, RECEIVER OUTPUT +DUTY CYCLE vs
DATA RATE
TRANSMITTER OUTPUT VOLTAGE (V)
1100
900
1500
DATA RATE (kbps)
1µs/DIV.
800
DATA RATE (kbps)
FIGURE 39. RS-232, TRANSMITTER MAXIMUM DATA RATE vs
LOAD CAPACITANCE
FIGURE 40. RS-232, TRANSMITTER OUTPUT VOLTAGE vs
DATA RATE
100
450
2 TRANSMITTERS SWITCHING
400
ALL TOUTS LOADED WITH 3kΩ TO GND, CL = 1000pF
FAST
10
JITTER (%)
350
SKEW (ns)
MED
SLOW
85°C
300
250
1
25°C
200
150
50
DOUBLE TERM’ED WITH 121Ω
0.1
150
250
350
450
550
650
750
DATA RATE (kbps)
FIGURE 41. RS-232, TRANSMITTER SKEW vs DATA RATE
23
32 100
200
300
400
500
600
700
800
900 1000
DATA RATE (kbps)
FIGURE 42. RS-485, TRANSMITTER JITTER vs DATA RATE
WITH 2000’ CAT 5 CABLE
FN6201.1
December 20, 2005
ISL81387, ISL41387
Typical Performance Curves
VCC = VL = 5V, TA = 25°C; Unless Otherwise Specified (Continued)
100
100
SLOW
SLOW
MED
MED
10
FAST
1
DOUBLE TERM’ED WITH 121Ω
0.1
32 100
200
300
400
500
600
700
800
900 1000
DATA RATE (kbps)
FIGURE 43. RS-485, TRANSMITTER JITTER vs DATA RATE
WITH 1000’ CAT 5 CABLE
JITTER (%)
JITTER (%)
10
FAST
1
DOUBLE TERM’ED WITH 121Ω
0.1
32 100
200
300
400
500
600
700
800
900 1000
DATA RATE (kbps)
FIGURE 44. RS-485, TRANSMITTER JITTER vs DATA RATE
WITH 350’ CAT 5 CABLE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
2490
PROCESS:
BiCMOS
24
FN6201.1
December 20, 2005
ISL81387, ISL41387
Small Outline Plastic Packages (SOIC)
M20.3 (JEDEC MS-013-AC ISSUE C)
20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
N
INDEX
AREA
H
0.25(0.010) M
B M
INCHES
E
-B-
1
2
3
L
SEATING PLANE
-A-
A
D
h x 45°
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.014
0.019
0.35
0.49
9
C
0.0091
0.0125
0.23
0.32
-
D
0.4961
0.5118
12.60
13.00
3
E
0.2914
0.2992
7.40
7.60
4
e
α
B S
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
0.050 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
N
α
NOTES:
MILLIMETERS
20
0°
20
8°
0°
7
8°
Rev. 2 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
25
FN6201.1
December 20, 2005
ISL81387, ISL41387
Shrink Small Outline Plastic Packages (SSOP)
N
INDEX
AREA
M20.209 (JEDEC MO-150-AE ISSUE B)
H
0.25(0.010) M
E
2
INCHES
3
0.25
0.010
SEATING PLANE
-A-
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
GAUGE
PLANE
-B1
B M
A
D
-C-
α
e
A1
B
0.25(0.010) M
L
A2
C
0.10(0.004)
C A M
B S
SYMBOL
MIN
MAX
MIN
MAX
A
0.068
0.078
1.73
1.99
A1
0.002
0.008’
0.05
0.21
A2
0.066
0.070’
1.68
1.78
B
0.010’
0.015
0.25
0.38
0.004
0.008
0.09
0.20’
D
0.278
0.289
7.07
7.33
3
E
0.205
0.212
5.20’
5.38
4
e
0.026 BSC
H
0.301
L
0.025
α
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
NOTES
C
N
NOTES:
MILLIMETERS
0.65 BSC
0.311
7.65
0.037
0.63
20
0 deg.
9
7.90’
6
0.95
20
8 deg.
0 deg.
7
8 deg.
Rev. 3 11/02
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess
of “B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
26
FN6201.1
December 20, 2005
ISL81387, ISL41387
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L40.6x6
40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220VJJD-2 ISSUE C)
MILLIMETERS
SYMBOL
MIN
NOMINAL
MAX
NOTES
A
0.80
0.90
1.00
-
A1
-
-
0.05
-
A2
-
-
1.00
A3
b
0.18
D
0.23
9
0.30
5, 8
6.00 BSC
D1
D2
9
0.20 REF
-
5.75 BSC
3.95
4.10
9
4.25
7, 8
E
6.00 BSC
-
E1
5.75 BSC
9
E2
3.95
e
4.10
4.25
7, 8
0.50 BSC
-
k
0.25
-
-
-
L
0.30
0.40
0.50
8
L1
-
-
0.15
10
N
40
2
Nd
10
3
Ne
10
3
P
-
-
0.60
9
θ
-
-
12
9
Rev. 1 10/02
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
27
FN6201.1
December 20, 2005