INTERSIL ISL3178AEMBZ

ISL3178AE
®
Data Sheet
May 6, 2009
±15kV ESD Protected, 3.3V, Full Fail-Safe,
Low Power, High Speed or Slew Rate
Limited, RS-485/RS-422 Transceivers
The Intersil ISL3178AE is ±15kV IEC61000 ESD Protected,
3.3V-powered, single transceivers that meet both the
RS-485 and RS-422 standards for balanced communication.
This device has very low bus currents (+125mA/-100mA),
which presents a true “1/8 unit load” to the RS-485 bus. This
allows up to 256 transceivers on the network without violating
the RS-485 specification’s 32 unit load maximum, and without
using repeaters. For example, in a remote utility meter reading
system, individual meter readings are routed to a concentrator
via an RS-485 network, so the high allowed node count
minimizes the number of repeaters required.
FN6887.1
Features
• IEC61000 ESD Protection on RS-485 I/O Pins . . . . ±15kV
- Class 3 ESD Level on all Other Pins . . . . . . >7kV HBM
• Full Fail-safe (Open, Short, Terminated/Floating)
Receivers
• Hot Plug - Tx and Rx Outputs Remain Three-state During
Power-up (Only Versions with Output Enable Pins)
• True 1/8 Unit Load Allows up to 256 Devices on the Bus
• Single 3.3V Supply
• High Data Rates . . . . . . . . . . . . . . . . . . . . . . up to 10Mbps
• Low Quiescent Supply Current . . . . . . . . . . .800µA (Max)
- Ultra Low Shutdown Supply Current . . . . . . . . . . .10nA
Receiver (Rx) inputs feature a “Full Fail-Safe” design, which
ensures a logic high Rx output if Rx inputs are floating,
shorted, or terminated but undriven.
• -7V to +12V Common Mode Input/Output Voltage Range
Hot Plug circuitry ensures that the Tx and Rx outputs remain
in a high impedance state while the power supply stabilizes.
• Three State Rx and Tx Outputs Available
The ISL3178AE is a half duplex version. It multiplexes the
Rx inputs and Tx outputs to allow transceivers with output
disable functions in an 8 Ld package.
• Pb-Free (RoHS Compliant)
• Half Duplex Pinouts
• Current Limiting for Driver Overload Protection
Applications
• Automated Utility Meter Reading Systems
Pinout
• High Node Count Systems
ISL3178AE
(8 LD SOIC)
TOP VIEW
• Field Bus Networks
• Security Camera Networks
RO 1
8
VCC
RE 2
7
B/Z
DE 3
6
A/Y
5
GND
DI 4
R
D
• Building Environmental Control/ Lighting Systems
• Industrial/Process Control Networks
TABLE 1. SUMMARY OF FEATURES
HALF/FUL
L DUPLEX
DATA RATE
(Mbps)
SLEWRATE
LIMITED?
HOT
PLUG?
#
DEVICES
ON BUS
RX/TX
ENABLE?
QUIESCENT
ICC (µA)
LOW POWER
SHUTDOWN?
PIN
COUNT
ISL3178AEM
HALF
10
NO
YES
256
YES
510
YES
8
ISL3178AEMW
HALF
10
NO
YES
256
YES
510
YES
N/A
PART
NUMBER
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL3178AE
Ordering Information
PART
NUMBER
(Note)
Truth Tables (continued)
TEMP.
RANGE
(°C)
PART
MARKING
RECEIVING
PACKAGE
(Pb-Free)
ISL3178AEMBZ* 3178A EMBZ -55 to +125 8 Ld SOIC
ISL3178AEMW
-55 to +125
PKG.
DWG. #
M8.15
INPUTS
RE
Wafer
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish,
which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
DE
DE
Half Duplex Full Duplex
OUTPUT
A-B
RO
0
0
X
≥ -0.05V
1
0
0
X
≤ -0.2V
0
0
0
X
Inputs
Open/Shorted
1
1
0
0
X
High-Z *
1
1
1
X
High-Z
NOTE: *Shutdown Mode (see Note 7)
Truth Tables
TRANSMITTING
INPUTS
OUTPUTS
RE
DE
DI
Z
Y
X
1
1
0
1
X
1
0
1
0
0
0
X
High-Z
High-Z
1
0
X
High-Z *
High-Z *
NOTE: *Shutdown Mode (see Note 7)
Pin Descriptions
PIN
FUNCTION
RO
Receiver output: If A-B ≥ -50mV, RO is high; If A-B ≤ -200mV, RO is low; RO = High if A and B are unconnected (floating) or shorted.
RE
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. If the Rx enable function isn’t
required, connect RE directly to GND or through a 1kΩ to 3kΩ resistor to GND.
DE
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and are high impedance when DE is low. If the
Tx enable function isn’t required, connect DE to VCC through a 1kΩ to 3kΩ resistor.
DI
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.
GND
Ground connection.
A/Y
±15kV IEC61000 ESD Protected RS-485/422 level, noninverting receiver input and noninverting driver output. Pin is an input if
DE = 0; pin is an output if DE = 1.
B/Z
±15kV IEC61000 ESD Protected RS-485/422 level, Inverting receiver input and inverting driver output. Pin is an input if DE = 0;
pin is an output if DE = 1.
VCC
System power supply input (3.0V to 3.6V).
2
FN6887.1
May 6, 2009
ISL3178AE
Typical Application Circuit
ISL3178AE
+3.3V
+3.3V
+
8
0.1µF
0.1µF
+
8
VCC
1 RO
VCC
R
D
2 RE
B/Z
7
3 DE
A/Y
6
4 DI
RT
RT
7
B/Z
DE 3
6
A/Y
RE 2
R
D
GND
GND
5
5
3
DI 4
RO 1
FN6887.1
May 6, 2009
ISL3178AE
Absolute Maximum Ratings
Thermal Information
VCC to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input/Output Voltages
A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +13V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V)
Short Circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . .
120
Maximum Junction Temperature (Plastic Package) . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . .-55°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = +25°C,
(Note 2). Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified.
Temperature limits established by characterization and are not production tested.
PARAMETER
TEMP
(°C)
MIN
TYP
MAX
UNITS
RL = 100Ω (RS-422) (Figure 1A, Note 11)
Full
2
2.3
-
V
RL = 54Ω (RS-485) (Figure 1A)
Full
1.5
2
VCC
V
-
-
VCC
SYMBOL
TEST CONDITIONS
DC CHARACTERISTICS
Driver Differential VOUT
VOD
No Load
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
Driver Common-Mode VOUT
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
RL = 60Ω, -7V ≤ VCM ≤ 12V (Figure 1B)
Full
1.5
2.2
-
V
ΔVOD
RL = 54Ω or 100Ω (Figure 1A)
Full
-
0.01
0.2
V
VOC
RL = 54Ω or 100Ω (Figure 1A)
Full
-
2
3
V
ΔVOC
RL = 54Ω or 100Ω (Figure 1A)
Full
-
0.01
0.2
V
Logic Input High Voltage
VIH
DI, DE, RE
Full
2
-
-
V
Logic Input Low Voltage
VIL
DI, DE, RE
Full
-
-
0.8
V
DE, RE (Note 12)
25
-
100
-
mV
Full
-2
-
2
µA
Logic Input Hysteresis
VHYS
Logic Input Current
IIN1
DI = DE = RE = 0V or VCC (Note 13)
Input Current (A/Y, B/Z)
IIN2
DE = 0V, VCC = 0V or
3.6V
Driver Short-Circuit Current,
VO = High or Low
IOSD1
Receiver Differential Threshold
Voltage
VTH
VIN = 12V
Full
-
80
125
µA
VIN = -7V
Full
-100
-50
-
µA
DE = VCC, -7V ≤ VY or VZ ≤ 12V (Note 4)
Full
-
-
±250
mA
-7V ≤ VCM ≤ 12V (Note 12)
Full
-200
-125
-50
mV
Receiver Input Hysteresis
ΔVTH
VCM = 0V
25
-
15
-
mV
Receiver Output High Voltage
VOH
IO = -4mA, VID = -50mV
Full
VCC - 0.6
-
-
V
Receiver Output Low Voltage
VOL
IO = -4mA, VID = -200mV
Full
-
0.17
0.4
V
Three-State (high impedance)
Receiver Output Current
IOZR
0.4V ≤ VO ≤ 2.4V
Full
-1
0.015
1
µA
Receiver Input Resistance
RIN
-7V ≤ VCM ≤ 12V
Full
96
150
-
kΩ
0V ≤ VO ≤ VCC
Full
±7
30
±60
mA
Receiver Short-Circuit Current
IOSR
4
FN6887.1
May 6, 2009
ISL3178AE
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = +25°C,
(Note 2). Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified.
Temperature limits established by characterization and are not production tested.
PARAMETER
TEMP
(°C)
MIN
TYP
MAX
UNITS
DE = VCC,
RE = 0V or VCC
Full
-
510
800
µA
DE = 0V, RE = 0V
Full
-
480
700
µA
DE = 0V, RE = VCC, DI = 0V or VCC
Full
-
0.01
12
µA
IEC61000-4-2, Air-Gap Discharge Method
25
-
±15
-
kV
IEC61000-4-2, Contact Discharge Method
25
-
±8
-
kV
Human Body Model, From Bus Pins to GND
25
-
±15
-
kV
SYMBOL
TEST CONDITIONS
SUPPLY CURRENT
No-Load Supply Current (Note 3)
Shutdown Supply Current
ICC
ISHDN
DI = 0V or VCC
ESD PERFORMANCE
RS-485 Pins (A/Y, B/Z)
All Pins
HBM, per MIL-STD-883 Method 3015
25
-
±7
-
kV
Machine Model
25
-
200
-
V
DRIVER SWITCHING CHARACTERISTICS (ISL3178AE)
fMAX
VOD = ±1.5V, CD = 350pF (Figure 4,
Note 12)
Full
-
10
-
Mbps
Driver Differential Output Delay
tDD
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
-
27
40
ns
Driver Differential Output Skew
tSKEW
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
-
1
3
ns
ΔtDSKEW
RDIFF = 54Ω, CD = 50pF (Figure 2,
Notes 10, 12)
Full
-
-
11
ns
tR, tF
RDIFF = 54Ω, CD = 50pF (Figure 2)
Full
-
9
15
ns
Maximum Data Rate
Driver Output Skew, Part-to-Part
Driver Differential Rise or Fall Time
Driver Enable to Output High
tZH
RL = 500Ω, CL = 50pF, SW = GND (Figure 3),
(Note 5)
Full
-
17
50
ns
Driver Enable to Output Low
tZL
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
(Note 5)
Full
-
16
40
ns
Driver Disable from Output High
tHZ
RL = 500Ω, CL = 50pF, SW = GND (Figure 3)
Full
-
25
40
ns
Driver Disable from Output Low
tLZ
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
Full
-
28
50
ns
(Notes 7, 12)
Full
50
200
600
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 500Ω, CL = 50pF, SW = GND (Figure 3),
(Notes 7, 8)
Full
-
180
700
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
Full
-
90
700
ns
Time to Shutdown
tSHDN
RL = 500Ω, CL = 50pF, SW = VCC (Figure 3),
(Notes 7, 8)
RECEIVER SWITCHING CHARACTERISTICS (ISL3178AE)
Maximum Data Rate
fMAX
VID = ±1.5V (Note 12)
Full
-
10
-
Mbps
Full
25
33
65
ns
(Figure 5)
Full
-
1.5
10
ns
(Figure 5, Notes 10, 12)
Full
-
-
15
ns
tPLH, tPHL (Figure 5)
Receiver Input to Output Delay
Receiver Skew | tPLH - tPHL |
tSKD
ΔtRSKEW
Receiver Skew, Part-to-Part
Receiver Enable to Output High
tZH
RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
(Notes 6)
Full
5
11
17
ns
Receiver Enable to Output Low
tZL
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6),
(Notes 6,)
Full
5
11
17
ns
Receiver Disable from Output High
tHZ
RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
Full
4
7
15
ns
Receiver Disable from Output Low
tLZ
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6),
Full
4
7
15
ns
(Notes 7, 12)
Full
50
180
600
ns
Time to Shutdown
tSHDN
5
FN6887.1
May 6, 2009
ISL3178AE
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = +25°C,
(Note 2). Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified.
Temperature limits established by characterization and are not production tested.
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
(Notes 7, 9)
Full
-
240
500
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN)
Full
-
240
500
ns
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6),
(Notes 7, 9)
NOTES:
2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
3. Supply current specification is valid for loaded drivers when DE = 0V.
4. Applies to peak current. See “Typical Performance Curves” starting on page 10 for more information.
5. When testing devices with the shutdown feature, keep RE = 0 to prevent the device from entering SHDN.
6. When testing devices with the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from
entering SHDN.
7. Versions with a shutdown feature are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts
are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See
“Low Power Shutdown Mode” on page 10.
8. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
9. Set the RE signal high time >600ns to ensure that the device enters SHDN.
10. ΔtSKEW is the magnitude of the difference in propagation delays of the specified terminals of two units tested with identical test conditions (VCC,
temperature, etc.).
11. VCC ≥ 3.15V
12. Limits established by characterization and are not production tested.
13. If the Tx or Rx enable function isn’t needed, connect the enable pin to the appropriate supply (see “Pin Descriptions” on page 2) through a 1kΩ
to 3kΩ resistor.
14. For wafer sale the switching test limits are established by characterization.
Test Circuits and Waveforms
VCC
375Ω
RL/2
DE
VCC
Z
DI
Z
DI
VOD
D
DE
Y
Y
RL/2
FIGURE 1A. VOD AND VOC
VOC
VCM
VOD
D
RL = 60Ω
-7V TO +12V
375Ω
FIGURE 1B. VOD WITH COMMON MODE LOAD
FIGURE 1. DC DRIVER TEST CIRCUITS
6
FN6887.1
May 6, 2009
ISL3178AE
Test Circuits and Waveforms (Continued)
3V
DI
1.5V
1.5V
0V
VCC
tPHL
tPLH
DE
Z
DI
RDIFF
D
OUT (Z)
VOH
OUT (Y)
VOL
CD
Y
SIGNAL
GENERATOR
90%
DIFF OUT (Y to Z)
+VOD
90%
10%
10%
tR
-VOD
tF
SKEW = |tPLH - tPHL|
FIGURE 2A. TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
Z
DI
500Ω
VCC
D
SIGNAL
GENERATOR
SW
Y
GND
50pF
3V
DE
NOTE 9
1.5V
1.5V
0V
tZH, tZH(SHDN)
tHZ
OUTPUT HIGH
NOTE 9
VOH - 0.25V
PARAMETER
OUTPUT
RE
DI
SW
tHZ
Y/Z
X
1/0
GND
tLZ
Y/Z
X
0/1
VCC
tZL, tZL(SHDN)
tZH
Y/Z
0 (Note 5)
1/0
GND
NOTE 9
tZL
Y/Z
0 (Note 5)
0/1
VCC
tZH(SHDN)
Y/Z
1 (Note 8)
1/0
GND
tZL(SHDN)
Y/Z
1 (Note 8)
0/1
VOH
50%
OUT (Y, Z)
0V
tLZ
VCC
OUT (Y, Z)
50%
VOL + 0.25V V
OUTPUT LOW
VCC
FIGURE 3A. TEST CIRCUIT
OL
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES
VCC
DE
3V
+
Z
DI
54Ω
D
CD
Y
DI
0V
VOD
-
SIGNAL
GENERATOR
+VOD
DIFF OUT (Y to Z)
-VOD
0V
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4A. TEST CIRCUIT
FIGURE 4. DRIVER DATA RATE
7
FN6887.1
May 6, 2009
ISL3178AE
Test Circuits and Waveforms (Continued)
+1.5V
RE
GND
A
15pF
B
R
A
0V
0V
RO
-1.5V
tPLH
tPHL
VCC
SIGNAL
GENERATOR
1.5V
RO
1.5V
0V
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5A. TEST CIRCUIT
FIGURE 5. RECEIVER PROPAGATION DELAY
RE
GND
B
A
1kΩ
RO
R
SW
SIGNAL
GENERATOR
NOTE 9
VCC
GND
3V
RE
1.5V
1.5V
15pF
0V
tZH, tZH(SHDN)
NOTE 9
PARAMETER
DE
A
SW
tHZ
X
+1.5V
GND
V
VOH - 0.25V OH
1.5V
RO
0V
tLZ
X
-1.5V
VCC
tZL, tZL(SHDN)
tZH (Note 6)
0
+1.5V
GND
NOTE 9
tZL (Note 6)
0
-1.5V
VCC
tZH(SHDN) (Note 9)
0
+1.5V
GND
tZL(SHDN) (Note 11)
0
-1.5V
VCC
FIGURE 6A. TEST CIRCUIT
tHZ
OUTPUT HIGH
tLZ
VCC
RO
1.5V
VOL + 0.25V V
OUTPUT LOW
OL
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. RECEIVER ENABLE AND DISABLE TIMES
Application Information
Receiver Features
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a
point-to-multipoint (multidrop) standard, which allows only
one driver and up to 10 (assuming one unit load devices)
receivers on each bus. RS-485 is a true multipoint standard,
which allows up to 32 one-unit load devices (any
combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 spec requires that
drivers must handle bus contention without sustaining any
damage.
This device utilizes a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity
is better than ±200mV, as required by the RS-422 and RS-485
specifications.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for long runs,
thus the wide CMR is necessary to handle ground potential
differences, as well as voltages induced in the cable by
external fields.
8
Receiver input resistance of 96kΩ surpasses the RS-422
spec of 4kΩ and is eight times the RS-485 “Unit Load (UL)”
requirement of 12kΩ minimum. Thus, these products are
known as “one-eighth UL” transceivers and there can be up
to 256 of these devices on a network while still complying
with the RS-485 loading specification.
Receiver inputs function with common mode voltages as great
as +9V/-7V outside the power supplies (i.e., +12V and -7V),
making them ideal for long networks where induced voltages
and ground potential differences are realistic concerns.
All the receivers include a “Full Fail-Safe” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating) or shorted. Fail-safe with shorted
inputs is achieved by setting the Rx upper switching point to
-50mV, thereby ensuring that the Rx sees 0V differential as a
high input level.
FN6887.1
May 6, 2009
ISL3178AE
Receivers easily meet the data rates supported by the
corresponding driver, and all receiver outputs are tri-statable
via the active low RE input.
meeting level 4 criteria without the need for additional board
level protection on the RS-485 port.
Driver Features
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc. so it is difficult to obtain
repeatable results. The ISL3178AE RS-485 pins withstand
±15kV air-gap discharges.
The RS-485/422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485) and at
least 2V across a 100Ω load (RS-422). The drivers feature
low propagation delay skew to maximize bit width and to
minimize EMI.
The drivers is tri-statable via the active high DE input.
Outputs of the ISL3178AE drivers are not limited, so faster
output transition times allow data rates of at least 10Mbps.
Hot Plug Function
When a piece of equipment powers up, there is a period of
time where the processor or ASIC driving the RS-485 control
lines (DE, RE) is unable to ensure that the RS-485 Tx and
Rx outputs are kept disabled. If the equipment is connected
to the bus, a driver activating prematurely during power up
may crash the bus. To avoid this scenario, the ISL3178AE
versions with output enable pins incorporate a “Hot Plug”
function. During power-up, circuitry monitoring VCC ensures
that the Tx and Rx outputs remain disabled for a period of time,
regardless of the state of DE and RE. This gives the
processor/ASIC a chance to stabilize and drive the RS-485
control lines to the proper states.
ESD Protection
All pins on this device includes class 3 (>7kV) Human Body
Model (HBM) ESD protection structures, but the RS-485
pins (driver outputs and receiver inputs) incorporate
advanced structures allowing them to survive ESD events
in excess of ±15kV HBM and ±15kV IEC61000. The
RS-485 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, and
without degrading the RS-485 common mode range of -7V
to +12V. This built-in ESD protection eliminates the need
for board level protection structures (e.g., transient
suppression diodes), and the associated, undesirable
capacitive load they present.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-485 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
current limiting resistor coupled with the larger charge
storage capacitor yields a test that is much more severe than
the HBM test. The extra ESD protection built into this
device’s RS-485 pins allows the design of equipment
9
AIR-GAP DISCHARGE TEST METHOD
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. The ISL3178AE survives ±8kV contact
discharges on the RS-485 pins.
Data Rate, Cables, and Terminations
RS-485/422 are intended for network lengths up to 4000’,
but the maximum system data rate decreases as the
transmission length increases. The device operates at
10Mbps are limited to lengths less than 100’.
Twisted pair is the cable of choice for RS-485/422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode
signals, which are effectively rejected by the differential
receivers in these ICs.
Proper termination is imperative to minimize reflections.
Short networks using the 250kbps versions need not be
terminated, but, terminations are recommended unless
power dissipation is an overriding concern.
In point-to-point, or point-to-multipoint (single driver on bus)
networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi-receiver applications, stubs
connecting receiver to the main cable should be kept as
short as possible. Multipoint (multi-driver) systems require
that the main cable be terminated in its characteristic
impedance at both ends. Stubs connecting a transceiver to
the main cable should be kept as short as possible.
Built-In Driver Overload Protection
As stated previously, the RS-485 spec requires that drivers
survive worst case bus contentions undamaged. These
devices meet this requirement via driver output short circuit
current limit circuitry.
The driver output stages incorporate short circuit current
limiting circuitry which ensures that the output current never
exceeds the RS-485 spec, even at the common mode
voltage range extremes. Additionally, these devices utilize a
foldback circuit which reduces the short circuit current, and
FN6887.1
May 6, 2009
ISL3178AE
thus the power dissipation, whenever the contending voltage
exceeds either supply.
Low Power Shutdown Mode
This CMOS transceiver all uses a fraction of the power
required by its bipolar counterparts, but it also includes a
shutdown feature that reduces the already low quiescent ICC
to a 10nA trickle. This device enters shutdown whenever the
receiver and driver are simultaneously disabled (RE = VCC
Typical Performance Curves
and DE = GND) for a period of at least 600ns. Disabling both
the driver and the receiver for less than 50ns guarantees
that the transceiver will not enter shutdown.
Note that receiver and driver enable times increase when the
transceiver enables from shutdown. Refer to Notes 5 through 9,
at the end of the “Electrical Specification table” on page 6, for
more information.
VCC = 3.3V, TA = +25°C; Unless Otherwise Specified
DIFFERENTIAL OUTPUT VOLTAGE (V)
DRIVER OUTPUT CURRENT (mA)
120
100
80
60
40
20
0
0
0.5
1.0
1.5
2.0
2.5
3.0
DIFFERENTIAL OUTPUT VOLTAGE (V)
2.7
2.5
2.3
RDIFF = 120Ω
2.1
1.9
RDIFF = 54Ω
1.7
1.5
-60
3.5
FIGURE 7. DRIVER OUTPUT CURRENT vs DIFFERENTIAL
OUTPUT VOLTAGE
2.9
-40
-20
0
20
40
60
TEMPERATURE (°C)
80
100
120
FIGURE 8. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
600
200
550
Y OR Z = LOW
ICC DE-VCC
100
500
50
ICC (µA)
OUTPUT CURRENT (mA)
150
0
450
-50
ICC DE-GND
Y OR Z = HIGH
400
-100
-150
-7 -6
-4
-2
0
2
4
6
OUTPUT VOLTAGE (V)
8
10
12
FIGURE 9. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT
VOLTAGE
10
350
-60
-40
-20
0
20
40
60
TEMPERATURE (°C)
80
100
120
FIGURE 10. SUPPLY CURRENT vs TEMPERATURE
FN6887.1
May 6, 2009
ISL3178AE
Typical Performance Curves
VCC = 3.3V, TA = +25°C; Unless Otherwise Specified (Continued)
1.6
40
PROPAGATION DELAY (ns)
35
TPHL
1.5
TPLH
1.4
30
SKEW (ns)
25
20
15
1.3
1.2
10
1.1
5
0
15
30
45
60
75
1
-60 -45 -30 -15
90 105 120
TEMPERATURE (°C)
0
5
RO
RECEIVER OUTPUT (V)
DI
DRIVER INPUT (V)
0
3.0
2.5
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
DRIVER OUTPUT (V)
5
B/Z
2.0
1.5
1.0
15 30 45 60
TEMPERATURE (°C)
75
90 105 120
FIGURE 12. DRIVER DIFFERENTIAL SKEW vs
TEMPERATURE
FIGURE 11. DRIVER DIFFERENTIAL PROPAGATION DELAY
vs TEMPERATURE)
RDIFF = 54Ω, CD = 50pF
0
A/Y
0.5
0
RDIFF = 54Ω, CD = 50pF
5
DI
0
5
RO
DRIVER INPUT (V)
0
-60 -45 -30 -15
0
3.0
2.5
A/Y
2.0
1.5
B/Z
1.0
0.5
0
TIME (10ns/DIV)
TIME (10ns/DIV)
FIGURE 14. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW
FIGURE 13. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH
RECEIVER OUTPUT CURRENT (mA)
35
VOL, +25°C
30
25
VOL, +85°C
VOH, +25°C
20
15
VOH, +85°C
10
5
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 15. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT VOLTAGE
11
FN6887.1
May 6, 2009
ISL3178AE
Die Characteristics
TABLE 2. BOND PAD FUNCTION AND COORDINATES
DIE DIMENSIONS
Thickness: 19 mils
1295µm x 1350µm
Interface Materials
GLASSIVATION
Sandwich TEOS & Nitride
TOP METALLIZATION:
Type: Al with 0.5% Cu
Thickness: 28kA
SUBSTRATE
N/A
BACKSIDE FINISH
Silicon/Polysilicon/Oxide
PAD #
FUNCTION
X
(µm)
Y
(µm)
1
RO
54.5
1086.2
2
RE
54.5
800.2
3
DE
54.5
476.8
4
DI
53.0
318.35
5
GND2
398.55
59.7
6
GND1
508.55
59.7
7
Y
931.70
70.5
8
A (half duplex)
916.25
382.45
9
Z
921.2
694.4
10
B
892.1
830.35
11
A (full duplex)
887.2
1075.2
12
VCC
517.55
1163.55
Assembly Related Information
SUBSTRATE POTENTIAL
GND (powered up)
Additional Information
WORST CASE CURRENT DENSITY
N/A
PROCESS
Si GateBiCMOS
TRANSISTOR COUNT
535
PAD OPENING SIZE
90µm x 90µm
WAFER SIZE
200mm (~8 inch)
TRANSISTOR COUNT
535
12
FN6887.1
May 6, 2009
ISL3178AE
Metallization Mask Layout
ISL3178AE
VCC
RO
A
B
RE
Z
DE
A
D1
G2
13
G1
Y
FN6887.1
May 6, 2009
ISL3178AE
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
N
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
H
0.25(0.010) M
B M
INCHES
E
SYMBOL
-B-
1
2
3
L
SEATING PLANE
-A-
A
D
h x 45°
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
e
α
B S
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
N
α
NOTES:
MILLIMETERS
8
0°
8
8°
0°
7
8°
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 1 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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14
FN6887.1
May 6, 2009