AK4482VT

[AK4482]
AKD4482-SB
AK4482 Evaluation board Rev.0
General Description
The AKD4482-SB is an evaluation board for AK4482, which is 192kHz sampling 24Bit ΔΣ DAC. The AKD4482-SB
includes a LPF which can add differential analog outputs from the AK4482 and also has a digital interface.
Therefore, it is easy to evaluate the AK4482.
Ordering Guide
AKD4482-SB -- Evaluation board for AK4482
Function
On-board Analog output buffer circuit
On-board digital audio interface. (AK4118A)
+12V
AGND -12V
+3.3V
Reg
+5V
Reg
DIR
Lch
COAX In
AK4118A
Opt In
2nd Order
AK4482
LPF
Rch
PORT 2
Control
Data
Figure 1. Block diagram
* Circuit diagram are attached at the end of this manual.
COAX is recommended for an evaluation of the Sound quality.
<KM109800>
2011/12
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[AK4482]
„ Operation sequence
1) Set up the power supply lines.
Name
Color
Voltage
+12V
Red
+12V
-12V
Blue
-12V
AGND
Black
0V
Comments
Attention
This jack should be always connected to
For regulator and op-amps.
power supply.
This jack should be always connected to
For op-amps.
power supply.
This jack should be always connected to
GND
power supply.
Table 1. Set up of power supply lines
Each supply line should be distributed from the power supply unit.
2) Set-up the parts. (See the followings.)
3) Set-up the DIP switches. (See the followings.)
4) Power on
The AK4482 should be reset once by bringing SW2 (PDN) “L” upon power-up.
<KM109800>
2011/12
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[AK4482]
„ Evaluation mode
1. DIR (COAX) (default)
It is possible to evaluate the AK4482 by using CD disk. The DIR generates MCLK, BICK, LRCK and SDATA
from the received data through RCA connector (J4). Setting of jumper is shown below.
COAX is recommended for an evaluation of the Sound quality.
R13
OPEN
R14
SHORT
Default
Figure 2. Parts setting, when using DIR
2. DIR (Optical Link)
It is possible to evaluate the AK4482 by using CD disk. The DIR generates MCLK, BICK, LRCK and SDATA from
the received data through optical connector (PORT1: TORX147). Setting of jumper is shown below.
R13
SHORT
R14
OPEN
Figure 3. Parts setting, when using DIR
„ DIP Switch setting
[SW1]: AK4118A setting
No.
Pin
1
2
OCKS1
OCKS0
OFF
ON
AK4118A Master Clock setting
Refer to Table 3
Default
H
L
Table 2. SW1 setting
The frequency of the master clock output is set by OCKS0 and OCKS1 as shown in Table 3.
OCKS1
L
H
H
OCKS0
L
L
H
MCLK Frequency
256fs @fs=88.2/96kHz
512fs @32/44.1/48kHz
128fs @176.4/192kHz
Table 3. MCLK Clock
<KM109800>
Default
2011/12
-3-
[AK4482]
„ SW2 setting
[SW2](PDN): Reset of AK4482. Select “H” during operation.
External Analog Filter Circuit
The 2nd order LPF (fc=89.5kHz, Q=0.520) which adds differential outputs of the AK4482 is implemented on the board. When
the further attenuation of the out-of-band noise is needed, some additional LPF is required. Analog signal is output through
BNC connectors on the board. And the output level of the AK4482 is 5.6Vpp@5V.
R2
LOUT(ROUT-)
R1
C2
R3
+12V
C1
R1
LOUT+
(ROUT+)
-
R3
10u
220
+
LME49710
R2
C2
10k
-12V
Figure 4. On-board analog filter
R1
3.9k
R2
R3
C1
4.7k
150
3300p
Table 4. The value of R, C on this board
fin
20kHz
40kHz
Frequency Response
-0.364dB
-1.397dB
Table 5. Frequency Response of LPF
C2
680p
80kHz
-4.767dB
<Calculation>
Amplitude = 20 log
K=
R2 ,
R1
fc=
ω0 ,
2π
ω 0=
1
,
2C1C2R2R3
Q=
2C1ω0
.
1 + 1 + 1
R1 R2 R3
K
2 2
[1-(f/fc) ] +[(1/Q)(f/fc)] 2
<KM109800>
[dB],
2011/12
-4-
[AK4482]
AK4482 Control Soft Manual
■ Evaluation Board and Control Soft Settings
1. Set an evaluation board properly.
2. Connect the evaluation board to an IBM PC/AT compatible PC by a 10wire flat cable. Be aware of the direction of
the 10pin header. When running this control soft on the Windows 2000/XP, the driver which is included in the CD
must be installed. Refer to the “Driver Control Install Manual for AKM Device Control Software” for installing
the driver. When running this control soft on the windows 95/98/ME, driver installing is not necessary. This
control soft does not support the Windows NT.
3. Then please evaluate according to the following descriptions.
■ Operation Screen
1. Start up the control program following the process above.
2. The operation screen is shown below.
Figure 5. Window of Control Soft
<KM109800>
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[AK4482]
■ Operation Overview
Function, register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs.
Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the
switching tab window. Refer to the “■ Dialog Boxes” for details of each dialog box setting.
1.
[Port Reset]: For when connecting to USB I/F board (AKDUSBIF-A)
Click this button after the control soft starts up when connecting USB I/F board (AKDUSBIF-A).
2.
[Write Default]: Register Initializing
When the device is reset by a hardware reset, use this button to initialize the registers.
3.
[All Write]: Executing write commands for all registers displayed.
4.
[Save]: Saving current register settings to a file.
5.
[Load]: Executing data write from a saved file.
6.
[All Reg Write]: “All Reg Write” dialog box is popped up.
7.
[Data R/W]: “Data R/W” dialog box is popped up.
8.
[Sequence]: “Sequence” dialog box is popped up.
9.
[Sequence(File)]: “Sequence(File)” dialog box is popped up.
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[AK4482]
1. [REG]: Register Map
This tab is for a register writing and reading.
Each bit on the register map is a push-button switch.
Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)
The registers which is not defined in the datasheet are indicated as “---”.
Figure 6.Window of [REG]
<KM109800>
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[AK4482]
[Write]: Data Writing Dialog
It is for when changing two or more bits on the same address at the same time.
Click [Write] button located on the right of the each corresponded address for a pop-up dialog box.
When checking the checkbox, the register will be “H” or “1”, when not checking the register will be “L” or ”0”.
Click [OK] to write setting value to the registers, or click [Cancel] to cancel this setting.
Figure 7. Window of [Register Set]
<KM109800>
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[AK4482]
2. [Tool]: Testing Tools
This tab screen is for evaluation testing tool.
Click buttons for each testing tool.
Figure 8.Window of [Tool]
<KM109800>
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[AK4482]
■ Dialog Boxes
1. [All Reg Write]: All Reg Write dialog box
Click [All Reg Write] button in the main window to open register setting files.
Register setting files saved by [SAVE] button can be applied.
Figure 9. Window of [All Reg Write]
[Open (left)]
[Write]
[Write All]
[Help]
[Save]
[Open (right)]
[Close]
: Selecting a register setting file (*.akr).
: Executing register writing.
: Executing all register writings.
Writings are executed in descending order.
: Help window is popped up.
: Saving the register setting file assignment. The file name is “*.mar”.
: Opening a saved register setting file assignment “*. mar”.
: Closing the dialog box and finish the process.
*Operating Suggestions
(1) Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mar” should be
stored in the same folder.
(2) When register settings are changed by [Save] button in the main window, re-read the file to reflect new
register settings.
<KM109800>
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[AK4482]
2. [Data R/W]: Data R/W Dialog Box
Click the [Data R/W] button in the main window for data read/write dialog box.
Data write is available to specified address.
Figure 10. Window of [Data R/W]
Address Box: Input data address in hexadecimal numbers for data writing.
Data Box: Input data in hexadecimal numbers.
Mask Box: Input mask data in hexadecimal numbers.
This is “AND” processed input data.
[Write]: Writing to the address specified by “Address” box.
[Read]: Reading from the address specified by “Address” box.
The result will be shown in the Read Data Box in hexadecimal numbers.
(AKD4482-SA does not support READ function)
[Close]: Closing the dialog box and finish the process.
Data writing can be cancelled by this button instead of [Write] button.
<KM109800>
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[AK4482]
3. [Sequence]: Sequence Dialog Box
Click [Sequence] button to open register sequence setting dialog box.
Register sequence can be set in this dialog box.
Figure 11. Window of [Sequence]
Sequence Setting
Set register sequence by following process bellow.
(1) Select a command
Use [Select] pull-down box to choose commands.
Corresponding boxes will be valid.
< Select Pull-down menu >
· No_use
: Not using this address
· Register
: Register writing
· Reg(Mask)
: Register writing (Masked)
· Interval
: Taking an interval
· Stop
: Pausing the sequence
· End
: Finishing the sequence
<KM109800>
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[AK4482]
(2) Input sequence
[Address]
[Data]
[Mask]
[ Interval ]
· No_use
· Register
· Reg(Mask)
· Interval
· Stop
· End
: Data address
: Writing data
: Mask
[Data] box data is ANDed with [Mask] box data. This is the actual writing data.
When Mask = 0x00, current setting is hold.
When Mask = 0xFF, the 8bit data which is set in the [Data] box is written.
When Mask =0x0F, lower 4bit data which is set in the [Data] box is written.
Upper 4bit is hold to current setting.
: Interval time
Valid boxes for each process command are shown bellow.
: None
: [Address], [Data], [Interval]
: [Address], [Data], [Mask], [Interval]
: [Interval]
: None
: None
Control Buttons
The function of Control Button is shown bellow.
[Start]
[Help]
[Save]
[Open]
[Close]
: Executing the sequence
: Opening a help window
: Saving sequence settings as a file. The file name is “*.aks”.
: Opening a sequence setting file “*.aks”.
: Closing the dialog box and finish the process.
Stop of the sequence
When “Stop” is selected in the sequence, processing is paused and it starts again when [Start] button is clicked.
Restarting step number is shown in the “Start Step” box. When finishing the process until the end of sequence, “Start
Step” will return to “1”.
The sequence can be started from any step by writing the step number to the “Start Step” box.
Write “1” to the “Start Step” box and click [Start] button, when restarting the process from the beginning.
<KM109800>
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[AK4482]
4. [Sequence(File)]: Sequence Setting File Dialog Box
Click [Sequence(File)] button to open sequence setting file dialog box.
Those files saved in the “Sequence setting dialog” can be applied in this dialog.
Figure 12. Window of [Sequence(File)]
[Open (left)]
[Start]
[Start All]
[Help]
[Save]
[Open(right)]
[Close]
: Opening a sequence setting file (*.aks).
: Executing the sequence setting.
: Executing all sequence settings.
Sequences are executed in descending order.
: Pop up the help window.
: Saving sequence setting file assignment. The file name is “*.mas”.
: Opening a saved sequence setting file assignment “*. mas”.
: Closing the dialog box and finish the process.
*Operating Suggestions
(1) Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mas” should be
stored in the same folder.
(2) When “Stop” is selected in the sequence the process will be paused and a pop-up message will appear. Click
“OK” to continue the process.
Figure 13.Window of [Sequence Pause]
<KM109800>
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[AK4482]
Measurement Results
[Measurement condition]
• Measurement unit
• MCLK
• BICK
• fs
• Bit
• Power Supply
• Interface
• Temperature
: Audio Precision System two Cascade (AP2)
: 512fs (44.1kHz), 256fs (96kHz), 128fs (192kHz)
: 64fs
: 44.1kHz, 96kHz, 192kHz
: 24bit
: VDD=5V
: Internal DIR (44.1kHz, 96kHz, 192kHz)
: Room
fs=44.1kHz
Parameter
S/(N+D)
DR
S/N
Input signal
1kHz, 0dB
1kHz, -60dB
“0” data
Measurement filter
20kLPF
22kLPF, A-weighted
22kLPF, A-weighted
Lch
Rch
100.6
109.5
110.6
100.1
109.5
110.6
fs=96kHz
Parameter
S/(N+D)
Input signal
1kHz, 0dB
Measurement filter
40kLPF
40kLPF
22kLPF, A-weighted
40kLPF
22kLPF, A-weighted
Lch
100.3
106.4
110.9
108.1
110.9
Rch
99.6
106.3
110.5
108.1
110.9
Measurement filter
40kLPF
40kLPF
22kLPF, A-weighted
40kLPF
22kLPF, A-weighted
Lch
99.7
107.6
110.4
107.5
110.4
Rch
98.7
107.5
110.3
107.5
110.4
DR
1kHz, -60dB
S/N
“0” data
fs=192kHz
Parameter
S/(N+D)
Input signal
1kHz, 0dB
DR
1kHz, -60dB
S/N
“0” data
<KM109800>
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[AK4482]
Plots
(fs=44.1kHz)
AK4482 FFT
VDD=5V, fs=44.1kHz, fin=1kHz, 0dBFS input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
A
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
20
50
100
200
500
1k
2k
5k
10k
20k
2k
5k
10k
20k
Hz
Figure 14. FFT (fin=1kHz, 0dBFS input)
AK4482 FFT
VDD=5V, fs=44.1kHz, fin=1kHz, -60dBFS input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
A
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
20
50
100
200
500
1k
Hz
Figure 15. FFT (fin=1kHz, -60dBFS input)
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[AK4482]
(fs=44.1kHz)
AK4482 FFT
VDD=5V, fs=44.1kHz, fin=1kHz, No signal input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
A
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 16. FFT (Noise Floor)
AK4482 FFT Out of band noise
VDD=5V, fs=44.1kHz, No signal input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
-80
A
-100
-90
-110
-120
-130
-140
-150
-160
-170
-180
20
50
100
200
500
1k
2k
5k
10k
20k
50k
100k
Hz
Figure 17. FFT (Out of band noise)
<KM109800>
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[AK4482]
(fs=44.1kHz)
AK4482 THD+N vs. Input Level
VDD=5V, fs=44.1kHz, fin=1kHz
-70
-75
-80
-85
-90
-95
d
B
r
-100
A
-110
-105
-115
-120
-125
-130
-135
-140
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 18 . THD+N vs. Input level (fin=1kHz)
AK4482 THD+N vs. Input Frequency
VDD=5V, fs=44.1kHz, 0dBFS input
-70
-75
-80
-85
-90
-95
d
B
r
-100
A
-110
-105
-115
-120
-125
-130
-135
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 19 . THD+N vs. Input Frequency (0dBFS input)
<KM109800>
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[AK4482]
(fs=44.1kHz)
AK4482 Linearity
VDD=5V, fs=44.1kHz, fin=1kHz
+0
-10
-20
-30
-40
-50
d
B
r
-60
A
-80
-70
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 20. Linearity (fin=1kHz)
AK4482 Frequency Response
VDD=5V, fs=44.1kHz, 0dBFS input
+1
+0.9
+0.8
+0.7
+0.6
+0.5
+0.4
+0.3
+0.2
d
B
r
A
+0.1
+0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
-1
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 21. Frequency Response AOUTL+/-pin / AOUTR+/- pin (0dBFS input)
<KM109800>
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[AK4482]
(fs=44.1kHz)
AK4482 Crosstalk
VDD=5V, fs=44.1kHz, 0dBFS input
-70
-75
-80
-85
-90
-95
-100
d
B
-105
-110
-115
-120
-125
-130
-135
-140
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
Figure 22. Crosstalk (0dBFS input)
<KM109800>
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[AK4482]
(fs=96kHz)
AK4482 FFT
VDD=5V, fs=96kHz, fin=1kHz, 0dBFS input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
A
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
40
50
100
200
500
1k
2k
5k
10k
20k
40k
5k
10k
20k
40k
Hz
Figure 23. FFT (fin=1kHz, 0dBFS input)
AK4482 FFT Notch Filter=ON
VDD=5V, fs=96kHz, fin=1kHz, 0dBFS input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
A
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
40
50
100
200
500
1k
2k
Hz
Figure 24. FFT(fin=1kHz, 0dBFS input, Notch)
<KM109800>
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[AK4482]
(fs=96kHz)
AK4482 FFT
VDD=5V, fs=96kHz, fin=1kHz, -60dBFS input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
A
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
40
50
100
200
500
1k
2k
5k
10k
20k
40k
5k
10k
20k
40k
Hz
Figure 25. FFT (fin=1kHz, -60dBFS input)
AK4482 FFT
VDD=5V, fs=96kHz, No signal input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
A
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
40
50
100
200
500
1k
2k
Hz
Figure 26. FFT (Noise Floor)
<KM109800>
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[AK4482]
(fs=96kHz)
AK4482 THD+N vs. Input Level
VDD=5V, fs=96kHz, fin=1kHz
-70
-75
-80
-85
-90
-95
d
B
r
-100
A
-110
-105
-115
-120
-125
-130
-135
-140
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 27. THD+N vs. Input level (fin=1kHz)
AK4482 THD+N vs. Input Frequency
VDD=5V, fs=96kHz, 0dBFS input
-70
-75
-80
-85
-90
-95
d
B
r
-100
A
-110
-105
-115
-120
-125
-130
-135
-140
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 28. THD+N vs. Input Frequency (0dBFS input)
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[AK4482]
(fs=96kHz)
AK4482 Linearity
VDD=5V, fs=96kHz, fin=1kHz
+0
-10
-20
-30
-40
-50
d
B
r
-60
A
-80
-70
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 29. Linearity (fin=1kHz)
AK4482 Frequency Response
VDD=5V, fs=96kHz, 0dBFS input
+1
+0.9
+0.8
+0.7
+0.6
+0.5
+0.4
+0.3
+0.2
d
B
r
A
+0.1
+0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
-1
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 30. Frequency Response AOUTL+/-pin / AOUTR+/- pin (0dBFS input)
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[AK4482]
(fs=96kHz)
AK4482 Crosstalk
VDD=5V, fs=96kHz, 0dBFS input
-70
-75
-80
-85
-90
-95
-100
d
B
-105
-110
-115
-120
-125
-130
-135
-140
40
50
100
200
500
1k
2k
5k
10k
20k
40k
Hz
Figure 31. Crosstalk (0dBFS input)
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[AK4482]
(fs=192kHz)
AK4482 FFT
VDD=5V, fs=192kHz, fin=1kHz, 0dBFS input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
-80
A
-100
-90
-110
-120
-130
-140
-150
-160
-170
-180
90
200
500
1k
2k
5k
10k
20k
50k
80k
10k
20k
50k
80k
Hz
Figure 32. FFT (fin=1kHz, 0dBFS input)
AK4482 FFT Notch Filter=ON
VDD=5V, fs=192kHz, fin=1kHz, 0dBFS input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
-80
A
-100
-90
-110
-120
-130
-140
-150
-160
-170
-180
90
200
500
1k
2k
5k
Hz
Figure 33. FFT(fin=1kHz, 0dBFS input, Notch)
<KM109800>
2011/12
- 26 -
[AK4482]
(fs=192kHz)
AK4482 FFT
VDD=5V, fs=192kHz, fin=1kHz, -60dBFS input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
-80
A
-100
-90
-110
-120
-130
-140
-150
-160
-170
-180
90
200
500
1k
2k
5k
10k
20k
50k
80k
10k
20k
50k
80k
Hz
Figure 34. FFT (fin=1kHz, -60dBFS input)
AK4482 FFT
VDD=5V, fs=192kHz, No signal input
+0
-10
-20
-30
-40
-50
-60
-70
d
B
r
-80
A
-100
-90
-110
-120
-130
-140
-150
-160
-170
-180
90
200
500
1k
2k
5k
Hz
Figure 35. FFT (Noise Floor)
<KM109800>
2011/12
- 27 -
[AK4482]
(fs=192kHz)
AK4482 THD+N vs. Input Level
VDD=5V, fs=192kHz, fin=1kHz
-70
-75
-80
-85
-90
-95
d
B
r
-100
A
-110
-105
-115
-120
-125
-130
-135
-140
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBFS
Figure 36. THD+N vs. Input level (fin=1kHz)
AK4482 THD+N vs. Input Frequency
VDD=5V, fs=192kHz, 0dBFS input
-70
-75
-80
-85
-90
-95
d
B
r
-100
A
-110
-105
-115
-120
-125
-130
-135
-140
90
200
500
1k
2k
5k
10k
20k
50k
80k
Hz
Figure 37. THD+N vs. Input Frequency (0dBFS input)
<KM109800>
2011/12
- 28 -
[AK4482]
(fs=192kHz)
AK4482 Linearity
VDD=5V, fs=192kHz, fin=1kHz
+0
-10
-20
-30
-40
-50
d
B
r
-60
A
-80
-70
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
50k
80k
dBFS
Figure 38. Linearity (fin=1kHz)
AK4482 Frequency Response
VDD=5V, fs=192kHz, 0dBFS input
+1
+0.8
+0.6
+0.4
+0.2
-0
-0.2
-0.4
-0.6
d
B
r
A
-0.8
-1
-1.2
-1.4
-1.6
-1.8
-2
-2.2
-2.4
-2.6
-2.8
90
200
500
1k
2k
5k
10k
20k
Hz
Figure 39. Frequency Response AOUTL+/-pin / AOUTR+/- pin (0dBFS input)
<KM109800>
2011/12
- 29 -
[AK4482]
(fs=192kHz)
AK4482 Crosstalk (Red=Lch, Bule=Rch)
VDD=5V, fs=192kHz, 0dBFS input
-70
-75
-80
-85
-90
-95
-100
d
B
-105
-110
-115
-120
-125
-130
-135
-140
90
200
500
1k
2k
5k
10k
20k
50k
80k
Hz
Figure 40. Crosstalk (0dBFS input)
<KM109800>
2011/12
- 30 -
[AK4482]
Revision History
Date
(YY/MM/DD)
11/12/01
Manual
Revision
KM109800
Board
Revision
0
Reason
Contents
First edition
IMPORTANT NOTICE
z These products and their specifications are subject to change without notice.
When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei
Microdevices Corporation (AKM) or authorized distributors as to current status of the products.
z Descriptions of external circuits, application circuits, software and other related information contained in this document are
provided only to illustrate the operation and application examples of the semiconductor products. You are fully responsible
for the incorporation of these external circuits, application circuits, software and other related information in the design of
your equipments. AKM assumes no responsibility for any losses incurred by you or third parties arising from the use of
these information herein. AKM assumes no liability for infringement of any patent, intellectual property, or other rights in
the application or use of such information contained herein.
z Any export of these products, or devices or systems containing them, may require an export license or other official
approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or
strategic materials.
z AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other
hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use approved with
the express written consent by Representative Director of AKM. As used here:
Note1) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and
which must therefore meet very high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for
applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may
reasonably be expected to result in loss of life or in significant injury or damage to person or property.
z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places the
product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or
distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims
arising from the use of said product in the absence of such notification.
<KM109800>
2011/12
- 31 -
5
4
3
2
1
D
D
4
3
OCKS1
OCKS0
P3.3V
H
SW1
DIP-2
1
2
L
R6
100
R7
100
25
D5V
SDTO
27
26
MCKO2
DAUX
BICK
29
28
30
XTI
XTO
32
31
PDN
34
R5
100
R31
(short)
AVDD
R8
24
LRCK
R9
23
MCKO1
5.1
1
2
39
+
C1 +
(open)
C2
10u
R10
(open)
C4
0.1u
+
R11
(open)
R12
10k
R
VSS2
VCOM
DVDD
41
42
43
P3.3V
RX3
(OPT)
VCC
GND
OUT
C8 C9
0.1u 10u
3
1
L1
47u
C5
10p
P3.3V
3
21
5
6
VSS3
44
20
VOUT/GP7
C
PORT1
TORX141
22
4
40
C3
10u
U2
RX0
AK4118A
NC
COUT/GP5
RX1
BOUT/GP4
C6
0.1u
+
7
C7
10u
8
MCLK
DZFL
BICK
SDTI
LRCK
PDN
DZFR
U1
AK4482
VDD
VSS
AOUTL+
CSN
AOUTL-
CCLK
AOUTR+
CDTI
AOUTR-
16
C18
0.1u
+
C19
10u
+
C20
(open)
R34
3.9k
14
+
45
R13
46
TEST1
TX1/GP3
RX2
TX0/GP2
+
13
12
11
R32
300
R33
3k
R35
150
C29
100u
C30
0.01u
C23
470p
10
9
C22
4.7n
C21
10p
18
R37
180
R36
10
R38
1k
C
1
C24
100p
R39
51
2
3
17
4
2
2
1
R43
5.1
15
19
UOUT/GP6
P12V-EX
100
C25
15000p
16
R40
1.2k
C26
1500p
U5
LME49710
NC
NC
-IN
V+
+IN
OUT
V-
NC
8
C27
(short)
7
+
38
P3.3V
INT1
R4
100
OCKS1/CCLK/SCL
37
OCKS0/CSN/CAD0
INT0
36
35
R3
100
CM0/CDTO/CAD1
10k
33
10k
R2
CM1/CDTI/SDA
R1
6
J5
MR-573P
R41
100
LOUT
(COAX)
5
R42
(open)
C28
(open)
15
(open)
C12
10u
+
VIN/GP0
C31
100u
C32
0.01u
R44
5.1
12
XTL1
XTL0
11
10
M12V
R16
100
R17
100
R18
100
P12V-EX
R56
5.1
R19
100
R47
3.9k
P3.3V
R45
300
R46
3k
R48
150
K
B
D1
HSU119
1
L
3
A
R20
10k
H
P3.3V
C13
0.1u
C14
10u
2
SW2
ATE1D-2M3
1
3
5
9
11
13
14
7
PDN
+
C15
0.1u
U3
74HC14
1A
2A
3A
4A
5A
6A
VCC
GND
1Y
2Y
3Y
4Y
5Y
6Y
R50
180
2
4
6
8
10
12
C33
10p R51
1k
C36
100p
R52
51
1
2
3
4
R21
100
C41
100u
C42
0.01u
C35
470p
C34
4.7n
R49
10
P3.3V
+
C37
15000p
R53
1.2k
C38
1500p
+
C43
100u
U6
LME49710
B
NC
NC
-IN
V+
+IN
V-
OUT
NC
8
7
6
C39
(short)
+
9
P/SN
IPS1/IIC
DIF2/RX7
8
C11
0.1u
13
TVDD
7
VSS1
DIF1/RX6
6
5
TEST2
4
1
R15
75
DIF0/RX5
RX3
NC
48
3
R14
0
IPS0/RX4
C10
0.1u
14
NC/GP1
2
J4
MR-573P
RX3
(COAX)
VSS4
+
47
J6
MR-573P
R54
100
ROUT
(COAX)
5
R55
(open)
C40
(open)
C44
0.01u
P3.3V
10
8
6
4
2
PORT2
uP-I/F
9
7
5
3
1
R22
10k
R23
10k
CSN
CCLK
CDTI
R24
10k
R25
R26
470
470
R27
470
2
3
5
6
11
10
14
13
1
15
U4
74LVC157
1A
1B
2A
2B
3A
3B
4A
4B
A/B
G
1Y
2Y
3Y
4Y
VCC
GND
R57
5.1
4
7
R28
100
R29
9
100
R30
12
M12V
100
P3.3V
16
8
C16
0.1u
+
C17
10u
A
A
- 32 -
Title
AKD4482-SB
Size
A1
Document Number
4
3
2
Rev
0
AKD4482
Date:
5
Thursday, September 22, 2011
1
Sheet
1
of
2
5
4
3
2
1
J1
T-45_R
D
D
P12V-EX
P12V
Q1
BCP 56
D5V
J2
T-45_B
R58
6.8k
+
12V-GND
R59
4.7k
R62
4.3k
C45
(open)
R60
1
D2
DZ2B1
+
+
J3
T-45_BL
C
C46
470u
+
C51
0.01u
C55
100u
C52
100p
C47
0.01u
C60
(open)
R61
1k
M12V
1
C49
100p
2
M12V
3
C48
100u
4
+
D3
DZ2C2
U7
AD817A/AD
NC
NC
-IN
V+
+IN
OUT
V-
NC
8
C
7
6
5
C53
100p
Q2
2SB1188 CSC
+
C54
100u
R63
3.6k
C50
100p
T1
uPC3533HF-AZ
+3.3V
IN
C56
100u
+
C57
0.01u
GND
+12V
B
P3.3V
OUT
+
C58
0.01u
B
C59
470u
A
A
Title
- 33 -
Size
A3
Date:
5
4
3
2
AKD4482-SB
Document Number
Rev
0
Power Supply
Thursday, July 21, 2011
Sheet
1
2
of
2