NCL30081LEDGEVB 3.6 W Flyback 3 LED Step Dimmable Driver Evaluation Board User's Manual http://onsemi.com EVAL BOARD USER’S MANUAL Overview This documentation package covers an NCL30081 LED driver for use in a GU10 based LED lamp. The output is mains isolated by double insulation. Maximum input power is 5 W. The ECA (Electronic Circuit Assembly) supports 2 versions; one step dimming and one non-dimming version. The version is controlled through minor bill-of-material changes. The LED current dims in 5 discrete levels sequentially by detecting the interruption of the AC mains briefly (about 1 s) to step the LED current down one level until it cycles back to full current. Line regulation is optimized by the selection of Rlff. A line dependent current source creates a line dependent offset on the CS pin to account for propagation delay errors in the peak primary current. Changing the FET or gate driver resistor will also have some effect on the output current. Since the input power is < 5 W maximum, this falls below the level where power factor or harmonic current requirements are applicable in many countries (e.g. US). In the EU, the harmonic current requirements for IEC61000-3-2 Class C are applicable even at this low power level. Compliance to the Class C requirements is simple with a change of the input capacitor from 4.7 mF to 1 mF. This change limits the input voltage operation to 200–265 V ac because there is insufficient energy storage for the full universal line range. Modifications The value of Rtrim sets the final output current value along with Rsense. Rtrim is for fine adjustment. The nature of the open loop control makes the current adjustment somewhat iterative based on available standard resistor values and because of the circuit parameters that affect the output current setting. Figure 1. NCL30081LEDG Evaluation Board Semiconductor Components Industries, LLC, 2013 March, 2013 − Rev. 0 1 Publication Order Number: EVBUM2175/D NCL30081LEDGEVB THEORY OF OPERATION Figure 3 portrays the primary and secondary current of a fly-back converter in discontinuous conduction mode (DCM). Figure 2 shows the basic circuit of a fly-back converter. Vbulk Transformer Lleak Cclp Nsp Rclp Vout . + Lp . Clamping Network Clump DRV Rsense Figure 2. Basic Fly-back Converter Schematic When the diode conducts, the secondary current decreases linearly from ID,pk to zero. When the diode current has turned off, the drain voltage begins to oscillate because of the resonating network formed by the inductors (Lp + Lleak ) and the lump capacitor. This voltage is reflected on the auxiliary winding wired in fly-back mode. Thus, by looking at the auxiliary winding voltage, we can detect the end of the conduction time of secondary diode. The constant current control block picks up the leakage inductor current, the end of conduction of the output rectifier and controls the drain current to maintain the output current constant. We have: During the on-time of the MOSFET, the bulk voltage Vbulk is applied to the magnetizing and leakage inductors Lp and Lleak . The current ramps up. When the MOSFET is turned-off, the inductor current first charges Clump . The output diode is off until the voltage across Lp reverses and reaches N sp ǒV out ) V fǓ The output diode current increase is limited by the leakage inductor. As a consequence, the secondary peak current is reduced: I D,pk t I L,pk I out + N sp V REF 2N sp R sense (eq. 1) The output current value is set by choosing the sense resistor: The diode current reaches its peak when the leakage inductor is reset. Thus, in order to accurately regulate the output current, we need to take into account the leakage inductor current. This is accomplished by sensing the clamping network current. Practically, a node of the clamp capacitor is connected to Rsense instead of the bulk voltage Vbulk . Then, by reading the voltage on the CS pin, we have an image of the primary current (red curve in Figure 3). R sense + V ref 2N sp I out (eq. 2) From (eq. 1), the first key point is that the output current is independent of the inductor value. Moreover, the leakage inductance does not influence the output current value as the reset time is taken into account by the controller. http://onsemi.com 2 NCL30081LEDGEVB IL,pk Nsp ID,pk Ipri(t) Isec(t) Time t1 t2 ton tdemag Vaux(t) Time Figure 3. Flyback Currents and Auxiliary Winding Voltage in DCM At this point the Excel spreadsheet based design guide will help with many of the calculations. A trim resistor allows for making fine adjustments to the current limit to set the output current precisely. The LFF circuit will create some error on the CS pin which is adjusted out by proper choice of Rtrim SPECIFICATIONS Table 1. SPECIFICATIONS Input voltage 90−265 V ac Line Frequency 50−60 Hz Power Factor 0.5 Typ. Safety (Designed to meet) IEC61347-2-13 EU UL8750 NA Optimized Output Voltage Range 9−10.5 V dc Output Current 360 mA dc Output Ripple 200 mA P-P Efficiency 82 % Start Up Time < 500 ms EMI (Conducted) Class B Dimensions 34.1 17.3 16 mm http://onsemi.com 3 Typ. FCC/CISPR NCL30081LEDGEVB SCHEMATIC Start L1 1.5 mH +HVDC AC_N R11 D4 AC_L Rfuse C2 4.7 mF 400 V C3 100 nF 400 V 1 kW MB6S FUSE Figure 4. Input Circuit Dout UFM12PL +HVDC Rstart1 1.0 MW Rbo 3.01 MW 3 R2 51.1 kW ZCD CS Vin 6 5 Vcc Com Drv NCL30081 Dleak UFM15PL CVCC 4.7 mF 1.8 W R4 1.10 kW Rtrim 11 W Figure 5. Main Schematic http://onsemi.com 4 LED− C15 470 pF 250 VAC Y2 Rgd 4 1 C14 420 pF 250 VAC Y2 20 W CVCCbulk 27 mF Cout 22 mF 16 V TX− 1 R5 U1 2 R8 10 kW D9 BAS21DW5T1G Rzcd 56 kW 1 2 Dclamp BZX100A Rstart 1.0 MW LED+ TX+ 1 T1 Start 1 1 Qfet NDD02N60Z Rsens 1.8 W NCL30081LEDGEVB Table 2. BILL OF MATERIALS Qty Reference Part PCB Footprint Manufacturer Mfr_PN Can be Substituted RoHS 1 CVcc 4.7 mF 0603 Taiyo Yuden EMK107ABJ475KA-T Yes Yes 1 CVccbulk 27 mF CAP-ALEL-4X11-HOR Panasonic EEU-FC1E270 Yes Yes 1 Cout 22 mF 16 V 1206 Taiyo Yuden EMK316BJ226ML-T Yes Yes 1 C2 4.7 mF 400 V CAP_ALEL_D10XL13 Rubycon 400LLE4R7MEFC10X12.5 Yes Yes 1 C3 100 nF 400 V CAP-BOX-LS5-5M0X7M2 Epcos B32559C6104+*** Yes Yes 2 C14, C15 470 pF 250 VAC Y2 1808 Johanson-Dielectrics 502R29W471KV3E-****-SC Yes Yes 1 Dclamp BZX100A SOD323F NXP BZX100A,115 Yes Yes 1 Dleak UFM15PL SOD123FL MCC UFM15PL Yes Yes 1 Dout UFM12PL SOD123FL MCC UFM12PL Yes Yes 1 D4 MB6S MB6S MCC MB6S Yes Yes 1 D9 BAS21DW5T1G SC-88A ON Semiconductor BAS21DW5T1G No Yes 1 L1 1.5 mH IND-UPRIGHT-LS25 Wurth 7447462152 Yes Yes 1 Qfet NDD02N60Z IPAK ON Semiconductor NDD02N60Z No Yes 1 Rbo 3.01 MW 0805 Yageo RC0805FR-073M01L Yes Yes 1 Rfuse FUSE FUSE-HAIRPIN-LS250 Littelfuse 0263.500WRT1L Yes Yes 2 Rsens, Rgd 1.8 W 0603 Vishay CRCW06031R80FKEA Yes Yes 2 Rstart1, Rstart 1.0 MW 0805 Yageo RC0805FR-071ML Yes Yes 1 Rtrim 11 W 0402 Yageo RT0402FRE0711RL Yes Yes 1 Rzcd 56 kW 0805 Yaego RC0805FR-0756KL Yes Yes 1 R2 51.1 kW 0402 Yaego RC0402FR-0751K1L Yes Yes 1 R4 1.10 kW 0402 Stackpole RMCF0402FT1K10 Yes Yes 1 R5 20 W 0402 Yaego RC0402FR-0720RL Yes Yes 1 R8 10 kW 0402 Yaego RC0402FR-0710KL Yes Yes 1 R11 1 kW 0805 Yaego RC0805JR-071KL Yes Yes 1 T1 XFRM_LINEAR EP13-SMD-16PIN-MOD1 Wurth 750313306 Yes Yes 1 U1 NCL30080/1 TSOP6 ON Semiconductor NCL30080 No Yes NCL30081 2 Wire 6”, Input, White UL1430 Alpha Wire #24 AWG, Stranded Yes Yes 1 Wire 6”, Output, Red UL1430 Alpha Wire #24 AWG, Stranded Yes Yes 1 Wire 6”, Output, Black UL1430 Alpha Wire #24 AWG, Stranded Yes Yes http://onsemi.com 5 NCL30081LEDGEVB GERBER VIEWS Figure 6. Component Side PCB Figure 7. Component Side Silkscreen Figure 8. Solder Side PCB http://onsemi.com 6 NCL30081LEDGEVB GERBER VIEWS (CONTINUED) Figure 9. Solder Side Silkscreen CIRCUIT BOARD FABRICATION NOTES 1. Fabricate per IPC-6011 and IPC6012. Inspect to IPA-A-600 Class 2 or updated standard. 2. Printed Circuit Board is defined by files listed in fileset. 3. Modification to copper within the PCB outline is not allowed without permission, except where noted otherwise. The manufacturer may make adjustments to compensate for manufacturing process, but the final PCB is required to reflect the associated gerber file design 0.001 in. for etched features within the PCB outline. 4. Material in accordance with IPC-4101/21, FR4, Tg 125C min. 5. Layer to layer registration shall not exceed 0.004 in. 6. External finished copper conductor thickness shall be 0.0013 in. min. 7. Copper plating thickness for through holes shall be 0.0007 in. min. 8. All holes sizes are finished hole size. 9. Finished PCB thickness 0.031 in. 10. All undimensioned holes to be drilled using the NC drill data. 11. Size tolerance of plated holes: 0.003 in.: non-plated holes 0.002 in. 12. All holes shall be 0.003 in. of their true position U.D.S. 13. Construction to be SMOBC, using liquid photo image (LPI) solder mask in accordance with IPC-SM-B40C, Type B, Class 2, and be green in color. 14. Solder mask misregistration 0.004 in. max. 15. Silkscreen shall be permanent non-conductive white ink. 16. The fabrication process shall be UL approved and the PCB shall have a flammability rating of UL94V0 to be marked on the solder side in silkscreen with date, manufactures approved logo, and type designation. 17. Warp and twist of the PCB shall not exceed 0.0075 in. per in. 18. 100% electrical verification required. 19. Surface finish: electroless nickel immersion gold (ENIG) 20. RoHS compliance required. http://onsemi.com 7 NCL30081LEDGEVB FLYBACK TRANSFORMER SPECIFICATION CUSTOMER TERMINAL RoHS LEAD(Pb)-FREE Sn 96%, Ag 4% Yes Yes 8 7 11 6 12 5 13 4 14 3 15 2 16 1 750313306 9 .676 MAX. [17.17] .500 MAX. [12.70] TERM. NO.’s FOR REF. ONLY 10 Update views to show flying leads and lead length dimension. Leads are 2 from outside bobbin rail and 1.8 tinned. FL1 .550 MAX. [13.97] FL2 DOT LOCATES TERM. #1 CHAMFERS LOCATE TERM.’s #1 & 16 LOT CODE & DATE CODE .621 MAX. [15.77] 10 PRI 12 180−265 V 100 kHz 11 .050 (16) [1.27] FL1 .030 (16) [.76] SEC 10 V − 360 mA 13 15 AUX 20 V−10 mA .042 REF. (16) [1.07] FL2 Customer to tie terminals 11+12 internally on PCB .067 (14) [1.70] REFERENCE LAND SIZE 16 .074 REF. (16) [1.88] CUSTOMER TO DETERMINE LAND LAYOUT ELECTRICAL SPECIFICATIONS @ 255C unless otherwise noted: D.C. RESISTANCE (@ 20C): 10−13 (tie 11+12), 2.50 W 10%. 15−16, 1.28 W 10%. FL1−FL2, 0.115 W 20%. DIELECTRICRATING: 4,000 VAC, 1 minute tested by applying 4,000 VAC for 1 second between pins 10−FL1 (tie 12+13+15). 500 VAC, 1 minute tested by applying 625 VAC for 1 second between pins 10−16. INDUCTANCE: 1.50 mH 10%, 10 kHz, 100 mVAC, 0 mADC, 10−13 (11+12), Ls. SATURATION CURRENT: 420 mA saturating current that causes 20% rolloff from initial inductance. LEAKAGE INDUCTANCE 7 mH typ, 15 mH max., 100 kHz, 100 mVAC, 10−13 (tie 11+12, 15+16, FL1+FL2), Ls. TURNS RATIO: (10−12):(11−13), (1):(1.00), 1%. (10−13):(15−16), (2.5):(1.00), tie (11+12), 1%. (10−13):(FL1−FL2), (5):(1.00), tie (11+12), 1%. OPERATING TEMPERATURE RANGE: −40C TO 125C including temp. rise. Unless otherwise specified, tolerances are as follows: Angles: 1 Fractions: 1/64 This drawing is dual dimensioned. Dimensions in brackets are in millimeters. http://onsemi.com 8 Decimals: 0.005 (.127 mm) NCL30081LEDGEVB ECA PICTURES CVccbulk Detected for Non-dimming Version Figure 10. Top View Figure 11. Bottom View Trim Transformer Flying Leads to Shortest Possible Length Flying Leads are Solder Strippable Flagged FL1 Figure 12. Transformer and Output Terminations http://onsemi.com 9 NCL30081LEDGEVB TEST PROCEDURE Equipment Needed Test Connections 1. Connect the Unit Under Test (UUT) per the test set up in Figure 13 2. Set the AC source per the test procedure. AC Source: 90−265 V ac 50/60 Hz Minimum 1 A ac capability AC Wattmeter: 30 W Minimum, True RMS Input Voltage and Current, Power Factor 0.2% accuracy or better DC Voltmeter: 100 V dc minimum 0.1% accuracy or better DC Ammeter: 1 A dc minimum 0.1% accuracy or better LED Load: 9–10.5 V dc – 3 LED Load @ 360 mA NOTE: Unless otherwise specified, all voltage measurements are taken at the terminals of the UUT. DC Ammeter AC Power Source AC Wattmeter UUT DC Voltmeter LED Test Load Figure 13. Test Set Up Functional Test Procedure Test Limits Test Condition Test Variable Min Max Pass/Fail Vin = 90 V ac Output Current 350 mA 370 mA − Vin = 120V ac Output Current 350 mA 370 mA − Vin = 265 V ac Output Current 350 mA 370 mA − Vin = 120 V ac Power Factor 0.55 − − Vin = 120 V ac Vout = 10.5 V dc Efficiency (use actual measured data) 80% − − Efficiency = 100% (VOUT IOUT) / Pin http://onsemi.com 10 NCL30081LEDGEVB TEST DATA Figure 14. Regulation over Line Voltage Figure 15. Efficiency over Line Voltage http://onsemi.com 11 NCL30081LEDGEVB TEST DATA (CONTINUED) Figure 16. Power Factor over Line Voltage Figure 17. Dimming over Line Voltage http://onsemi.com 12 NCL30081LEDGEVB TEST DATA (CONTINUED) Figure 18. Drain Voltage @ 90 V ac Figure 19. Drain Voltage @ 265 V ac http://onsemi.com 13 NCL30081LEDGEVB TEST DATA (CONTINUED) Figure 20. Output Ripple 90 V ac 50 Hz Figure 21. Output Ripple 265 V ac 50 Hz http://onsemi.com 14 NCL30081LEDGEVB TEST DATA (CONTINUED) Figure 22. Conducted EMI Pre-compliance 150 kHz−2 MHz Figure 23. Conducted EMI Pre-compliance 150 kHz−30 MHz http://onsemi.com 15 NCL30081LEDGEVB APPENDIX IEC61000-3-2 Class C Compliance If the discharge lighting equipment has a built-in dimming device, measurement is made only in the full load condition. Compliance to IEC61000-3-2 Class C (under 25 W) is not possible with the universal front end architecture since input current does not comply with Class D requirements or the waveform definition requirements as stated in this excerpt. It is possible to comply with the special waveform and harmonic requirements of the third paragraph with a standard peak charge front end if the bulk capacitance is properly sized. The bulk capacitor must be in the range of 200−300 nF/W for a 230 V ac line for Europe. Japan has a similar requirement; however, the bulk capacitance must be 800–1,200 nF/W because the nominal main is 100 V ac rather than 230 V ac. The recommended capacitance values are line specific. So there is no universal mains solution with a peak charge front end. It is possible to convert the Evaluation Board to IEC61000−3−2 Class C compliance by changing C2. Active Input Power 3 25 W: Discharge lighting equipment having an active input power smaller than or equal to 25 W shall comply with one of the following two sets of requirements: The harmonic currents shall not exceed the power-related limits of Table 3, column 2, or: The third harmonic current, expressed as a percentage of the fundamental current, shall not exceed 86% and the fifth shall not exceed 61%; moreover, the waveform of the input current shall be such that it begins to flow before or at 60, has its last peak (if there are several peaks per half period) before or at 65 and does not stop flowing before 90, where the zero crossing of the fundamental supply voltage is assumed to be at 0. Table 3. C2 Capacitor Selection Line Minimum Capacitance Maximum Capacitance Voltage Rating 230 V ac 50 Hz 0.82 mF 1.2 mF 400 V dc 100 V ac 50/60 Hz 3.6 mF 4.7 mF 200 V dc Microsoft Excel is a registered trademark of Microsoft Corporation ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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