DEMO MANUAL DC2425A LTC2311/LTC2310 Single 16-Bit/14-Bit/12-Bit, 5Msps/2Msps, Serial, High Speed SAR ADCs Description Demonstration circuit 2425A features the LTC®2311 family. With up to 5Msps, these differential, single channel, 16-bit, serial, high speed successive approximation register (SAR) ADCs are available in a 16-lead MSOP package. The LTC2311 family has an internal 20ppm/°C maximum drift reference and an SPI-compatible serial interface that supports CMOS and LVDS logic. Note the demo board is configured for CMOS operation by default; see the note under JP3 for LVDS operation. The following text refers to the LTC2311, but applies to all members of the family, the only difference being the sample rate and/or the number of bits. The DC2425A demonstrates the DC and AC performance of the LTC2311 in conjunction with the DC890 PScope™ data collection board. Alternatively, by connecting the DC2425A into a customer application, the performance of the LTC2311 can be evaluated directly in that circuit. Design files for this circuit board are available at http://www.linear.com/demo/DC2425A L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and PScope is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Board Photo DC POWER SUPPLY –9.5VDC GND +9.5VDC BPF TO DC890B HP8642B dc2425A F01 BPF HP8642B Figure 1. DC2425A Connection Diagram dc2425af 1 DEMO MANUAL DC2425A Assembly Options Table 1. DC2425A Assembly Options VERSION U1 PART NUMBER MAX CONVERSION RATE # OF BITS MAX CLOCK FREQUENCY DC2425A-A LTC2311CMSE-16#PBF 5Msps 16 105MHz DC2425A-B LTC2310CMSE-16#PBF 2Msps 16 42MHz DC2425A-C LTC2311CMSE-14#PBF 5Msps 14 105MHz DC2425A-D LTC2310CMSE-14#PBF 2Msps 14 42MHz DC2425A-E LTC2311CMSE-12 #PBF 5Msps 12 105MHz DC2425A-F LTC2310CMSE-12#PBF 2Msps 12 42MHz Quick Start Procedure Demonstration circuit 2425A is easy to set up and evaluate for performance. Refer to Figure 1 and follow the procedure below. n n n n n n Click the Collect button (Figure 2) to begin acquiring data. The Collect button then changes to Pause, which can be used to stop data acquisition. Connect the DC2425A to a DC890 USB high speed data collection board using edge connector P1. Connect the DC890 to a host PC with a standard USB A/B cable. Apply a low jitter signal source to J3 to test channel 1. Note that the DC2425A is capable of accepting a differential input signal as well as a single-ended signal. See the Hardware Setup section for the jumper positions that correspond to these configurations. As a clock source, apply a low jitter 10dBm sine wave or square wave to connector J5. See Table 1 for maximum clock frequencies. Note that J5 has a 50Ω termination resistor to ground. Run the PScope software (Pscope.exe version K73, or later) supplied with the DC890 or download it from www.linear.com/software. Complete software documentation is available from the Help menu. Updates can be downloaded from the Tools menu. Check for updates periodically, as new features may be added. The PScope software should recognize the DC2425A and configure itself automatically. 2 Figure 2. DC2425A PScope Screenshot dc2425af DEMO MANUAL DC2425A Quick Start Procedure Drive Options There are several ways to drive the LTC2311 on the DC2425A. If a true differential signal source is available, apply the signal to the differential inputs J3 and J4; make the following changes to the DC2425A: n Remove R27, R38. n Install 0Ω 0603 resistors at R39, R47. If a single-ended signal source is available, the LTC2311 may be driven differentially by applying the signal to J3. The LTC2311 may be driven in the pseudo-differential bipolar mode by applying the single-ended signal to J3; make the following changes to the DC2425A: n Move JP5 to the BIP position. n Install a 10µF 0603 capacitor at C56. The LTC2311 may be driven in the pseudo-differential unipolar mode by applying the single-ended signal to J3; make the following changes to the DC2425A: n Move JP5 to the UNI position. n Install a 10µF 0603 capacitor at C56. dc2425af 3 DEMO MANUAL DC2425A Hardware Setup SIGNAL CONNECTIONs J1 FPGA Program: Factory use only. J2 JTAG: Factory use only. J3 AIN+ Input: In the single-ended configuration, this is the signal input. For differential operation, this serves as the positive signal input. J4 AIN– Input: This input is used only for differential operation. It serves as the negative signal input. J5 CLK: This input has a 50Ω termination resistor, and is intended to be driven by a low jitter 10dBm sine or square wave. To achieve the full AC performance of this part, the clock jitter should be kept under 2ps. This input is capacitively coupled so that the input clock can be either 0V to 2.5V or ±1.25V. This eliminates the need for level shifting. To run at the maximum conversion rate, apply the frequency specified in the Table 1. JP1 VCCIO: Use this jumper to select the VCCIO supply voltage. The default setting is 2.5V. The 1.8V setting selects a 1.8V supply voltage. JP2 VDD: Use this jumper to select the VDD supply voltage. The default setting is 5V. The 3.3V setting selects a 3.3V supply voltage. JP5 Mode: Use this jumper to select the signal input mode for the LTC2311. The default setting is DIFF. The DIFF setting accepts a single-ended signal from J3 but applies it as a differential signal to the LTC2311. The BIP setting accepts a single-ended signal from J3 and applies it as a single-ended bipolar signal to the LTC2311. The UNI setting also accepts a single-ended signal from J3, and applies it as a unipolar signal to the LTC2311. See Drive Options section fro more details. JP6 –IN Coupling: Use this jumper to select AC- or DCcoupling of the signal applied to J4. The default setting is DC. At very low input frequencies, using AC-coupling may degrade the distortion performance. JP7 CM: Use this jumper to set the DC bias point for the signal applied to J3 when JP4 (+IN coupling) is in the AC position. The default setting is 4.096V which sets the common mode voltage at 2.048V. The EXT setting allows the use of an externally applied common mode voltage applied at E12 (EXT_CM1). JP8 Data Out: Use this jumper to select the data output format from the LTC2311. The default setting is CMOS. The output data will not be valid if the jumper is moved to the LVDS position unless the following changes have been made: JP3: Use this jumper to select the reference source for the LTC2311. The default setting is DRIVE REFOUT. This setting uses the voltage applied to Pin 3 of the LTC2311 as the reference voltage. The EXT setting will accept a voltage applied to E11 as the reference voltage. If no voltage is applied to E11, the LTC2311 will use it's internal reference, which is 4.096V. Install 100Ω 0402 resistors at R26, 75, 76, 99 JP4 +IN Coupling: Use this jumper to select AC- or DCcoupling of the signal applied to J3. The default setting is DC. At very low input frequencies, using AC-coupling may degrade the distortion performance. JP9 EEPROM: Factory use only. 4 Reprogram the CPLD through J1 using the programming file LTC2311.pof found at: http://www.linear.com/demo/DC2425A Move JP8 to the LVDS position. JP10 OSC: Use this jumper to enable the onboard encode clock source. The default setting is OFF. The ON setting energizes this source. Refer to the DC2425A schematic for additional passive elements required to use the onboard source. dc2425af DEMO MANUAL DC2425A Parts List ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER Required Circuit Components 1 13 C4, C6, C11, C12, C36, C48, C53, C63, C71, C92, C93, C95, C100 CAP., X5R, 10µF, 6.3V 20% 0603 NIC, NMC0603X5R106M6.3TRPF4KF 2 0 C35, C37, C56, C64, C65 CAP., 0603 OPT 3 1 C54 CAP., NP0, 200pF, 50V 5%, 0603 MURATA, GRM1885C1H201JA01D 4 9 C3, C18, C19, C20, C21, C23, C51, C84, C99 CAP., X7R, 1µF, 25V 10%, 0603 TDK, C1608X7R1E105K 5 2 C106, C119 CAP., X5R, 4.7µF, 6.3V 10%, 0603 AVX, 06036D475KAT2A 6 1 C68 CAP., X5R, 2.2µF, 10V 10%, 0603 MURATA, GRM188R61A225KE34D 7 1 C1 CAP., X7R, 47µF, 10V 10%, 1210 MURATA, GRM32ER71A476KE15L 8 5 C7, C8, C9, C10, C13 CAP., X7R, 0.01µF, 6.3V 10%, 0603 MURATA, GRM188R70J103KA01D 9 3 C2, C5, C17 CAP., X7R, 10µF, 10V 10%, 0805 MURATA, GRM21BR71A106KE51L 10 1 C22 CAP., X5R, 3.3µF, 6.3V 10%, 0603 AVX, 06036D335KAT2A 11 40 C14, C26, C31, C32, C33, C34, C42, C44, C45, C46, C49, C50, C52, C55, C57, C58, C59, C60, C61, C62, C66, C67, C69, C70, C72, C73, C74, C75, C76, C79, C81, C85, C86, C87, C88, C89, C90, C94, C96, C97 CAP., X7R, 0.1µF, 16V 10%, 0402 NIC, NMC0402X7R104K16TRPF 12 1 C30 CAP., X5R, 47µF, 6.3V 20%, 0805 TAIYO YUDEN, JMK212BJ476MG-T 13 3 C40, C43, C78 CAP., X7R, 0.01µF, 16V 10%, 0402 NIC, NMC0402X7R103K16TRPF 14 1 C80 CAP., X7R, 1nF, 16V 10%, 0402 AVX, 0402YC102KAT2A 15 3 C28, C82, C83 CAP., X7R, 22nF, 16V 10%, 0402 AVX, 0402YC223KAT2A 16 2 C77, C41 CAP., X7R, 4.7nF, 16V 10%, 0402 AVX, 0402YC472KAT2A 17 4 C15, C16, C24, C25 CAP., NP0, 10pF, 16V 10%, 0402 AVX, 0402YA100KAT2A 18 1 C27 CAP., TANT, 470µF 10V 20%, 7343 AVX, TPSE477M010R0050 19 1 C39 CAP., X7R, 2.2nF, 16V 10%, 0402 AVX, 0402YC222KAT2A 20 4 D1, D2, D3, D4 DIODE, SCHOTTKY 30V 200MW, SOD323 DIODE INC., BAT54WS-7-F 21 9 E4, E5, E6, E7, E8, E9, E10, E11, E12 TEST POINT, TURRET, 0.064" MILL MAX, 2308-2-00-80-00-00-07-0 22 3 E1, E2, E3 TEST POINT, TURRET, 0.094" MILL MAX, 2501-2-00-80-00-00-07-0 23 9 JP1, JP2, JP3, JP4, JP6, JP7, JP8, JP9, JP10 HEADER, 1X3, 0.100" SAMTEC, TSW-103-07-L-S 24 1 JP5 HEADER, 2X3, 0.100" SAMTEC, TSW-103-07-L-D 25 3 J3, J4, J5 CONN BNC FEM JACK PC MNT STRGHT AMPHENOL CONNEX, 112404 26 2 J1, J2 HEADER, 2X5, 0.100" SAMTEC, TSW-105-07-L-D 27 2 L1, L2 IND., FERRITE CHIP 390Ω 2000mA 1206 MURATA, BLM31PG391SN1L 28 10 R2, R8, R9, R10, R11, R23, R38, R58, R72, R73 RES., CHIP, 1k, 1/10W, 1% 0603 PANASONIC, ERJ-3EKF1001V 29 0 R21, R24, R27, R29, R31, R35, R46, R50, R75 RES., CHIP, 0603 OPT 30 1 R53 RES., CHIP, 33Ω, 1/10W, 5% 0603 PANASONIC, ERJ-3GEYJ330V dc2425af 5 DEMO MANUAL DC2425A Parts List ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER PANASONIC, ERJ-3GEY0R00V 31 7 R20, R22, R25, R39, R45, R47, R52 RES., CHIP, 0Ω, 1/10W, 0603 32 2 R30, R33 RES., CHIP, 0Ω, 1/16W, 0402 PANASONIC, ERJ-2GEJ0R00V 33 2 R28, R32 RES., CHIP, 49.9Ω, 1/10W, 1% 0603 PANASONIC, ERJ-3EKF49R9V 34 1 R74 RES., CHIP, 49.9Ω, 1/4W, 1% 1206 PANASONIC, ERJ-8ENF49R9V 35 0 R26, R31 RES., CHIP, 0402 OPT 36 2 R3, R4 RES., CHIP, 3.92k, 1/10W, 1% 0603 PANASONIC, ERJ-3EKF3921V 37 1 R5 RES., CHIP, 499Ω, 1/10W, 1% 0603 PANASONIC, ERJ-3EKF4990V 38 1 R12 RES., CHIP, 866Ω, 1/10W, 1% 0603 PANASONIC, ERJ-3EKF8660V 39 1 R6 RES., CHIP, 3.09k, 1/10W, 1% 0603 PANASONIC, ERJ-3EKF3091V 40 1 R1 RES., CHIP, 4.02k, 1/10W, 1% 0603 PANASONIC, ERJ-3EKF4021V 41 1 R7 RES., CHIP, 1.43k, 1/10W, 1% 0603 PANASONIC, ERJ-3EKF1431V 42 18 R19, R34, R36, R37, R40, R41, R42, R43, R44, R48, R49, R51, R53, R54, R55, R56, R65, R66, R67 RES., CHIP, 33Ω, 1/16W, 5% 0402 PANASONIC, ERJ-2GEJ330X 43 1 R15 RES., CHIP, 1k, 1/16W, 1% 0402 PANASONIC, ERJ-2RKF1001X 44 4 R68, R69, R70, R71 RES., CHIP, 4.99k, 1/10W, 1% 0603 PANASONIC, ERJ-3EKF4991V 45 9 R13, R14, R16, R17, R18, R61, R62, R63, R64 RES., CHIP, 10k, 1/16W, 5% 0402 PANASONIC, ERJ-2GEJ103X 46 3 R77, R78, R79 RES., CHIP, 10k, 1/10W, 5% 0603 PANASONIC, ERJ-3GEYJ103V 47 1 R76 RES., CHIP, 100, 1/10W, 1% 0603 PANASONIC, ERJ-3EKF1000V 48 2 U12, U16 IC, INVERTER UHS SINGLE SC70-5 FAIRCHILD, NC7SZ04P5X 49 1 U9 IC, 400MHz AMPLIFIER, MS8 LINEAR TECH., LT1819CMS8#PBF 50 1 U13 IC, FLIP FLOP D-TYPE LOG, US8 ON SEMI., NL17SZ74USG 51 1 U14 IC, VOLTAGE REFERENCE, MSOP8 LINEAR TECH., LTC6655BHMS8-4.096#PBF 52 1 U17 IC, OP-AMP, TSOT23-5 LINEAR TECH., LT6202CS5#PBF 53 4 U2, U3, U4, U7 IC, MICROPOWER REGULATOR, SO8 LINEAR TECH., LT1763CS8#PBF 54 1 U1 IC, MICROPOWER NEG. REGULATOR, SOT-23 LINEAR TECH., LT1964ES5-SD#PBF 55 1 U5 IC, MICROPOWER REGULATOR, SO8 LINEAR TECH., LT1763CS8-2.5#PBF 56 1 U6 IC, LINEAR REGULATOR, SO8 LINEAR TECH., LT3021ES8-1.2#PBF 57 1 U11 IC, CYCLONE III FPGA 5k, EQFP144 ALTERA, EP3C5E144C7N 58 1 U8 IC, CONFIG DEVICE 4MBIT, SO8 ALTERA, EPCS4SI8N 59 1 U15 IC, EEPROM 2kBIT 400kHz, TSSOP8 MICROCHIP, 24LC024-I/ST 60 1 Y1 OSCILLATOR, 106.2500 MHz 3.3V SMD, Y-CB3LV CTS-FREQUENCY, CB3LV-3I-106M2500 61 10 SHUNTS AS SHOWN ON ASSY DWG SHUNT, 0.100 SAMTEC, SNT-100-BK-G 62 4 MH1-MH4 STANDOFF, NYLON 0.25" KEYSTONE, 8831 (SNAP ON) 6 dc2425af DEMO MANUAL DC2425A Parts List ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER DC2425A-A Required Circuit Components 1 1 DC2425A General BOM 2 2 R58, R59 RES., CHIP, 1k, 1/10W, 1% 0402 3 0 R57, R60 RES, 0402 DNI 4 1 U10 I.C., SAR ADC, MSOP-4X5 PANASONIC, ERJ-2EKF1001V LINEAR TECH., LTC2311CMSE-16#PBF DC2425A-B Required Circuit Components 1 1 DC2425A General BOM 2 2 R58, R59 RES., CHIP, 1k, 1/10W, 1% 0402 3 0 R57, R60 RES, 0402 DNI 4 1 U10 I.C., SAR ADC, MSOP-4X5 PANASONIC, ERJ-2EKF1001V LINEAR TECH., LTC2310CMSE-16#PBF DC2425A-C Required Circuit Components 1 1 DC2425A General BOM 2 2 R57, R59 RES., CHIP, 1k, 1/10W, 1% 0402 3 0 R58, R60 RES, 0402 DNI 4 1 U10 I.C., SAR ADC, MSOP-4X5 PANASONIC, ERJ-2EKF1001V LINEAR TECH., LTC2311CMSE-14#PBF DC2425A-D Required Circuit Components 1 1 DC2425A General BOM 2 2 R57, R59 RES., CHIP, 1k, 1/10W, 1% 0402 3 0 R58, R60 RES, 0402 DNI 4 1 U10 I.C., SAR ADC, MSOP-4X5 PANASONIC, ERJ-2EKF1001V LINEAR TECH., LTC2310CMSE-14#PBF DC2425A-E Required Circuit Components 1 1 DC2425A General BOM 2 2 R57, R60 RES., CHIP, 1k, 1/10W, 1% 0402 3 0 R58, R59 RES, 0402 DNI 4 1 U10 I.C., SAR ADC, MSOP-4X5 PANASONIC, ERJ-2EKF1001V LINEAR TECH., LTC2311CMSE-12#PBF DC2425A-F Required Circuit Components 1 1 DC2425A General BOM 2 2 R57, R60 RES., CHIP, 1k, 1/10W, 1% 0402 3 0 R58, R59 RES, 0402 DNI 4 1 U10 I.C., SAR ADC, MSOP-4X5 PANASONIC, ERJ-2EKF1001V LINEAR TECH., LTC2310CMSE-12#PBF dc2425af 7 A B C J4 R45 0 VCM_BIAS R20 0 C65 DNI C53 10uF JP6 JP4 C63 10uF VREF C35 DNI C36 10uF R46 1K C95 10uF R23 1K J3 3 2 1 3 2 1 2 R50 DNI 1 3 5 R21 DNI 2 4 6 * C64 DNI R38 150 - + -6V 6 5 2 3 0.1uF 7 0 0.1uF 1 C96 0.1uF 1 U17 LT6202CS5 C97 0.1uF -6V - + +6V U9B LT1819CMS8 R39 301 R25 C50 U9A LT1819CMS8 C57 R32 49.9 C54 200pF R28 49.9 4 3 C56 DNI VCM_BIAS R47 DNI R27 301 R24 DNI C37 DNI JP5 HD2X3-100 R22 0 +6V R79 10K R78 10K R35 DNI R29 DNI C98 4.7uF R33 0 0402 R30 0 0402 R52 0 C71 10uF 3 2 1 1 2 3 7 6 AIN- AIN+ C68 2.2uF 5 6 7 8 1 2 3 1 4 C51 1uF VCCIO J5 VDD 3 2 1 E11 C92 10uF JP3 JP10 Y1 CB3LV EOH VCC GND VOUT_S VOUT_F GND 4 3 2 1 3 R76 100 C94 0.1uF 2 R73 1K C93 10uF GND OUT R74 49.9 1206 C88 0.1uF 16 15 14 13 9 SCK+ SCK- SDO+ SDO- U16 NC7SZ04P5X 4 C87 0.1uF 6 4 CLR GND ~CNV R53 33 PR VCC U13 NL17SZ74 7 8 CLKIN R51 33 C84 1uF +9V/+10V C48 10uF ~CNV SCK+ SCK- DNI R75 U10 MSE16 SDO+ SDO- 3 0.1uF C89 2 5 VCCIO 2 C100 10uF 0.1uF C85 4 L2 BLM31PG391SN1L VCCIO CSB U12 NC7SZ04P5X 2 C72 0.1uF 1 1 Thursday, December 03, 2015 B C D 1 2 A TECHNOLOGY GND GND VIN SHDN U14 LTC6655BHMS8-4.096 JP7 JP8 R77 10K C99 1uF E12 +3V VREF C90 0.1uF R72 1K 1 CP Q 3 D Q 5 8 4 4 8 4 VDD 10 12 CMOS/LVDS OVDD REFOUT 3 REFIN 2 GND GND GND 1 5 8 GND 17 OGND 11 5 3 D 5 2 + 8 - 2 DEMO MANUAL DC2425A Schematic Diagrams dc2425af Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. A B C D 19 27 36 41 48 57 63 82 95 108 118 123 131 140 145 CYCLONE3-EP3C5E144 VCCINT VCCINT GND VCCINT GND VCCINT GNDA1 VCCINT GND VCCINT GND VCCINT GND VCCINT GND VCCIO1 GND VCCIO2 GND VCCIO3 GNDA2 VCCIO3 GND VCCIO4 GND VCCIO4 GND VCCIO5 GND VCCIO6 GND VCCIO7 VCCIO7 VCCIO8 VCCIO8 VCCA1 VCCA2 VCCD_PLL1 VCCD_PLL2 CYCLONE3-EP3C5E144 IO1 IO2 IO3 IO4_RUP3 IO4_RDN3 IO5 IO6_VREF5 IO7 IO8_DIFFIOR8N IO9_DIFFIOR8P CLK7_DIFFCLK3N CLK6_DIFFCLK3P + R57 DNI 5 29 45 61 78 102 116 134 17 26 40 47 56 62 81 93 117 122 130 139 35 107 37 109 C30 47uF C42 0.1uF C34 0.1uF C27 470uF C38 4.7uF R60 R59 R58 D0 D1 D2 C40 0.01uF C29 4.7uF C49 0.1uF C31 0.1uF VCCIO VCCIO C43 0.01uF C78 0.01uF C55 0.1uF C44 0.1uF CSB C58 0.1uF C67 0.1uF C79 0.1uF C60 0.1uF C66 0.1uF C80 1nF C75 0.1uF C74 0.1uF C70 0.1uF C82 22nF C76 0.1uF C81 0.1uF 90 91 100 104 105 106 C69 0.1uF C83 22nF C62 0.1uF C61 0.1uF CYCLONE3-EP3C5E144 CLK5_DIFFCLK2N CLK4_DIFFCLK2P IO1 IO2 IO3_VREF6 IO4 CLKIN SCK+ SCK- CNVCLK CYCLONE3-EP3C5E144 R26 DNI 73 74 75 76 77 79 80 83 84 85 88 89 CLK2 CLK3 IO1 IO2 IO3_VREF2 IO4_RUP1 IO5_RDN1 IO6 CYCLONE3-EP3C5E144 IO1 IO2 IO3 IO4 IO5_VREF1 IO6_DIFFL4P IO7_DIFFL4N CLK0 CLK1 C73 0.1uF C28 22nF C59 0.1uF C46 0.1uF C39 2.2nF C77 4.7nF C52 0.1uF C45 0.1uF D5 D3 D4 C33 0.1uF C41 4.7nF 2 L1 BLM31PG391SN1L C32 0.1uF 6 8 9 12 13 14 15 16 18 20 21 86 87 92 94 96 97 98 99 101 103 110 111 112 113 114 115 119 120 121 124 125 126 127 38 39 42 43 44 46 49 50 51 52 53 R62 10K R17 10K R18 10K R31 DNI 1 3 5 7 9 R13 10K R14 10K J2 HD2X5-100 2 4 6 8 10 R61 10K R16 10K D10 D11 D12 D13 D14 D15 D6 D7 D8 D9 SDO- SDO+ R64 10K 128 129 132 133 135 136 137 138 141 142 143 144 54 55 58 59 60 64 65 66 67 68 69 70 71 72 C15 10pF D1 BAT54WS CYCLONE3-EP3C5E144 IO1_DIFFIOT11N IO2_DIFFIOT11P IO3_DIFFIOT10N IO4_DIFFIOT10P IO5 IO6_VREF8 IO7 IO8 IO9 IO10 IO11_DIFFIOT01N IO12_DIFFIOT01P CYCLONE3-EP3C5E144 R15 1K R63 10K IO1_DIFFIOB12P IO2_DIFFIOB12N IO3 IO4_DIFFIOB16P IO5_DIFFIOB16N IO6 IO7_VREF4 IO8_RUP2 IO9_RDN2 IO10 IO11 IO12_DIFFIOB21P IO13_DIFFIOB21N IO14 CYCLONE3-EP3C5E144 IO1_DATA1 IO2_FLASH_NCE N_STATUS DCLK IO3_DATA0 NCONFIG TDI TCK TMS TDO NCE IO4_DEV_OE IO5_DEV_CLRN CONF_DONE MSEL0 MSEL1 MSEL2 IO6_INIT_DONE IO7_CRC_ERROR IO8_NCEO IO9_CLKUSR CYCLONE3-EP3C5E144 IO1 IO2 IO3 IO4 IO5_RUP4 IO6_RDN4 IO7_VREF7 IO8_DIFFIOT16N IO9_DIFFIOT16P IO10 IO11 IO12_DIFFIOT12N IO13_DIFFIOT12P CYCLONE3-EP3C5E144 IO1_DIFFIOB1P IO2_DIFFIOB1N IO3 IO4 IO5 IO6_VREF3 IO7_DIFFIOB9P IO8_DIFFIOB9N IO9 IO10_DIFFIOB11P IO11_DIFFIOB11N 1 2 24 25 28 30 31 32 33 34 1 3 5 7 9 EPCS4SI8 C25 10pF 8 7 6 5 C24 10pF C26 0.1uF 0402 C14 0.1uF 0402 C86 0.1uF SCL SDA WP A2 A1 A0 U15 24LC024-I /ST 6 5 7 3 2 1 R70 4.99K EDGE-CON-100 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 D3 BAT54WS D1 D0 D3 D2 D5 D4 D7 D6 D9 D8 D11 D10 D13 D12 D15 D14 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 R71 4.99K 1 2 3 JP9 +9V/+10V E2 E3 R69 4.99K R68 4.99K E1 C1 47uF 1210 C3 1uF -9V/-10V C22 3.3uF C21 1uF C23 1uF C20 1uF C19 1uF C18 1uF 3 2 1 5 8 5 8 5 8 5 8 5 8 5 8 SHDN IN GND ADJ OUT U1 LT1964ES5-SD SHDN IN U6 LT3021ES8-1.2 SHDN IN U5 LT1763CS8-2.5 SHDN IN U7 LT1763CS8 SHDN IN U4 LT1763CS8 SHDN IN U3 LT1763CS8 SHDN IN U2 LT1763CS8 4 5 SEN OUT BYP SEN OUT BYP SEN OUT BYP SEN OUT BYP SEN OUT BYP SEN OUT 3 2 4 2 1 4 2 1 4 2 1 4 2 1 4 2 1 R2 1K R3 3.92K C17 10uF 0805 C10 0.01uF C13 0.01uF C9 0.01uF C8 0.01uF C7 0.01uF 1 3 2 1 JP1 JP2 E4 VCCIO R1 4.02K R12 866 3 2 1 C12 10uF +1.2V C11 10uF +2.5V C6 10uF +3V C5 10uF 0805 VDD C4 10uF VCCIO C2 10uF 0805 +6V E9 E8 E10 E7 E6 E5 Thursday, May 07, 2015 B C D 2 2 A R11 1K R7 1.43K R10 1K R6 3.09K R9 1K R5 499 R8 1K R4 3.92K TECHNOLOGY C16 10pF D2 BAT54WS VCC VCC DCLK ASDI J1 HD2X5-100 NCS DATA VCC GND U8 2 4 6 8 10 D4 BAT54WS 1 2 3 4 1 2 1 2 1 2 8 VCC 1 2 3 4 7 10 11 22 23 1 GND 6 GND 4 GND GND GND 3 6 7 GND GND GND 3 6 7 GND GND GND 3 6 7 GND GND GND 3 6 7 GND GND GND 3 6 7 AGND 4 2 DEMO MANUAL DC2425A Schematic Diagrams dc2425af 9 DEMO MANUAL DC2425A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright © 2004, Linear Technology Corporation 10 Linear Technology Corporation dc2425af LT 0216 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2016