74AHC1GU04-Q100 Inverter Rev. 1 — 21 November 2012 Product data sheet 1. General description The 74AHC1GU04-Q100 is a high-speed Si-gate CMOS device. It provides an inverting single stage function. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74AHC1GU04GW-Q100 40 C to +125 C 74AHC1GU04GV-Q100 40 C to +125 C Description Version TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 SC-74A plastic surface-mounted package; 5 leads SOT753 4. Marking Table 2. Marking codes Type number Marking 74AHC1GU04GW-Q100 AD 74AHC1GU04GV-Q100 AU4 74AHC1GU04-Q100 NXP Semiconductors Inverter 5. Functional diagram A 2 Y 4 1 2 Logic symbol A mna044 mna043 Fig 1. 4 Fig 2. Y mna045 IEC logic symbol Fig 3. Logic diagram 6. Pinning information 6.1 Pinning $+&*84 QF $ *1' 9&& < DDD Fig 4. Pin configuration 6.2 Pin description Table 3. Pin description Symbol Pin Description n.c. 1 not connected A 2 data input GND 3 ground (0 V) Y 4 data output VCC 5 supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level Input Output A Y L H H L 74AHC1GU04_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 November 2012 © NXP B.V. 2012. All rights reserved. 2 of 13 74AHC1GU04-Q100 NXP Semiconductors Inverter 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VCC supply voltage Conditions Unit 0.5 +7.0 V 20 - mA +7.0 V VO < 0.5 V or VO > VCC + 0.5 V - 20 mA 0.5 V < VO < VCC + 0.5 V - 25 mA supply current - 75 mA ground current 75 - mA 65 +150 C - 250 mW input clamping current input voltage IOK output clamping current IO output current ICC IGND Tstg storage temperature [1] total power dissipation Ptot Max 0.5 IIK VI VI < 0.5 V Min Tamb = 40 C to +125 C [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For both TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage 2.0 5.0 5.5 V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature 40 +25 +125 C t/V input transition rise and fall rate VCC = 3.3 V 0.3 V - - 100 ns/V VCC = 5.0 V 0.5 V - - 20 ns/V 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min VIH VIL HIGH-level input voltage LOW-level input voltage 74AHC1GU04_Q100 Product data sheet Typ 40 C to +85 C Max Min 40 C to +125 C Unit Max Min Max VCC = 2.0 V 1.7 - - 1.7 - 1.7 - V VCC = 3.0 V 2.4 - - 2.4 - 2.4 - V VCC = 5.5 V 4.4 - - 4.4 - 4.4 - V VCC = 2.0 V - - 0.3 - 0.3 - 0.3 V VCC = 3.0 V - - 0.6 - 0.6 - 0.6 V VCC = 5.5 V - - 1.1 - 1.1 - 1.1 V All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 November 2012 © NXP B.V. 2012. All rights reserved. 3 of 13 74AHC1GU04-Q100 NXP Semiconductors Inverter Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min VOH VOL Typ 40 C to +85 C Max Min 40 C to +125 C Unit Max Min Max HIGH-level VI = VIH or VIL output voltage IO = 50 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 50 A; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = 50 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = 8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V LOW-level VI = VIH or VIL output voltage IO = 50 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 A II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 A CI input capacitance - 1.5 10 - 10 - 10 pF 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; tr = tf = 3.0 ns. For test circuit see Figure 6. Symbol Parameter 25 C Conditions Min tpd propagation delay A to Y; see Figure 5 VCC = 3.0 V to 3.6 V Max Min Max - 3.4 7.1 1.0 8.5 1.0 10.0 ns - 4.9 10.6 1.0 12.0 1.0 13.5 ns CL = 15 pF - 2.6 5.5 1.0 6.0 1.0 7.0 ns CL = 50 pF - 3.6 7.0 1.0 8.0 1.0 9.0 ns - 14 - VCC = 4.5 V to 5.5 V per buffer; VI = GND to VCC [1] tpd is the same as tPLH and tPHL. [2] Typical values are measured at VCC = 3.3 V. [3] Typical values are measured at VCC = 5.0 V. [4] Min [2] CL = 50 pF power dissipation capacitance Max [1] CL = 15 pF CPD Typ 40 C to +85 C 40 C to +125 C Unit [3] [4] - - - - pF CPD is used to determine the dynamic power dissipation PD (W). PD = CPD VCC2 fi + (CL VCC2 fo) where: fi = input frequency in MHz; 74AHC1GU04_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 November 2012 © NXP B.V. 2012. All rights reserved. 4 of 13 74AHC1GU04-Q100 NXP Semiconductors Inverter fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 12. Waveforms VM(1) A input VCC tPHL tPLH PULSE GENERATOR VI CL 50 pF RT VM(1) Y output VO DUT mna034 mna046 VM = 0.5 VCC; VI = GND to VCC. Test data is given in Table 8. Definitions for test circuit: CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 5. The input (A) to output (Y) propagation delay times Fig 6. Load circuitry for switching times 13. Typical transfer characteristics mna397 2.0 VO (V) 1.6 mna398 1.0 VO ICC (mA) 0.8 1.2 0.6 0.8 0.4 3.0 10 VO ICC (mA) VO (V) 8 6 1.5 4 ID (drain current) 0.4 ID (drain current) 0 0.2 2 0 0 0 0.4 0.8 1.2 1.6 0 0 2.0 1 VI (V) Fig 7. VCC = 2.0 V; IO = 0 A 74AHC1GU04_Q100 Product data sheet Fig 8. 2 VI (V) 3 VCC = 3.0 V; IO = 0 A All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 November 2012 © NXP B.V. 2012. All rights reserved. 5 of 13 74AHC1GU04-Q100 NXP Semiconductors Inverter mna399 6 50 VO (V) ICC (mA) 40 VO Rbias = 560 kΩ VCC 30 3 0.47 μF 20 input output 100 μF VI (f = 1 kHz) ID (drain current) 10 A IO GND mna050 0 0 0 Fig 9. 2 4 6 VI (V) VCC = 5.5 V; IO = 0 A Fig 10. Test set-up for measuring forward transconductance gfs = IO/VI at VO is constant mna400 40 gfs (mA/V) 30 20 10 0 0 2 4 VCC (V) 6 Fig 11. Typical forward transconductance gfs as a function of the supply voltage at Tamb = 25 C 14. Application information Some applications are: • Linear amplifier (see Figure 12) • In crystal oscillator design (see Figure 13) Remark: All values given are typical unless otherwise specified. 74AHC1GU04_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 November 2012 © NXP B.V. 2012. All rights reserved. 6 of 13 74AHC1GU04-Q100 NXP Semiconductors Inverter R2 R1 VCC 1 μF R2 R1 U04 U04 C1 ZL C2 out mna052 mna053 Maximum Vo(p-p) = VCC 1.5 V centered at 0.5 VCC. C1 = 47 pF (typical) G ol G v = – --------------------------------------R1 1 + ------- 1 + G ol R2 C2 = 22 pF (typical) R1 = 1 M to 10 M (typical) R2 optimum value depends on the frequency and required stability against changes in VCC or average minimum ICC (ICC is typically 2 mA at VCC = 3 V and f = 1 MHz). Gol = open loop gain Gv = voltage gain R1 3 k, R2 1 M ZL > 10 k; Gol = 20 (typical) Typical unity gain bandwidth product is 5 MHz. Fig 12. Used as a linear amplifier Fig 13. Crystal oscillator configuration Table 9. External components for resonator (f < 1 MHz) All values given are typical and must be used as an initial set-up. Frequency R1 R2 C1 C2 10 kHz to 15.9 kHz 22 M 220 k 56 pF 20 pF 16 kHz to 24.9 kHz 22 M 220 k 56 pF 10 pF 25 kHz to 54.9 kHz 22 M 100 k 56 pF 10 pF 55 kHz to 129.9 kHz 22 M 100 k 47 pF 5 pF 130 kHz to 199.9 kHz 22 M 47 k 47 pF 5 pF 200 kHz to 349.9 kHz 22 M 47 k 47 pF 5 pF 350 kHz to 600 kHz 22 M 47 k 47 pF 5 pF Table 10. Optimum value for R2 Frequency R2 Optimum for 3 kHz 2.0 k minimum required ICC 8.0 k minimum influence due to change in VCC 6 kHz 1.0 k minimum required ICC 4.7 k minimum influence by VCC 0.5 k minimum required ICC 10 kHz 14 kHz >14 kHz 74AHC1GU04_Q100 Product data sheet 2.0 k minimum influence by VCC 0.5 k minimum required ICC 1.0 k minimum influence by VCC - replace R2 by C3 with a typical value of 35 pF All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 November 2012 © NXP B.V. 2012. All rights reserved. 7 of 13 74AHC1GU04-Q100 NXP Semiconductors Inverter 15. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.425 0.46 0.21 0.3 0.1 0.1 0.60 0.15 7° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC JEITA MO-203 SC-88A EUROPEAN PROJECTION ISSUE DATE 00-09-01 03-02-19 Fig 14. Package outline SOT353-1 (TSSOP5) 74AHC1GU04_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 November 2012 © NXP B.V. 2012. All rights reserved. 8 of 13 74AHC1GU04-Q100 NXP Semiconductors Inverter Plastic surface-mounted package; 5 leads SOT753 D E B y A X HE 5 v M A 4 Q A A1 c 1 2 3 Lp detail X bp e w M B 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.100 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT753 JEITA SC-74A EUROPEAN PROJECTION ISSUE DATE 02-04-16 06-03-16 Fig 15. Package outline SOT753 (SC-74A) 74AHC1GU04_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 November 2012 © NXP B.V. 2012. All rights reserved. 9 of 13 74AHC1GU04-Q100 NXP Semiconductors Inverter 16. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model 17. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC1GU04_Q100 v.1 20121121 Product data sheet - - 74AHC1GU04_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 November 2012 © NXP B.V. 2012. All rights reserved. 10 of 13 74AHC1GU04-Q100 NXP Semiconductors Inverter 18. Legal information 18.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 18.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 18.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74AHC1GU04_Q100 Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 November 2012 © NXP B.V. 2012. All rights reserved. 11 of 13 74AHC1GU04-Q100 NXP Semiconductors Inverter No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 18.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 19. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] 74AHC1GU04_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 21 November 2012 © NXP B.V. 2012. All rights reserved. 12 of 13 74AHC1GU04-Q100 NXP Semiconductors Inverter 20. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 17 18 18.1 18.2 18.3 18.4 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional description . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 3 Static characteristics. . . . . . . . . . . . . . . . . . . . . 3 Dynamic characteristics . . . . . . . . . . . . . . . . . . 4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Typical transfer characteristics . . . . . . . . . . . . 5 Application information. . . . . . . . . . . . . . . . . . . 6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 21 November 2012 Document identifier: 74AHC1GU04_Q100