I n f i n e o n ® L I T I X TM B a s i c
TLD1326EL
3 Channel High Side Current Source
Data Sheet
Rev. 1.1, 2015-03-24
Automotive
TLD1326EL
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
4.1
4.2
4.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
5.1
5.2
5.3
5.3.1
5.3.2
EN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Supply Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN Unused . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN - Pull Up to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN - Direct Connection to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
10
11
12
12
12
6
6.1
6.2
6.3
PWMI Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PWM Dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal PWM Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Internal Supply / EN / PWMI Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
13
14
15
7
7.1
7.2
FB Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
DC/DC Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Electrical Characteristics FB Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8
8.1
8.2
IN_SET Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Output Current Adjustment via RSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Smart Input Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
9
9.1
9.2
9.3
Load Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N-1 Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Double Fault Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics IN_SET Pin and Load Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23
23
25
25
10
10.1
10.1.1
10.1.2
10.2
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Over Load Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reverse Battery Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
27
27
27
27
28
11
11.1
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
12
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
13
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Data Sheet
2
8
8
9
9
Rev. 1.1, 2015-03-24
3 Channel High Side Current Source
LITIXTM Basic
1
TLD1326EL
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
3 Channel device with integrated output stages (current sources),
optimized to drive LEDs
Output current up to 120mA per channel
Low current consumption in sleep mode
PWM-operation supported via VS- and EN-pin
Integrated PWM dimming engine to provide two LED brightness
levels without external logic (e.g. µC)
Output current adjustable via external low power resistor and
possibility to connect PTC resistor for LED protection during over
temperature conditions
Dynamic overhead control
Reverse polarity protection
Overload protection
Undervoltage detection
Infineon® N-1 detection functionality
Wide temperature range: -40 °C < Tj < 150 °C
PG-SSOP14 package with exposed heatslug
Green Product (RoHS compliant)
AEC Qualified
PG-SSOP14
Description
The LITIXTM Basic TLD1326EL is a three channel high side driver IC with integrated output stages. It is designed
to control LEDs with a current up to 120 mA. In typical automotive applications the device is capable to drive i.e.
3 red LEDs per chain (total 9 LEDs) with a current up to 60mA, which is limited by thermal cooling aspects. The
output current is controlled practically independent of load and supply voltage changes.
Table 1
Product Summary
VS(nom)
5.5 V… 40 V
VS(max)
40 V
VOUTx(max)
IOUTx(nom) 60 mA when using a supply voltage range of 8V
Operating voltage
Maximum voltage
Nominal output (load) current
- 18V (e.g. Automotive car battery). Currents up
to IOUT(max) possible in applications with low
thermal resistance RthJA
Type
Package
Marking
TLD1326EL
PG-SSOP14
TLD1326EL
Data Sheet
3
Rev. 1.1, 2015-03-24
TLD1326EL
Overview
Table 1
Product Summary
Maximum output (load) current
Output current accuracy at RSET = 12 kΩ
Current consumption in sleep mode
IOUTx(max)
kLT
IS(sleep,typ)
120 mA; depending on thermal resistance RthJA
750 ± 7%
0.1 µA
Protective functions
- ESD protection
- Under voltage lock out
- Over Load protection
- Over Temperature protection
- Reverse Polarity protection
Diagnostic functions
- N-1 detection, latched function
- SC to Vs (indicated by N-1 diagnosis)
Applications
Designed for exterior LED lighting applications such as tail/brake light, turn indicator, position light, side marker,...
The device is also well suited for interior LED lighting applications such as ambient lighting, interior illumination
and dash board lighting.
Data Sheet
4
Rev. 1.1, 2015-03-24
TLD1326EL
Block Diagram
2
Block Diagram
VS
Internal
supply
EN
Thermal
protection
Output
control
OUT3
PWMI
OUT2
N-1
OUT1
IN_SET Current
DC/DC
control
adjust
TLD1326EL
Figure 1
Data Sheet
FB
GND
Basic Block Diagram
5
Rev. 1.1, 2015-03-24
TLD1326EL
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
Figure 2
Data Sheet
VS
1
VS
2
EN
3
NC
4
PWMI
14
NC
13
OUT3
12
OUT2
11
OUT1
5
10
FB
IN_SET
6
9
GND
N-1
7
8
NC
TLD1326EL
EP
Pin Configuration
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Rev. 1.1, 2015-03-24
TLD1326EL
Pin Configuration
3.2
Pin Definitions and Functions
Pin
Symbol
Input/
Output
Function
1, 2
VS
–
Supply Voltage; battery supply, connect a decoupling capacitor (100 nF 1 µF) to GND
3
EN
I
Enable pin
4
NC
–
Pin not connected
5
PWMI
I/O
PWM Input
6
IN_SET
I/O
Input / SET pin; Connect a low power resistor to adjust the output current
7
N-1
I/O
N-1 pin
8
NC
–
Pin not connected
9
GND
–
1)
10
FB
O
Feedback Output
11
OUT1
O
Output 1
12
OUT2
O
Output 2
13
OUT3
O
Output 3
14
NC
–
Pin not connected
–
1)
Exposed
Pad
GND
Ground
Exposed Pad; connect to GND in application
1) Connect all GND-pins together.
Data Sheet
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Rev. 1.1, 2015-03-24
TLD1326EL
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings 1)
Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin for input pins (I), positive
currents flowing out of the I/O and output pins (O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Max.
VS
VEN
VEN(VS)
VEN VOUTx
VOUTx
VPS
-16
40
V
–
-16
40
V
–
VS - 40
VS + 16
V
–
-16
40
V
–
-1
40
V
–
-16
40
V
–
-0.3
6
V
–
-0.3
6
V
–
-0.3
6
V
–
-0.3
40
V
–
Voltages
4.1.1
Supply voltage
4.1.2
Input voltage EN
4.1.3
Input voltage EN related to VS
4.1.4
Input voltage EN related to VOUTx
VEN - VOUTx
4.1.5
4.1.6
Output voltage
Power stage voltage
VPS = VS - VOUTx
4.1.7
Input voltage PWMI
4.1.8
IN_SET voltage
4.1.9
N-1 voltage
4.1.10
Feedback voltage
VPWMI
VIN_SET
VN-1
VFB
IN_SET current
IIN_SET
–
–
2
8
mA
–
Diagnosis output
IN-1
IFB
IOUTx
-0.5
0.5
mA
–
–
0.5
mA
–
–
130
mA
–
Tj
Tstg
-40
150
°C
–
-55
150
°C
–
Currents
4.1.11
4.1.12
N-1 current
4.1.13
Feedback current
4.1.14
Output current
Temperatures
4.1.15
Junction temperature
4.1.16
Storage temperature
ESD Susceptibility
4.1.17
ESD resistivity to GND
VESD
-2
2
kV
Human Body
Model (100 pF via
1.5 kΩ)2)
4.1.18
ESD resistivity all pins to GND
-500
500
V
CDM3)
4.1.19
ESD resistivity corner pins to GND
VESD
VESD
-750
750
V
CDM3)
1) Not subject to production test, specified by design
2) ESD susceptibility, Human Body Model “HBM” according to ANSI/ESDA/JEDEC JS-001-2011
3) ESD susceptibility, Charged Device Model “CDM” according to JESD22-C101E
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Data Sheet
8
Rev. 1.1, 2015-03-24
TLD1326EL
General Product Characteristics
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2
Pos.
Functional Range
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Conditions
4.2.20
Supply voltage range for
normal operation
VS(nom)
5.5
40
V
–
4.2.21
Power on reset threshold
VS(POR)
–
5
V
VEN = VS
RSET = 12 kΩ
IOUTx = 80% IOUTx(nom)
VOUTx = 2.5 V
4.2.22
Junction temperature
Tj
-40
150
°C
–
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Pos.
Thermal Resistance
Parameter
4.3.1
Junction to Case
4.3.2
Junction to Ambient 1s0p board
Symbol
RthJC
RthJA1
Limit Values
Min.
Typ.
Max.
–
8
10
–
–
4.3.3
Junction to Ambient 2s2p board
61
56
Unit
Conditions
K/W
1) 2)
K/W
1) 3)
Ta = 85 °C
Ta = 135 °C
–
–
RthJA2
K/W
–
–
45
43
–
–
1) 4)
Ta = 85 °C
Ta = 135 °C
1) Not subject to production test, specified by design. Based on simulation results.
2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed Pad are fixed to
ambient temperature). Ta = 85°C, Total power dissipation 1.5 W.
3) The RthJA values are according to Jedec JESD51-3 at natural convection on 1s0p FR4 board. The product (chip + package)
was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 70µm Cu, 300 mm2 cooling area. Total power dissipation 1.5 W
distributed statically and homogenously over all power stages.
4) The RthJA values are according to Jedec JESD51-5,-7 at natural convection on 2s2p FR4 board. The product (chip +
package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (outside 2 x 70 µm Cu, inner 2 x
35µm Cu). Where applicable, a thermal via array under the exposed pad contacted the first inner copper layer. Total power
dissipation 1.5 W distributed statically and homogenously over all power stages.
Data Sheet
9
Rev. 1.1, 2015-03-24
TLD1326EL
EN Pin
5
EN Pin
The EN pin is a dual function pin:
Internal Supply
Output Control
EN
V EN
Figure 3
Block Diagram EN pin
Note: The current consumption at the EN-pin IEN needs to be added to the total device current consumption. The
total current consumption is the sum of the currents at the VS-pin IS and the EN-pin IEN.
5.1
EN Function
If the voltage at the pin EN is below a threshold of VEN(off) the LITIXTM Basic IC will enter Sleep mode. In this state
all internal functions are switched off, the current consumption is reduced to IS(sleep). A voltage above VEN(on) at this
pin enables the device after the Power on reset time tPOR.
VS
V EN
IOU T
t
t
tPOR
100%
80%
t
Figure 4
Data Sheet
Power on reset
10
Rev. 1.1, 2015-03-24
TLD1326EL
EN Pin
5.2
Internal Supply Pin
The EN pin can be used to supply the internal logic. There are two typical application conditions, where this feature
can be used:
1) In “DC/DC control Buck” configurations, where the voltage Vs can be below 5.5V (see Figure 20 for details).
2) In configurations, where a PWM signal is applied at the Vbatt pin of a light module. The buffer capacitor CBUF is
used to supply the LITIXTM Basic IC during Vbatt low (Vs low) periods. This feature can be used to minimize the
turn-on time to the values specified in Pos. 10.2.13. Otherwise, the power-on reset delay time tPOR (Pos. 6.3.6)
has to be considered.
The capacitor can be calculated using the following formula:
I EN ( LS )
C BUF = tLOW ( max ) ⋅ -------------------------------------------------V S – V D1 – V S ( POR )
(1)
See also a typical application drawing in Chapter 11.
VBATT
VS
D1
EN
CBUF
Internal
supply
Thermal
protection
Output
control
OUT3
OUT2
OUT1
IN_SET
RSET
Current
adjust
TM
LITIX
Basic
LEDBasic
Driver
GND
GND
Figure 5
Data Sheet
External circuit when applying a fast PWM signal on VBATT
11
Rev. 1.1, 2015-03-24
TLD1326EL
EN Pin
V EN
t
V BATT
IOU T
t
tON (VS)
100%
80%
Switch off behavior depends on
V BATT and load characteristics
20%
t
Figure 6
Typical waveforms when applying a fast PWM signal on VBATT
The parameter tON(VS) is defined at Pos. 10.2.13. The parameter tOFF(VS) depends on the load and supply voltage
VBATT characteristics.
5.3
EN Unused
In case of an unused EN pin, there are two different ways to connect it:
5.3.1
EN - Pull Up to VS
The EN pin can be connected with a pull up resistor (e.g. 10 kΩ) to Vs potential. In this configuration the LITIXTM
Basic IC is always enabled.
5.3.2
EN - Direct Connection to VS
The EN pin can be connected directly to the VS pin (IC always enabled). This configuration has the advantage
(compared to the configuration described in Chapter 5.3.1) that no additional external component is required.
Data Sheet
12
Rev. 1.1, 2015-03-24
TLD1326EL
PWMI Pin
6
PWMI Pin
The PWMI pin is designed as a dual function pin.
IPWMI(L)
Output Control
PWMI
VPWMI
Figure 7
Block Diagram PWMI pin
The pin can be used for PWM-dimming via a push-pull stage of a micro controller, which is connecting the PWMIpin to a low or high potential.
Note: The micro controller’s push-pull stage has to able to sink currents according to Pos. 6.3.16 to activate the
device.
Furthermore, the device offers also an internal PWM unit by connecting an external-RC network according to
Figure 10.
6.1
PWM Dimming
A PWM signal can be applied at the PWMI pin for LED brightness regulation. The dimming frequency can be
adjusted in a very wide range (e.g. 400 Hz). The PWMI pin is low active. Turn on/off thresholds VPWMI(L) and
VPWMI(H) are specified in parameters Pos. 6.3.13 and Pos. 6.3.14.
V PWMI
IOU T
tON (PWMI )
tOFF(PWMI )
t
100%
80%
20%
t
Figure 8
Data Sheet
Turn on and Turn off time for PWMI pin usage
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Rev. 1.1, 2015-03-24
TLD1326EL
PWMI Pin
6.2
Internal PWM Unit
Connecting a resistor and a capacitor in parallel on the PWMI pin enables the internal pulse width modulation unit.
The following figure shows the charging and discharging defined by the RC-network according to and the internal
PWM unit.
VPWMI
Outputs OFF
VPWMI(H)
Internal PWM
VPWMI(L)
Outputs ON
t
OUTON
Figure 9
OUT - OFF
OUTON
OUT - OFF
OUTON
OUT - OFF
OUTON
OUT - OFF
PWMI operating voltages
The PWM Duty cycle (DC) and the PWM frequency can be adjusted using the formulas below. Please use only
typical values of VPWMI(L), VPWMI(H) and IPWMI(on) for the calculation of tPWMI(on) and tPWMI(off) (as described in
Pos. 6.3.13 to Pos. 6.3.16).
⎛ V PWMI ( H ) – I PWMI ( on ) ⋅ R PWMI⎞
-⎟
t PWMI ( on ) = –R PWMI ⋅ C PWMI ⋅ LN ⎜ ------------------------------------------------------------------------------⎝ V PWMI ( L ) – I PWMI ( on ) ⋅ R PWMI ⎠
(2)
⎛ V PWMI ( H )⎞
-⎟
t PWMI ( off ) = R PWMI ⋅ C PWMI ⋅ LN ⎜ ------------------------⎝ V PWMI ( L ) ⎠
(3)
1
f PWMI = --------------------------------------------------------t PWMI ( on ) + tPWMI ( off )
(4)
DC = tPWMI ( on ) ⋅ f PWMI
(5)
Out of this equations the required CPWMI and RPWMI can be calculated:
t
t
⎞ PWMI ( off )
PWMI ( on )
------------------------
⎛ V PWMI ( L )
– I PWMI ( on ) ⋅ t PWMI ( off ) ⋅ ⎜ --------------------------⎟
⎝ V PWMI ( H )⎠
–1
C PWMI = ------------------------------------------------------------------------------------------------------------------------------------------------------------------tPWMI ( on )
-----------------------⎛ V PWMI ( L ) ⎞
⎛ V PWMI ( L ) ⎞ t PWMI ( off )
LN ⎜ --------------------------⎟ ⋅ V PWMI ( L ) ⋅ ⎜ --------------------------⎟
– V PWMI ( H )
⎝ V PWMI ( H )⎠
⎝ V PWMI ( H )⎠
t PWMI ( off )
RPWMI = --------------------------------------------------------------⎛ V PWMI ( H )⎞
-⎟
C PWMI ⋅ LN ⎜ ------------------------⎝ V PWMI ( L ) ⎠
Data Sheet
(6)
(7)
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Rev. 1.1, 2015-03-24
TLD1326EL
PWMI Pin
See Figure 10 for a typical external circuitry.
Note: In case of junction temperatures above Tj(CRT) (Pos. 10.2.14) the device provides a temperature dependent
current reduction feature as descirbed in Chapter 10.1.1. In case of output current reduction IIN_SET is
reduced as well, which leads to increased turn on-times tPWMI(on), because the CPWMI is charged slower. The
turn off-time tPWMI(off) remains the same.
VBATT
VS
10kΩ
Internal
supply
EN
Output
control
Thermal
protection
CN-1
RPWMI CPWMI
RSET
OUT3
PWMI
OUT2
N-1
OUT1
IN_SET
Current
adjust
DC/DC
control
Basic LED Driver
FB
GND
GND
Figure 10
Typical circuit using internal PWM unit
6.3
Electrical Characteristics Internal Supply / EN / PWMI Pin
Electrical Characteristics Internal Supply / EN / PWMI pin
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
6.3.1
Current consumption,
sleep mode
IS(sleep)
6.3.2
Current consumption,
active mode
IS(on)
Limit Values
Min.
Typ.
Max.
–
0.1
2
Unit
Conditions
µA
1)
mA
–
–
–
–
–
–
1.7
1.0
1.75
VEN = 0.5 V
Tj < 85 °C
VS = 18 V
VOUTx = 3.6 V
2)
VPWMI= 0.5 V
IIN_SET = 0 µA
Tj < 105 °C
VS = 18 V
VOUTx = 3.6V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
Data Sheet
15
Rev. 1.1, 2015-03-24
TLD1326EL
PWMI Pin
Electrical Characteristics Internal Supply / EN / PWMI pin (cont’d)
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
6.3.3
Current consumption,
IS(dis,IN_SET)
device disabled via IN_SET
Limit Values
Min.
–
–
–
6.3.4
Current consumption,
device disabled via PWMI
–
–
–
Current consumption,
active mode in single fault
detection condition
Conditions
mA
2)
Max.
mA
VS and EN-pin
2)
VS = 18 V
Tj < 105 °C
VPWMI= 3.4 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
2)
VS = 18 V
Tj < 105 °C
RSET = 12 kΩ
VPWMI= 0.5 V
VOUTx = 18 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
1)
mA
–
–
–
1.9
1.0
2.0
IS(fault)
–
–
–
–
–
–
6.0
4.9
5.9
VS = VEN = 0 → 13.5 V
VOUTx(nom) = 3.6 ± 0.3V
IOUTx = 80% IOUTx(nom)
VEN = 5.5 V
VOUTx = 3 V
IOUTx = 50% IOUTx(nom)
VEN = 5.5 V
VOUTx = 3.6 V
IOUTx ≥ 90% IOUTx(nom)
6.3.6
Power-on reset delay time 3) tPOR
–
–
25
µs
6.3.7
Required supply voltage for VS(on)
output activation
–
–
4
V
6.3.8
Required supply voltage for VS(CC)
current control
–
–
5.2
V
6.3.9
VEN(on)
EN turn off threshold
VEN(off)
EN input current during low IEN(LS)
–
–
2.5
V
–
0.8
–
–
V
–
–
–
1.8
mA
1)
6.3.10
6.3.11
EN turn on threshold
supply voltage
Data Sheet
16
VS = 18 V
Tj < 105 °C
VIN_SET = 5 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
1.65
0.9
1.7
IS(dis,PWMI)
–
–
–
6.3.5
Typ.
Unit
VS = 4.5 V
Tj < 105 °C
VEN = 5.5 V
Rev. 1.1, 2015-03-24
TLD1326EL
PWMI Pin
Electrical Characteristics Internal Supply / EN / PWMI pin (cont’d)
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
6.3.12
EN high input current
IEN(H)
Limit Values
Min.
Typ.
–
–
–
–
–
–
–
–
Unit
Conditions
mA
Tj < 105 °C
VS = 13.5 V, VEN = 5.5 V
VS = 18 V, VEN = 5.5 V
VS = VEN = 18 V
1)
VS = 18 V, REN = 10 kΩ
Max.
0.1
0.1
1.65
0.45
between VS and EN-pin
6.3.13
PWMI (active low)
Switching low threshold
(outputs on)
VPWMI(L)
1.5
1.85
2.3
V
1)4)
6.3.14
PWMI(active low)
Switching high threshold
(outputs off)
VPWMI(H)
2.45
2.85
3.2
V
1)4)5)
VS = 8...18 V
6.3.15
ΔVPWMI
PWMI
Switching threshold
difference VPWMI(H) - VPWMI(L)
0.75
1
1.10
V
1)4)5)
VS = 8...18 V
6.3.16
PWMI (active low)
Low input current with
active channels (voltage
<VPWMI(L))
IPWMI(on)
IIN_SET
IIN_SET *4 IIN_SET
µA
1)
PWMI(active low)
High input current
IPWMI(off)
6.3.17
1)
2)
3)
4)
5)
*3.1
-5
*4.9
–
5
µA
VS = 8...18 V
Tj = 25...115 °C
IIN_SET = 100 µA
VPWMI= 1.7 V
VEN = 5.5 V
VS = 8...18 V
VPWMI= 5 V
VEN = 5.5 V
VS = 8...18 V
Not subject to production test, specified by design
The total device current consumption is the sum of the currents IS and IEN(H), please refer to Pos. 6.3.12
See also Figure 4
Parameter valid if an external PWM signal is applied
If TTL level compatibility is required, use µC open drain output with pull up resistor
Data Sheet
17
Rev. 1.1, 2015-03-24
TLD1326EL
FB Pin
7
FB Pin
The following block diagram shows the feedback pin functionality.
OUT1
OUT2
OUT3
Output voltage
feedback
IFB(SOC)
FB
Figure 11
Block Diagram FB pin
7.1
DC/DC Control
With the FB pin the LITIXTM Basic IC realizes the dynamic overhead control. The IC provides a voltage feedback
to an external DC/DC converter. Using the circuit shown in Figure 20 it is possible to adjust the DC/DC output
voltage in a way that the voltage drop over the output stages of the LITIXTM Basic IC is minimized - dynamic
overhead control. This leads to a significant reduction of the overall driver’s power dissipation and an increased
system efficiency. Figure 21 shows the same concept but, using a higher number of LEDs per LED chain (please
note that the cathode of the LED chain is connected to VIN).
Note: For correct output current control and dynamic overhead control the parameters as specified in Pos. 7.2.1
and Pos. 7.2.2 need to be considered. FB source currents higher than given in Pos. 7.2.1 lead to a drop of
the FB regulation voltage VFB(nom).
The resistor RFB(PD) can be dimensioned by applying equations Equation (8) and Equation (9). The following
parameters are required:
•
•
•
•
VOUT represents the maximum LED loads forward voltage, i.e. number of LEDs multiplied with the maximum
LED forward voltage. Temperature drifts of the LED’s forward voltage needs to be considered!
VBO represents the DC/DC output voltage, which is predefined by the feedback resistors (Figure 20: RFB1,
RFB2, Figure 21: RFB1, RFB2, RFB3). Please refer to the according DC/DC device data sheet for the dimensioning
of those resistors.
nlen represents the numbers of LITIXTM Basics using the longest LED-chains (e.g. if there are 3 devices
connected to one DC/DC converter and two devices using LED chains with 7 LEDs and one device is used
with LED chain lengths of 6 LEDs the according nlen = 2.)
β represents the DC gain of the external bipolar transistor, which is connected to the DC/DC’s feedback pin.
5
VOUT – 0.5 V 1
VOUT – 1.1 V
1.7 ⋅ 10 Ω
- ⋅ ---------- , --------------------------------------------------R FB ( PD ,min ) = min { --------------------------------⋅ ------------------------- }
–5
n len VBO – V OUT – 1.1 V
n len
4 ⋅ 10 A
V OUT – 1.1 V
R FB ( PD ,max ) = -------------------------------------------------V BO – V OUT 1
-------------------------------- ⋅ ------------R FB1
β+1
Data Sheet
(8)
(9)
18
Rev. 1.1, 2015-03-24
TLD1326EL
FB Pin
7.2
Electrical Characteristics FB Pin
Electrical Characteristics FB pin
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Unit
Conditions
Max.
7.2.1
FB regulation voltage
VFB(nom)
(VOUT - VOUT - 1 –
1)*0.9
V
IFB(SOC) = 25 µA
7.2.2
FB operating voltage at
power stage
VPS(FB) = VS - VOUTx
VPS(FB)
–
V
1)
–
10
1) Not subject to production test, specified by design
Data Sheet
19
Rev. 1.1, 2015-03-24
TLD1326EL
IN_SET Pin
8
IN_SET Pin
The IN_SET pin is a multiple function pin for output current definition, input and diagnostics:
Logic
IN_SET
IIN_SET
VIN_SET
VIN_SET(N-1)
GND
Figure 12
Block Diagram IN_SET pin
8.1
Output Current Adjustment via RSET
The output current for all three channels can only be adjusted simultaneously. The current adjustment can be done
by placing a low power resistor (RSET) at the IN_SET pin to ground. The dimensioning of the resistor can be done
using the formula below:
kR SET = ---------I OUT
(10)
The gain factor k (RSET * output current) is specified in Pos. 10.2.4 and Pos. 10.2.5. The current through the RSET
is defined by the resistor itself and the reference voltage VIN_SET(ref), which is applied to the IN_SET during supplied
device.
8.2
Smart Input Pin
The IN_SET pin can be connected via RSET to the open-drain output of a µC or to an external NMOS transistor as
described in Figure 13. This signal can be used to turn off the output stages of the IC. A minimum IN_SET current
of IIN_SET(act) is required to turn on the output stages. This feature is implemented to prevent glimming of LEDs
caused by leakage currents on the IN_SET pin, see Figure 15 for details. In addition, the IN_SET pin offers the
diagnostic feedback information. In case of a fault event the IN_SET voltage is increased to VIN_SET(N-1) Pos. 9.3.2.
Therefore, the device has two voltage domains at the IN_SET-pin, which is shown in Figure 16.
Microcontroller
(e.g. XC866)
OUT
RSET/2
RSET/2
IN_SET
Current
adjust
Basic LED Driver
GND
IN
VDDP = 5 V
Figure 13
Data Sheet
Schematics IN_SET interface to µC
20
Rev. 1.1, 2015-03-24
TLD1326EL
IN_SET Pin
The resulting switching times are shown in Figure 14:
IIN_ SET
tON (IN_ SET )
IOU T
t
tOFF(IN _ SET)
100%
80%
20%
t
Figure 14
Switching times via IN_SET
IOUT [mA]
k = IOUTx * VIN_SET(ref) / IIN_SETx
IOUTx
IIN_SET(ACT)
Figure 15
Data Sheet
IIN_SETx
IIN_SET [µA]
IOUT versus IINSET
21
Rev. 1.1, 2015-03-24
TLD1326EL
IN_SET Pin
V IN_ SET
VIN _SET( N- 1)m ax
Diagnostic voltage range
V IN_ SET(N -1) m in
VIN _SET (ref ) m ax
Normal operation and high temperature current
reduction range
Figure 16
Data Sheet
Voltage domains for IN_SET pin, if ST pin is connected to GND
22
Rev. 1.1, 2015-03-24
TLD1326EL
Load Diagnosis
9
Load Diagnosis
9.1
N-1 Detection
The N-1 diagnosis is specially designed to detect error conditions in LED arrays with multiple LED chains used for
one light function. If one LED within one chain fails in open condition the respective LED chain is off. Different
automotive applications require a complete deactivation of a light function, if the desired brightness of the function
(LED array) can not be achieved due to an internal error condition. Such a deactivation feature is integrated in the
LITIXTM Basic IC.
The functionality of the N-1 pin is shown in the following block diagram:
IN-1
Output Control
N-1
V N-1
Figure 17
Block Diagram N-1 pin
In applications, where more than one LITIXTM Basic IC is used, the IN_SET pins can be connected via the PWMI
pins as shown in Figure 20 and Figure 21. This circuit can be used to disable all output stages (of all LITIXTM
Basic ICs) during an open load event on one channel. The outputs are deactivated after a N-1 filter time tN-1, which
is defined by the charging current IN-1 (Pos. 9.3.6). The time is adjustable with a capacitor connected to the N-1
pin according the following equation:
C N – 1 ⋅ VN – 1 ( th )
t typ = -------------------------------------IN – 1
Data Sheet
(11)
23
Rev. 1.1, 2015-03-24
TLD1326EL
Load Diagnosis
V EN
V EN(on )
V EN(off )
t
VIN _ SET
VIN _SET (N- 1)
Slope depends on RS E T
V IN_SET (ref )
t
V N-1
VN- 1(th )
tN -1
t
VOU T
VS
VS – VPS( N-1 )
tON (EN )
VF
open load
occurs
open load
disappears
t
Figure 18
IN_SET behavior during open load condition
The N-1 status is latched. The output stages can be re-enabled by a Low to High transition at the EN pin or by a
Power on reset. To provide a Limp Home functionality (lower number of LEDs instead of complete deactivation)
in the case of a partially damaged LED array, the N-1 filter time tN-1 can be used. If a PWM signal with an ON-time
of less than tN-1 is applied to the VS and EN pins, the N-1 detection feature will not be activated.
If there is more than one device used for N-1 detection the maximum number of devices, which can be connected
as shown in Figure 20 and Figure 21, is limited to nN-1. The maximum number of devices in N-1 configuration is
Data Sheet
24
Rev. 1.1, 2015-03-24
TLD1326EL
Load Diagnosis
calculated according to Equation (12), and the precondition of Equation (13) has to be fulfilled. The pull-down
resistor RPWMI is calculated according to Equation (14) and Equation (15).
⎛
V PWMI ( H, max ) + V F⎞
⎜ I IN_SET(OL,min) – -------------------------------------------------⎟ ⋅ V PWMI ( H, min ) ⋅ R SET(min)
RSET(min)
⎝
⎠
n N – 1 ≤ -------------------------------------------------------------------------------------------------------------------------------------------------VPWMI ( H, max ) ⋅ 4 ⋅ VIN_SET(max)
(12)
VPWMI ( H, min ) ⋅ V IN_SET(min) ⋅ R SET(min)
--------------------------------------------------------------------------------------->1
2
(13)
( V IN_SET(max) ) ⋅ R SET(max)
VPWMI ( H, max )
R PWMI(min) = --------------------------------------------------------------------------------VPWMI ( H, max ) + VF
I IN_SET(OL,min) – ------------------------------------------------RSET(max)
(14)
V PWMI ( H, min )
R PWMI(max) = --------------------------------------------------VIN_SET(max)
n N – 1 ⋅ 4 ⋅ -----------------------------R SET(min)
(15)
VF represents the voltage drop across the diode between the IN_SET- and the PWMI-pin.
Note: If one channel of the device should not be used, the according output needs to be connected to GND, which
leads to a disabling of this output.
Note: In case of a double fault, where the loads of two channels are faulty at the same time, the device operates
as in normal operation. This feature is implemented to avoid any unwanted switch off during significant
supply voltage drops. Please refer to Chapter 9.2.
9.2
Double Fault Conditions
The TLD1326EL has an integrated double fault detection feature. This feature is implemented to detect significant
supply voltage drops. During such supply voltage drops close to the forward voltage of the LEDs the drivers
outputs remain active. In case of load faults on two or more outputs within the time period tN-1 the device disables
the diagnosis to avoid any uncorrect open load diagnosis during low supply voltages close to the forward voltages
of the connected LED chains. If the faults between two or three channels happen with a delay of longer than tOL
the double fault detection feature is not active, i.e. the device is not turned on.
9.3
Electrical Characteristics IN_SET Pin and Load Diagnosis
Electrical Characteristics IN_SET pin and Load Diagnosis
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
Min.
Typ.
Max.
9.3.1
IN_SET reference
voltage
VIN_SET(ref)
1.19
1.23
1.27
IN_SET N_1 voltage
VIN_SET(N-1)
4
9.3.2
Data Sheet
Limit Values
–
25
5.5
Unit
Conditions
V
1)
V
VOUTx = 3.6 V
Tj = 25...115 °C
1)
VS > 8 V
Tj = 25...150 °C
VS = VOUTx (OL) x
Rev. 1.1, 2015-03-24
TLD1326EL
Load Diagnosis
Electrical Characteristics IN_SET pin and Load Diagnosis (cont’d)
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
9.3.3
IN_SET N_1 voltage
VIN_SET(N-1)
3.2
–
5.5
Unit
Conditions
V
1)
VS = 5.5 V
9.3.4
IN_SET N_1 current
IIN_SET(N-1)
1.5
–
7.4
mA
9.3.5
N-1 high threshold
2.45
2.85
3.2
V
9.3.6
N-1 output current
VN-1(th)
IN-1
12
20
28
µA
9.3.7
N-1 detection voltage
VPS(N-1) = VS - VOUTx
VPS(N-1)
0.2
–
0.4
V
Tj = 25...150 °C
VS = VOUTx (OL) x
1)
VS > 8 V
Tj = 25...150 °C
VIN_SET = 4 V
VS = VOUTx (OL)
VS > 8 V
VS > 8 V
VN-1 = 2 V
VS > 8 V
9.3.8
IIN_SET(act)
IN_SET activation
current without turn on of
output stages
2
–
15
µA
See Figure 15
1) Not subject to production test, specified by design
Data Sheet
26
Rev. 1.1, 2015-03-24
TLD1326EL
Power Stage
10
Power Stage
The output stages are realized as high side current sources with a current of 120 mA. During off state the leakage
current at the output stage is minimized in order to prevent a slightly glowing LED.
The maximum current of each channel is limited by the power dissipation and used PCB cooling areas (which
results in the applications RthJA).
For an operating current control loop the supply and output voltages according to the following parameters have
to be considered:
•
•
•
Required supply voltage for current control VS(CC), Pos. 6.3.8
Voltage drop over output stage during current control VPS(CC), Pos. 10.2.6
Required output voltage for current control VOUTx(CC), Pos. 10.2.7
10.1
Protection
The device provides embedded protective functions, which are designed to prevent IC destruction under fault
conditions described in this data sheet. Fault conditions are considered as “outside” normal operating range.
Protective functions are neither designed for continuous nor for repetitive operation.
10.1.1
Over Load Behavior
An over load detection circuit is integrated in the LITIXTM Basic IC. It is realized by a temperature monitoring of the
output stages (OUTx).
As soon as the junction temperature exceeds the current reduction temperature threshold Tj(CRT) the output current
will be reduced by the device by reducing the IN_SET reference voltage VIN_SET(ref). This feature avoids LED’s
flickering during static output overload conditions. Furthermore, it protects LEDs against over temperature, which
are mounted thermally close to the device. If the device temperature still increases, the three output currents
decrease close to 0 A. As soon as the device cools down the output currents rise again.
IOU T
V IN_ SET
Tj (C R T)
Figure 19
Tj
Output current reduction at high temperature
Note: This high temperature output current reduction is realized by reducing the IN_SET reference voltage voltage
(Pos. 9.3.1). In case of very high power loss applied to the device and very high junction temperature the
output current may drop down to IOUTx = 0 mA, after a slight cooling down the current increases again.
10.1.2
Reverse Battery Protection
The TLD1326EL has an integrated reverse battery protection feature. This feature protects the driver IC itself, but
also connected LEDs. The output reverse current is limited to IOUTx(rev) by the reverse battery protection.
Data Sheet
27
Rev. 1.1, 2015-03-24
TLD1326EL
Power Stage
Note: Due to the reverse battery protection a reverse protection diode for the light module may be obsolete. In case
of high ISO-pulse requirements and only minor protecting components like capacitors a reverse protection
diode may be reasonable. The external protection circuit needs to be verified in the application.
10.2
Electrical Characteristics Power Stage
Electrical Characteristics Power Stage
Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUTx = 3.6 V, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
10.2.1
Output leakage current
Typ.
Unit
Conditions
µA
VEN = 5.5 V
IIN_SET = 0 µA
VOUTx = 2.5 V
Tj = 150 °C
1)
Tj = 85 °C
1)
VEN = 5.5 V
IIN_SET = 0 µA
VOUTx = VS = 40 V
1)
VS = -16 V
Max.
IOUTx(leak)
–
–
–
–
7
3
10.2.2
Output leakage current in
boost over battery setup
–
IOUTx(leak,B2B)
–
50
µA
10.2.3
Reverse output current
-IOUTx(rev)
–
1
µA
–
Output load: LED with
break down voltage
< - 0.6 V
10.2.4
10.2.5
Output current accuracy
limited temperature range
Output current accuracy
over temperature
1)
kLT
697
645
750
750
803
855
697
645
750
750
803
855
kALL
10.2.6
Voltage drop over power
VPS(CC)
stage during current control
VPS(CC) = VS - VOUTx
0.75
–
–
V
10.2.7
Required output voltage for VOUTx(CC)
current control
2.3
–
–
V
10.2.8
Maximum output current
120
–
–
mA
IOUT(max)
Tj = 25...115 °C
VS = 8...18 V
VPS = 2 V
RSET = 6...12 kΩ
RSET = 30 kΩ
1)
Tj = -40...115 °C
VS = 8...18 V
VPS = 2 V
RSET = 6...12 kΩ
RSET = 30 kΩ
1)
VS = 13.5 V
RSET = 12 kΩ
IOUTx ≥ 90% of
(kLT(typ)/RSET)
1)
VS = 13.5 V
RSET = 12 kΩ
IOUTx ≥ 90% of
(kLT(typ)/RSET)
RSET = 4.7 kΩ
The maximum output
current is limited by the
thermal conditions.
Please refer to
Pos. 4.3.1 - Pos. 4.3.3
Data Sheet
28
Rev. 1.1, 2015-03-24
TLD1326EL
Power Stage
Electrical Characteristics Power Stage (cont’d)
Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUTx = 3.6 V, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
10.2.9
PWMI turn on time
tON(PWMI)
Limit Values
Min.
Typ.
Max.
–
–
15
Unit
Conditions
µs
2)
VS = 13.5 V
RSET = 12 kΩ
PWMI → L
10.2.10 PWMI turn off time
tOFF(PWMI)
–
–
10
µs
IOUTx = 80% of
(kLT(typ)/RSET)
2)
VS = 13.5 V
RSET = 12 kΩ
PWMI → H
10.2.11 IN_SET turn on time
tON(IN_SET)
–
–
15
µs
10.2.12 IN_SET turn off time
tOFF(IN_SET)
–
–
10
µs
10.2.13 VS turn on time
tON(VS)
–
–
20
µs
10.2.14 Current reduction
temperature threshold
Tj(CRT)
–
140
–
°C
10.2.15 Output current during
current reduction at high
temperature
IOUT(CRT)
85% of –
(kLT(typ)/
RSET)
–
A
IOUTx = 20% of
(kLT(typ)/RSET)
VS = 13.5 V
IIN_SET = 0 → 100 µA
IOUTx = 80% of
(kLT(typ)/RSET)
VS = 13.5 V
IIN_SET = 100 → 0 µA
IOUTx = 20% of
(kLT(typ)/RSET)
1) 3)
VEN = 5.5 V
RSET = 12 kΩ
VS = 0 → 13.5 V
IOUTx = 80% of
(kLT(typ)/RSET)
1)
IOUTx = 95% of
(kLT(typ)/RSET)
1)
RSET = 12 kΩ
Tj = 150 °C
1) Not subject to production test, specified by design
2) see also Figure 8
3) see also Figure 6
Data Sheet
29
Rev. 1.1, 2015-03-24
TLD1326EL
Application Information
11
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
VS
VBatt
DRV
8
VS
BDS
5
BUO
6
CS
Cbootstrap
LBU
TLD5085
7
EN
1
PWMI
3
RCOMP
RFB1
CVS =4.7nF
CBU1
VS
Internal
supply
EN
COMP
GND
CCOMP
DBU
VBO
2
FB
Thermal
protection
4
Output
control
4.7nF** 4.7nF** 4.7nF**
OUT3
PWMI
RFB2
OUT2
N-1
CN-1
1nF
OUT1
IN_SET
Current
adjust
DC/DC
control
Basic
LITIXTMLED
Basic Driver
RSET
FB
GND
RFB(PD)
V BO
CVS =4.7nF
VS
EN
Internal
supply
Thermal
protection
CN-1
4.7nF** 4.7nF** 4.7nF**
OUT3
PWMI
OUT2
N-1
OUT1
IN_SET
TM
RSET
Output
control
Current
adjust
LITIX LED
Basic Driver
Basic
DC/DC
control
FB
GND
** For EMI improvement, if required.
Figure 20
Data Sheet
System diagram DC/DC control Buck + N-1 detection
30
Rev. 1.1, 2015-03-24
TLD1326EL
Application Information
DRV
VBATT
LBO
VIN
DBO
CIN
V BO
CBO
IN
SWCS
TLD5095
SGND
RFB1
C VS=4.7nF
T SW
SWO
VS
10kΩ
Internal
supply
EN
RCS
Thermal
protection
ROVH
Output
control
PWMI
OUT2
N-1
OVFB
CN-1
R OVL
OUT1
IN_SET
Current
adjust
DC/DC
control
TM
EN / PWMI
COMP
CCOMP
FBL
RFB2
GND
PWMO
RFB3
V IN
VBO
RPWMI
C VS=4.7nF
VS
10kΩ
GND
RFREQ
FB
FBH
IVCC
R COMP
LITIX LED
Basic Driver
Basic
R SET
ST
FREQ / SYNC
4.7nF** 4.7nF** 4.7nF**
OUT3
CIVCC
Internal
supply
EN
Thermal
protection
1nF
RFB(PD)
CN-1
R SET
Output
control
4.7nF** 4.7nF** 4.7nF**
OUT3
PWMI
OUT2
N-1
OUT1
IN_SET
Current
adjust
LITIXTMLED
Basic Driver
Basic
DC/DC
control
FB
GND
V IN
* For EMI improvement, if required, ≈10nF
Figure 21
System diagram DC/DC control Boost + N-1 detection
Note: This is a very simplified example of an application circuit. The function must be verified in the real application.
11.1
•
Further Application Information
For further information you may contact http://www.infineon.com/
Data Sheet
31
Rev. 1.1, 2015-03-24
TLD1326EL
Package Outlines
12
Package Outlines
0.19 +0.06
0.08 C
0.15 M C A-B D 14x
0.64 ±0.25
1
8
1
7
0.2
M
D 8x
Bottom View
3 ±0.2
A
14
6 ±0.2
D
Exposed
Diepad
B
0.1 C A-B 2x
14
7
8
2.65 ±0.2
0.25 ±0.05 2)
0.1 C D
8˚ MAX.
C
0.65
3.9 ±0.11)
1.7 MAX.
Stand Off
(1.45)
0 ... 0.1
0.35 x 45˚
4.9 ±0.11)
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion
Dimensions in mm
PG-SSOP-14-1,-2,-3-PO V02
Figure 22
PG-SSOP14
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Data Sheet
32
Rev. 1.1, 2015-03-24
TLD1326EL
Revision History
13
Revision History
Revision
Date
Changes
1.0
2013-08-08
Inital revision of data sheet
1.1
2015-03-19
Updated parameters KLT and KALL in the chapter Power Stage.
Data Sheet
33
Rev. 1.1, 2015-03-24
Edition 2015-03-24
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2015 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
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For further information on technology, delivery terms and conditions and prices, please contact the nearest
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