I n f i n e o n ® L I T I X TM B a s i c TLD2326EL 3 Channel High Side Current Source Data Sheet Rev. 1.1, 2015-03-24 Automotive TLD2326EL 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 3.1 3.2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 4.1 4.2 4.3 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5.1 5.2 5.3 5.3.1 5.3.2 5.4 EN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EN Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internal Supply Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EN Unused . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EN - Pull Up to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EN - Direct Connection to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Internal Supply / EN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6.1 6.2 FB Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 DC/DC Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrical Characteristics FB Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 7.1 7.2 IN_SETx Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Output Current Adjustment via RSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Smart Input Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8 8.1 8.2 8.3 8.4 Load Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit to GND detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Double Fault Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics IN_SET Pin and Load Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 20 20 21 23 9 9.1 9.1.1 9.1.2 9.2 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Over Load Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse Battery Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 24 24 24 25 10 10.1 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 11 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 12 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Data Sheet 2 8 8 9 9 10 10 11 12 12 12 13 Rev. 1.1, 2015-03-24 3 Channel High Side Current Source LITIXTM Basic 1 TLD2326EL Overview Features • • • • • • • • • • • • • • 3 Channel device with integrated output stages (current sources), optimized to drive LEDs Output current up to 120mA per channel Low current consumption in sleep mode PWM-operation supported via VS- and EN-pin Output current adjustable via external low power resistor and possibility to connect PTC resistor for LED protection during over temperature conditions Dynamic overhead control Reverse polarity protection Overload protection Undervoltage detection Open load and short circuit to GND diagnosis Wide temperature range: -40 °C < Tj < 150 °C PG-SSOP14 package with exposed heatslug Green Product (RoHS compliant) AEC Qualified PG-SSOP14 Description The LITIXTM Basic TLD2326EL is a three channel high side driver IC with integrated output stages. It is designed to control LEDs with a current up to 120 mA. In typical automotive applications the device is capable to drive i.e. 3 red LEDs per chain (total 9 LEDs) with a current up to 60mA, which is limited by thermal cooling aspects. The output current is controlled practically independent of load and supply voltage changes. Table 1 Product Summary VS(nom) 5.5 V… 40 V VS(max) 40 V VOUTx(max) IOUTx(nom) 60 mA when using a supply voltage range of 8V Operating voltage Maximum voltage Nominal output (load) current - 18V (e.g. Automotive car battery). Currents up to IOUT(max) possible in applications with low thermal resistance RthJA IOUTx(max) Maximum output (load) current 120 mA; depending on thermal resistance RthJA Type Package Marking TLD2326EL PG-SSOP14 TLD2326EL Data Sheet 3 Rev. 1.1, 2015-03-24 TLD2326EL Overview Table 1 Product Summary Output current accuracy at RSETx = 12 kΩ Current consumption in sleep mode kLT IS(sleep,typ) 750 ± 7% 0.1 µA Protective functions - ESD protection - Under voltage lock out - Over Load protection - Over Temperature protection - Reverse Polarity protection Diagnostic functions - OL detection - SC to Vs (indicated by OL diagnosis) - SC to GND detection Applications Designed for exterior LED lighting applications such as tail/brake light, turn indicator, position light, side marker,... The device is also well suited for interior LED lighting applications such as ambient lighting (e.g. RGB), interior illumination and dash board lighting. Data Sheet 4 Rev. 1.1, 2015-03-24 TLD2326EL Block Diagram 2 Block Diagram VS Internal supply EN Thermal protection Output control OUT3 OUT2 OUT1 IN_SET3 IN_SET2 Current IN_SET1 DC/DC control adjust TLD2326EL Figure 1 Data Sheet FB GND Basic Block Diagram 5 Rev. 1.1, 2015-03-24 TLD2326EL Pin Configuration 3 Pin Configuration 3.1 Pin Assignment Figure 2 Data Sheet VS 1 VS 2 EN 3 NC 4 IN_SET3 14 NC 13 OUT3 12 OUT2 11 OUT1 5 10 FB IN_SET2 6 9 GND IN_SET1 7 8 NC TLD2326EL EP Pin Configuration 6 Rev. 1.1, 2015-03-24 TLD2326EL Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol Input/ Output Function 1, 2 VS – Supply Voltage; battery supply, connect a decoupling capacitor (100 nF 1 µF) to GND 3 EN I Enable pin 4 NC – Pin not connected 5 IN_SET3 I/O Input / SET pin 3; Connect a low power resistor to adjust the output current 6 IN_SET2 I/O Input / SET pin 2; Connect a low power resistor to adjust the output current 7 IN_SET1 I/O Input / SET pin 1; Connect a low power resistor to adjust the output current 8 NC – Pin not connected 9 GND – 1) 10 FB O Feedback Output 11 OUT1 O Output 1 12 OUT2 O Output 2 13 OUT3 O Output 3 14 NC – Pin not connected – 1) Exposed Pad GND Ground Exposed Pad; connect to GND in application 1) Connect all GND-pins together. Data Sheet 7 Rev. 1.1, 2015-03-24 TLD2326EL General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings 1) Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. VS VEN VEN(VS) VEN VOUTx VOUTx VPS -16 40 V – -16 40 V – VS - 40 VS + 16 V – -16 40 V – -1 40 V – -16 40 V – -0.3 6 V – -0.3 40 V – Voltages 4.1.1 Supply voltage 4.1.2 Input voltage EN 4.1.3 Input voltage EN related to VS 4.1.4 Input voltage EN related to VOUTx VEN - VOUTx 4.1.5 4.1.6 Output voltage Power stage voltage VPS = VS - VOUTx 4.1.7 IN_SETx voltage 4.1.8 Feedback voltage VIN_SETx VFB 4.1.9 IN_SETx current IIN_SETx – – 2 3 mA – Diagnosis output 4.1.10 Feedback current – 0.5 mA – 4.1.11 Output current IFB IOUTx – 130 mA – Tj Tstg -40 150 °C – -55 150 °C – Currents Temperatures 4.1.12 Junction temperature 4.1.13 Storage temperature ESD Susceptibility 4.1.14 ESD resistivity to GND VESD -2 2 kV Human Body Model (100 pF via 1.5 kΩ)2) 4.1.15 ESD resistivity all pins to GND -500 500 V CDM3) 4.1.16 ESD resistivity corner pins to GND VESD VESD -750 750 V CDM3) 1) Not subject to production test, specified by design 2) ESD susceptibility, Human Body Model “HBM” according to ANSI/ESDA/JEDEC JS-001-2011 3) ESD susceptibility, Charged Device Model “CDM” according to JESD22-C101E Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 8 Rev. 1.1, 2015-03-24 TLD2326EL General Product Characteristics 4.2 Pos. Functional Range Parameter Symbol Limit Values Min. Max. Unit Conditions 4.2.17 Supply voltage range for normal operation VS(nom) 5.5 40 V – 4.2.18 Power on reset threshold VS(POR) – 5 V VEN = VS RSETx = 12 kΩ IOUTx = 80% IOUTx(nom) VOUTx = 2.5 V 4.2.19 Junction temperature Tj -40 150 °C – Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. 4.3 Pos. Thermal Resistance Parameter 4.3.1 Junction to Case 4.3.2 Junction to Ambient 1s0p board Symbol RthJC RthJA1 Limit Values Min. Typ. Max. – 8 10 – – 4.3.3 Junction to Ambient 2s2p board 61 56 Unit Conditions K/W 1) 2) K/W 1) 3) Ta = 85 °C Ta = 135 °C – – RthJA2 K/W – – 45 43 – – 1) 4) Ta = 85 °C Ta = 135 °C 1) Not subject to production test, specified by design. Based on simulation results. 2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed Pad are fixed to ambient temperature). Ta = 85°C, Total power dissipation 1.5 W. 3) The RthJA values are according to Jedec JESD51-3 at natural convection on 1s0p FR4 board. The product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 70µm Cu, 300 mm2 cooling area. Total power dissipation 1.5 W distributed statically and homogenously over all power stages. 4) The RthJA values are according to Jedec JESD51-5,-7 at natural convection on 2s2p FR4 board. The product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (outside 2 x 70 µm Cu, inner 2 x 35µm Cu). Where applicable, a thermal via array under the exposed pad contacted the first inner copper layer. Total power dissipation 1.5 W distributed statically and homogenously over all power stages. Data Sheet 9 Rev. 1.1, 2015-03-24 TLD2326EL EN Pin 5 EN Pin The EN pin is a dual function pin: Internal Supply Output Control EN V EN Figure 3 Block Diagram EN pin Note: The current consumption at the EN-pin IEN needs to be added to the total device current consumption. The total current consumption is the sum of the currents at the VS-pin IS and the EN-pin IEN. 5.1 EN Function If the voltage at the pin EN is below a threshold of VEN(off) the LITIXTM Basic IC will enter Sleep mode. In this state all internal functions are switched off, the current consumption is reduced to IS(sleep). A voltage above VEN(on) at this pin enables the device after the Power on reset time tPOR. VS V EN IOU T t t tPOR 100% 80% t Figure 4 Data Sheet Power on reset 10 Rev. 1.1, 2015-03-24 TLD2326EL EN Pin 5.2 Internal Supply Pin The EN pin can be used to supply the internal logic. There are two typical application conditions, where this feature can be used: 1) In “DC/DC control Buck” configurations, where the voltage Vs can be below 5.5V. 2) In configurations, where a PWM signal is applied at the Vbatt pin of a light module. The buffer capacitor CBUF is used to supply the LITIXTM Basic IC during Vbatt low (Vs low) periods. This feature can be used to minimize the turn-on time to the values specified in Pos. 9.2.11. Otherwise, the power-on reset delay time tPOR (Pos. 5.4.6) has to be considered. The capacitor can be calculated using the following formula: I EN ( LS ) C BUF = tLOW ( max ) ⋅ -------------------------------------------------V S – V D1 – V S ( POR ) (1) See also a typical application drawing in Chapter 10. VBATT VS D1 EN CBUF Internal supply Thermal protection Output control OUT3 OUT2 OUT1 IN_SET RSET Current adjust TM LITIX Basic LEDBasic Driver GND GND Figure 5 Data Sheet External circuit when applying a fast PWM signal on VBATT 11 Rev. 1.1, 2015-03-24 TLD2326EL EN Pin V EN t V BATT IOU T t tON (VS) 100% 80% Switch off behavior depends on V BATT and load characteristics 20% t Figure 6 Typical waveforms when applying a fast PWM signal on VBATT The parameter tON(VS) is defined at Pos. 9.2.11. The parameter tOFF(VS) depends on the load and supply voltage VBATT characteristics. 5.3 EN Unused In case of an unused EN pin, there are two different ways to connect it: 5.3.1 EN - Pull Up to VS The EN pin can be connected with a pull up resistor (e.g. 10 kΩ) to Vs potential. In this configuration the LITIXTM Basic IC is always enabled. 5.3.2 EN - Direct Connection to VS The EN pin can be connected directly to the VS pin (IC always enabled). This configuration has the advantage (compared to the configuration described in Chapter 5.3.1) that no additional external component is required. Data Sheet 12 Rev. 1.1, 2015-03-24 TLD2326EL EN Pin 5.4 Electrical Characteristics Internal Supply / EN Pin Electrical Characteristics Internal Supply / EN pin Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSETx = 12 kΩ all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol 5.4.1 Current consumption, sleep mode IS(sleep) 5.4.2 Current consumption, active mode IS(on) Limit Values Min. Typ. Max. – 0.1 2 Current consumption, device disabled via IN_SETx – – – Current consumption, active mode in single fault detection condition 5.4.6 – – – 1.65 0.9 1.7 IS(fault) mA – – – 6.0 4.9 5.9 Current consumption, IS(dfault) active mode in double fault detection condition and one output disabled via IN_SETx Power-on reset delay time 3) tPOR Data Sheet 1) mA – – – 5.4.5 µA 1.7 1.0 1.75 IS(dis,IN_SET) – – – 5.4.4 Conditions mA – – – 5.4.3 Unit mA – – – – – – 9.0 8.4 9.0 – – 25 13 µs VEN = 0.5 V Tj < 85 °C VS = 18 V VOUTx = 3.6 V 2) IIN_SET = 0 µA Tj < 105 °C VS = 18 V VOUTx = 3.6V VEN = 5.5 V VEN = 18 V 1) REN = 10 kΩ between VS and EN-pin 2) VS = 18 V Tj < 105 °C VIN_SETx = 5 V VEN = 5.5 V VEN = 18 V 1) REN = 10 kΩ between VS and EN-pin 2) VS = 18 V Tj < 105 °C RSET1 = 12 kΩ RSET2,3 = unconnected VOUTx = 18 V or 0 V VEN = 5.5 V VEN = 18 V 1) REN = 10 kΩ between VS and EN-pin 2) VS = 18 V Tj < 105 °C RSET1,2 = 12 kΩ RSET3 = unconnected VOUTx = 18 V or 0 V VEN = 5.5 V VEN = 18 V 1) REN = 10 kΩ between VS and EN-pin VS = VEN = 0 → 13.5 V VOUTx(nom) = 3.6 ± 0.3V IOUTx = 80% IOUTx(nom) 1) Rev. 1.1, 2015-03-24 TLD2326EL EN Pin Electrical Characteristics Internal Supply / EN pin (cont’d) Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSETx = 12 kΩ all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Min. Typ. Max. 5.4.7 Required supply voltage for VS(on) output activation – – 5.4.8 Required supply voltage for VS(CC) current control – 5.4.9 VEN(on) EN turn off threshold VEN(off) EN input current during low IEN(LS) 5.4.10 5.4.11 Symbol EN turn on threshold Limit Values Unit Conditions 4 V – 5.2 V VEN = 5.5 V VOUTx = 3 V IOUTx = 50% IOUTx(nom) VEN = 5.5 V VOUTx = 3.6 V IOUTx ≥ 90% IOUTx(nom) – – 2.5 V – 0.8 – – V – – – 2.4 mA 1) supply voltage 5.4.12 EN high input current IEN(H) mA – – – – – – – – 0.1 0.1 2.05 0.45 VS = 4.5 V Tj < 105 °C VEN = 5.5 V Tj < 105 °C VS = 13.5 V, VEN = 5.5 V VS = 18 V, VEN = 5.5 V VS = VEN = 18 V 1) VS = 18 V, REN = 10 kΩ between VS and EN-pin 1) Not subject to production test, specified by design 2) The total device current consumption is the sum of the currents IS and IEN(H), please refer to Pos. 5.4.12 3) See also Figure 4 Data Sheet 14 Rev. 1.1, 2015-03-24 TLD2326EL FB Pin 6 FB Pin The following block diagram shows the feedback pin functionality. OUT1 OUT2 OUT3 Output voltage feedback IFB(SOC) FB Figure 7 Block Diagram FB pin 6.1 DC/DC Control With the FB pin the LITIXTM Basic IC realizes the dynamic overhead control. The IC provides a voltage feedback to an external DC/DC converter. Using the circuit shown in Figure 17 it is possible to adjust the DC/DC output voltage in a way that the voltage drop over the output stages of the LITIXTM Basic IC is minimized - dynamic overhead control. This leads to a significant reduction of the overall driver’s power dissipation and an increased system efficiency. Figure 17 gives an application example, how different light functions can be controlled using a µC, if an open load diagnosis per LED chain is required. Note: For correct output current control and dynamic overhead control the parameters as specified in Pos. 6.2.1 and Pos. 6.2.2 need to be considered. FB source currents higher than given in Pos. 6.2.1 lead to a drop of the FB regulation voltage VFB(nom). The resistor RFB(PD) can be dimensioned by applying equations Equation (2) and Equation (3). The following parameters are required: • • • • VOUT represents the maximum LED loads forward voltage, i.e. number of LEDs multiplied with the maximum LED forward voltage. Temperature drifts of the LED’s forward voltage needs to be considered! VBO represents the DC/DC output voltage, which is predefined by the feedback resistors (Figure 17: RFB1, RFB2, RFB3). Please refer to the according DC/DC device data sheet for the dimensioning of those resistors. nlen represents the numbers of LITIXTM Basics using the longest LED-chains (e.g. if there are 3 devices connected to one DC/DC converter and two devices using LED chains with 7 LEDs and one device is used with LED chain lengths of 6 LEDs the according nlen = 2.) β represents the DC gain of the external bipolar transistor, which is connected to the DC/DC’s feedback pin. 5 VOUT – 0.5 V 1 VOUT – 1.1 V ⋅ 10 Ω1.7 - ⋅ ---------- , -------------------------------------------------------------------------R FB ( PD ,min ) = min { --------------------------------⋅ } –5 n len VBO – V OUT – 1.1 V n len 4 ⋅ 10 A V OUT – 1.1 V R FB ( PD ,max ) = -------------------------------------------------V BO – V OUT 1 -------------------------------- ⋅ ------------R FB1 β+1 Data Sheet (2) (3) 15 Rev. 1.1, 2015-03-24 TLD2326EL FB Pin 6.2 Electrical Characteristics FB Pin Electrical Characteristics FB pin Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Unit Conditions Max. 6.2.1 FB regulation voltage VFB(nom) (VOUT - VOUT - 1 – 1)*0.9 V IFB(SOC) = 25 µA 6.2.2 FB operating voltage at power stage VPS(FB) = VS - VOUTx VPS(FB) – V 1) – 10 1) Not subject to production test, specified by design Data Sheet 16 Rev. 1.1, 2015-03-24 TLD2326EL IN_SETx Pin 7 IN_SETx Pin The IN_SET pin is a multiple function pin for output current definition, input and diagnostics: Logic IN_SET IIN_SET VIN_SET VIN_SET(OL/SC) GND Figure 8 Block Diagram IN_SET pin 7.1 Output Current Adjustment via RSET The output current of each channel can be adjusted independently. The current adjustment can be done by placing a low power resistor (RSET) at the IN_SETx pin to ground. The dimensioning of the resistor can be done using the formula below: kR SET = ---------I OUT (4) The gain factor k (RSET * output current) is specified in Pos. 9.2.4 and Pos. 9.2.5. The current through the RSET is defined by the resistor itself and the reference voltage VIN_SET(ref), which is applied to the IN_SET during supplied device. 7.2 Smart Input Pin The IN_SETx pin can be connected via RSET to the open-drain output of a µC or to an external NMOS transistor as described in Figure 9. This signal can be used to turn off the output stages of the IC. A minimum IN_SET current of IIN_SET(act) is required to turn on the output stages. This feature is implemented to prevent glimming of LEDs caused by leakage currents on the IN_SET pin, see Figure 11 for details. In addition, the IN_SET pin offers the diagnostic feedback information. In case of a fault event the IN_SET voltage is increased to VIN_SET(OL/SC) Pos. 8.4.2. Therefore, the device has two voltage domains at the IN_SET-pin, which is shown in Figure 12. Note: If one output has a present fault (open load or short circuit) and one or both of the other channels are dimmed via PWM at the IN_SET-pins a short spike to VIN_SET(OL/SC) is possible. Please refer to Chapter 8.3. Data Sheet 17 Rev. 1.1, 2015-03-24 TLD2326EL IN_SETx Pin Microcontroller (e.g. XC866) OUT RSET/2 RSET/2 IN_SET Current adjust Basic LED Driver GND IN VDDP = 5 V Figure 9 Schematics IN_SET interface to µC The resulting switching times are shown in Figure 10: IIN_ SET IOU T tON (IN_ SET ) tOFF(IN _ SET) t 100% 80% 20% t Figure 10 Data Sheet Switching times via IN_SET 18 Rev. 1.1, 2015-03-24 TLD2326EL IN_SETx Pin IOUT [mA] k = IOUTx * VIN_SET(ref) / IIN_SETx IOUTx IIN_SET(ACT) Figure 11 IIN_SETx IIN_SET [µA] IOUT versus IINSET V IN_ SET VIN _SET( OL /SC)m ax Diagnostic voltage range V IN_ SET(OL /SC) m in VIN _SET (ref ) m ax Normal operation and high temperature current reduction range Figure 12 Data Sheet Voltage domains for IN_SET pin, if ST pin is connected to GND 19 Rev. 1.1, 2015-03-24 TLD2326EL Load Diagnosis 8 Load Diagnosis 8.1 Open Load An open load diagnosis feature is integrated in the TLD2326EL driver IC. If there is an open load on one of the outputs, the respective output is turned off. The potential on the IN_SET pin rises up to VIN_SET(OL/SC). This high voltage can be used as input signal for an µC as shown in Figure 9. The open load status is not latched, as soon as the open load condition is no longer present, the output stage will be turned on again. An open load condition is detected, if the voltage drop over the output stage VPS is below the threshold according Pos. 8.4.6 and a filter time of tOL is passed. V IN_ SET VIN _SET( OL /SC) VIN_ SET( ref ) tOL tIN _SET (re se t) VOU T t VS V S – VPS(OL ) VF open load occurs open load disappears t Figure 13 IN_SET behavior during open load condition 8.2 Short Circuit to GND detection The TLD2326EL has an integrated SC to GND detection. If the output stage is turned on and the voltage at the output falls below VOUT(SC) the potential on the IN_SET pin is increased up to VIN_SET(OL/SC) after tSC. This condition is not latched. For detecting a normal condition after a short circuit detection an output current according to IOUT(SC) is driven by the channel. Data Sheet 20 Rev. 1.1, 2015-03-24 TLD2326EL Load Diagnosis VIN _SET VIN _SET( OL /SC) VIN _SET (ref ) VOU T tSC tIN_ SET( re se t) t VF VOUT (SC) t short circuit occurs Figure 14 short circuit disappears IN_SET behavior during short circuit to GND condition with ST connected to GND and VDEN > VDEN(act) 8.3 Double Fault Conditions The TLD2326EL allows the diagnosis of each channel separately. The diagnosis filter times tOL and tSC (Pos. 8.4.5 and Pos. 8.4.8) are valid only for the channel, which diagnoses first the fault condition. For the other channel or channels with a subsequential fault the diagnosis is reported immediately without the diagnosis filter time, if the filter time tOL has been elapsed for the channel with the first fault. During activation via IN_SET of a non-faulty output, where one channel has already a fault detected, a short spike to VIN_SET(OL/SC) could occur on the channel, which should be activated. Therefore, in general a diagnosis should be done earliest after the diagnosis filter times tOL and tSC to avoid any incorrect diagnosis readout. In the scenario mentioned above the turn on time tON(IN_SET) could be extended. The following figure shows the example behavior, if OUT1 has a fault and OUT2 is operated in PWM-mode. OUT3 is disabled. Data Sheet 21 Rev. 1.1, 2015-03-24 TLD2326EL Load Diagnosis IIN_ SET1 V IN_SET (OL /SC) / RSET 1 V IN_SET (ref ) / RSET 1 t VIN _SET 1 VIN _SET (OL /SC) VIN _SET( ref ) tOL t VOU T1 VS VS – VPS(OL ) VF open load occurs t IIN_ SET2 VIN _SET( OL /SC) / RSET2 VIN _SET( ref ) / RSET2 t VIN _ SET2 turn on command VIN _SET (OL /SC) VIN _SET( ref ) t VOU T2 VF VOUT ( SC) t Figure 15 Data Sheet Example single channel fault on OUT1 and PWM-operation on OUT2 22 Rev. 1.1, 2015-03-24 TLD2326EL Load Diagnosis 8.4 Electrical Characteristics IN_SET Pin and Load Diagnosis Electrical Characteristics IN_SET pin and Load Diagnosis Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSETx = 12 kΩ, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions 1) Min. Typ. Max. 1.19 1.23 1.27 V 8.4.1 IN_SET reference voltage VIN_SET(ref) 8.4.2 IN_SET open load/short circuit voltage VIN_SET(OL/SC) 4 – 5.5 V 8.4.3 IN_SET open load/short circuit voltage VIN_SET(OL/SC) 3.2 – 5.5 V VOUTx = 3.6 V Tj = 25...115 °C 1) VS > 8 V Tj = 25...150 °C VS = VOUTx (OL) or VOUTx = 0 V (SC) 1) VS = 5.5 V Tj = 25...150 °C VS = VOUTx (OL) or VOUTx = 0 V (SC) 8.4.4 IN_SET open load/short circuit current IIN_SET(OL/SC) 0.5 – 2.5 mA 1) VS > 8 V Tj = 25...150 °C VIN_SET = 4 V VS = VOUTx (OL) or VOUTx = 0 V (SC) 8.4.5 8.4.6 OL detection filter time OL detection voltage VPS(OL) = VS - VOUTx tOL VPS(OL) 10 22 35 µs 1) 0.2 – 0.4 V VS > 8 V VS > 8 V 8.4.7 Short circuit to GND detection threshold VOUT(SC) 0.8 – 1.4 V VS > 8 V 8.4.8 SC detection filter time tSC tIN_SET(reset) 10 22 35 µs 1) – 5 20 µs 1) IOUT(SC) 0.1 2 4.75 mA VS > 8 V VOUTx = 0 V 2 – 15 µA See Figure 11 8.4.9 IN_SET diagnosis reset time 8.4.10 SC detection current 8.4.11 IN_SET activation IIN_SET(act) current without turn on of output stages VS > 8 V VS > 8 V 1) Not subject to production test, specified by design Data Sheet 23 Rev. 1.1, 2015-03-24 TLD2326EL Power Stage 9 Power Stage The output stages are realized as high side current sources with a current of 120 mA. During off state the leakage current at the output stage is minimized in order to prevent a slightly glowing LED. To increase the overall output current for high brightness LED applications it is possible to connect two or all three output stages in parallel. The maximum current of each channel is limited by the power dissipation and used PCB cooling areas (which results in the applications RthJA). For an operating current control loop the supply and output voltages according to the following parameters have to be considered: • • • Required supply voltage for current control VS(CC), Pos. 5.4.8 Voltage drop over output stage during current control VPS(CC), Pos. 9.2.6 Required output voltage for current control VOUTx(CC), Pos. 9.2.7 9.1 Protection The device provides embedded protective functions, which are designed to prevent IC destruction under fault conditions described in this data sheet. Fault conditions are considered as “outside” normal operating range. Protective functions are neither designed for continuous nor for repetitive operation. 9.1.1 Over Load Behavior An over load detection circuit is integrated in the LITIXTM Basic IC. It is realized by a temperature monitoring of the output stages (OUTx). As soon as the junction temperature exceeds the current reduction temperature threshold Tj(CRT) the output current will be reduced by the device by reducing the IN_SET reference voltage VIN_SET(ref). This feature avoids LED’s flickering during static output overload conditions. Furthermore, it protects LEDs against over temperature, which are mounted thermally close to the device. If the device temperature still increases, the three output currents decrease close to 0 A. As soon as the device cools down the output currents rise again. IOU T V IN_ SET Tj (C R T) Figure 16 Tj Output current reduction at high temperature Note: This high temperature output current reduction is realized by reducing the IN_SET reference voltage voltage (Pos. 8.4.1). In case of very high power loss applied to the device and very high junction temperature the output current may drop down to IOUTx = 0 mA, after a slight cooling down the current increases again. 9.1.2 Reverse Battery Protection The TLD2326EL has an integrated reverse battery protection feature. This feature protects the driver IC itself, but also connected LEDs. The output reverse current is limited to IOUTx(rev) by the reverse battery protection. Data Sheet 24 Rev. 1.1, 2015-03-24 TLD2326EL Power Stage Note: Due to the reverse battery protection a reverse protection diode for the light module may be obsolete. In case of high ISO-pulse requirements and only minor protecting components like capacitors a reverse protection diode may be reasonable. The external protection circuit needs to be verified in the application. 9.2 Electrical Characteristics Power Stage Electrical Characteristics Power Stage Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUTx = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. 9.2.1 Output leakage current Typ. Unit Conditions µA VEN = 5.5 V IIN_SET = 0 µA VOUTx = 2.5 V Tj = 150 °C 1) Tj = 85 °C 1) VEN = 5.5 V IIN_SET = 0 µA VOUTx = VS = 40 V 1) VS = -16 V Max. IOUTx(leak) – – – – 7 3 9.2.2 Output leakage current in boost over battery setup – IOUTx(leak,B2B) – 50 µA 9.2.3 Reverse output current -IOUTx(rev) – 1 µA – Output load: LED with break down voltage < - 0.6 V 9.2.4 9.2.5 Output current accuracy limited temperature range Output current accuracy over temperature 1) kLT 697 645 750 750 803 855 697 645 750 750 803 855 kALL 9.2.6 Voltage drop over power VPS(CC) stage during current control VPS(CC) = VS - VOUTx 0.75 – – V 9.2.7 Required output voltage for VOUTx(CC) current control 2.3 – – V 9.2.8 Maximum output current 120 – – mA IOUT(max) Tj = 25...115 °C VS = 8...18 V VPS = 2 V RSETx = 6...12 kΩ RSETx = 30 kΩ 1) Tj = -40...115 °C VS = 8...18 V VPS = 2 V RSETx = 6...12 kΩ RSETx = 30 kΩ 1) VS = 13.5 V RSETx = 12 kΩ IOUTx ≥ 90% of (kLT(typ)/RSETx) 1) VS = 13.5 V RSETx = 12 kΩ IOUTx ≥ 90% of (kLT(typ)/RSETx) RSETx = 4.7 kΩ The maximum output current is limited by the thermal conditions. Please refer to Pos. 4.3.1 - Pos. 4.3.3 Data Sheet 25 Rev. 1.1, 2015-03-24 TLD2326EL Power Stage Electrical Characteristics Power Stage (cont’d) Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUTx = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol 9.2.9 IN_SET turn on time tON(IN_SET) Limit Values Min. Typ. Max. – – 15 Unit Conditions µs VS = 13.5 V IIN_SET = 0 → 100 µA IOUTx = 80% of (kLT(typ)/RSETx) No OL or SC at other channels 9.2.10 IN_SET turn off time tOFF(IN_SET) – – 10 µs 9.2.11 VS turn on time tON(VS) – – 20 µs 9.2.12 Current reduction temperature threshold Tj(CRT) – 140 – °C 9.2.13 Output current during current reduction at high temperature IOUT(CRT) 85% of – (kLT(typ)/ RSETx) – A VS = 13.5 V IIN_SET = 100 → 0 µA IOUTx = 20% of (kLT(typ)/RSETx) 1) 2) VEN = 5.5 V RSETx = 12 kΩ VS = 0 → 13.5 V IOUTx = 80% of (kLT(typ)/RSETx) 1) IOUTx = 95% of (kLT(typ)/RSETx) 1) RSETx = 12 kΩ Tj = 150 °C 1) Not subject to production test, specified by design 2) see also Figure 6 Data Sheet 26 Rev. 1.1, 2015-03-24 TLD2326EL Application Information 10 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. DRV VBATT LBO VIN DBO CIN VBO CBO IN RFB1 CVS =4.7nF VS T SW SWO Internal supply EN SWCS TLD5095 SGND RCS Thermal protection Output control ROVH OUT2 OUT1 IN_SET3 OVFB IN_SET2 Current ROVL IN_SET1 DC/DC control adjust Basic LITIXTM LED Basic Driver ST EN / PWMI FREQ / SYNC COMP CCOMP RSET3 CIVCC GND RSET1 VIN FBL RFB2 PWMO RFB3 VBO 1nF CVS =4.7nF VS RFB(PD) GND RFREQ RSET2 FB FBH IVCC R COMP 4.7nF** 4.7nF** 4.7nF** OUT3 EN DIAG function A OUT function A Internal supply Thermal protection Output control 4.7nF** 4.7nF** 4.7nF** OUT3 OUT2 EN OUT1 IN_SET3 Microcontroller (e.g. XC866) IN_SET2 Current IN_SET1 DIAG function B OUT function B RSET3 R SET2 DC/DC control adjust LITIXTMLED Basic Driver Basic FB GND RSET1 VIN ** For EMI improvement, if required. Figure 17 System diagram DC/DC control Boost using 3 IN_SET pins Note: This is a very simplified example of an application circuit. The function must be verified in the real application. 10.1 • Further Application Information For further information you may contact http://www.infineon.com/ Data Sheet 27 Rev. 1.1, 2015-03-24 TLD2326EL Package Outlines 11 Package Outlines 0.19 +0.06 0.08 C 0.15 M C A-B D 14x 0.64 ±0.25 1 8 1 7 0.2 M D 8x Bottom View 3 ±0.2 A 14 6 ±0.2 D Exposed Diepad B 0.1 C A-B 2x 14 7 8 2.65 ±0.2 0.25 ±0.05 2) 0.1 C D 8˚ MAX. C 0.65 3.9 ±0.11) 1.7 MAX. Stand Off (1.45) 0 ... 0.1 0.35 x 45˚ 4.9 ±0.11) Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion Dimensions in mm PG-SSOP-14-1,-2,-3-PO V02 Figure 18 PG-SSOP14 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 28 Rev. 1.1, 2015-03-24 TLD2326EL Revision History 12 Revision History Revision Date Changes 1.0 2013-08-08 Inital revision of data sheet 1.1 2015-03-19 Updated parameters KLT and KALL in the chapter Power Stage. Data Sheet 29 Rev. 1.1, 2015-03-24 Edition 2015-03-24 Published by Infineon Technologies AG 81726 Munich, Germany © 2015 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.