TLD1125EL Data Sheet

I n f i n e o n ® L I T I X TM B a s i c
TLD1125EL
1 Channel High Side Current Source
Data Sheet
Rev. 1.1, 2015-03-19
Automotive
TLD1125EL
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
4.1
4.2
4.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
5.1
5.2
5.3
5.3.1
5.3.2
EN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Supply Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN Unused . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN - Pull Up to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EN - Direct Connection to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
10
11
12
12
12
6
6.1
6.2
6.3
PWMI Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PWM Dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal PWM Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Internal Supply / EN / PWMI Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
13
14
15
7
7.1
7.2
IN_SET Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Output Current Adjustment via RSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Smart Input Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8
8.1
8.2
8.3
ST Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Diagnosis Selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Diagnosis Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disable Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
D Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
10
10.1
10.2
10.3
Load Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Open Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Circuit to GND detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics IN_SET Pin and Load Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24
24
26
27
11
11.1
11.1.1
11.1.2
11.2
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Over Load Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reverse Battery Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
30
30
30
30
31
12
12.1
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
13
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
14
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Data Sheet
2
8
8
9
9
21
21
21
21
Rev. 1.1, 2015-03-19
1 Channel High Side Current Source
LITIXTM Basic
1
TLD1125EL
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
1 Channel device with integrated output stage (current source),
optimized to drive LEDs
Output current up to 360mA
Low current consumption in sleep mode
PWM-operation supported via VS- and EN-pin
Integrated PWM dimming engine to provide two LED brightness
levels without external logic (e.g. µC)
Output current adjustable via external low power resistor and
possibility to connect PTC resistor for LED protection during over
temperature conditions
Reverse polarity protection
Overload protection
Undervoltage detection
Open load and short circuit to GND diagnosis
Wide temperature range: -40 °C < Tj < 150 °C
PG-SSOP14 package with exposed heatslug
Green Product (RoHS compliant)
AEC Qualified
PG-SSOP14
Description
The LITIXTM Basic TLD1125EL is a one channel high side driver IC with integrated output stage. It is designed to
control LEDs with a current up to 360 mA. In typical automotive applications the device is capable to drive i.e. 3
red LEDs with a current up to 180 mA, which is limited by thermal cooling aspects. The output current is controlled
practically independent of load and supply voltage changes.
Table 1
Product Summary
Nominal output (load) current
VS(nom)
VS(max)
VOUT(max)
IOUT(nom)
Maximum output (load) current
IOUT(max)
Operating voltage
Maximum voltage
5.5 V… 40 V
40 V
180 mA when using a supply voltage range of 8V
- 18V (e.g. Automotive car battery). Currents up
to IOUT(max) possible in applications with low
thermal resistance RthJA
360 mA; depending on thermal resistance RthJA
Type
Package
Marking
TLD1125EL
PG-SSOP14
TLD1125EL
Data Sheet
3
Rev. 1.1, 2015-03-19
TLD1125EL
Overview
Table 1
Product Summary
Output current accuracy at RSET = 12 kΩ
Current consumption in sleep mode
kLT
IS(sleep,typ)
2250 ± 7%
0.1 µA
Protective functions
- ESD protection
- Under voltage lock out
- Over Load protection
- Over Temperature protection
- Reverse Polarity protection
Diagnostic functions
- OL detection
- SC to Vs (indicated by OL diagnosis)
- SC to GND detection
Applications
Designed for exterior LED lighting applications such as tail/brake light, turn indicator, position light, side marker,...
The device is also well suited for interior LED lighting applications such as ambient lighting, interior illumination
and dash board lighting.
Data Sheet
4
Rev. 1.1, 2015-03-19
TLD1125EL
Block Diagram
2
Block Diagram
VS
Internal
supply
EN
Thermal
protection
Output
control
PWMI
OUT
D
IN_SET Current
adjust
TLD1125EL
Figure 1
Data Sheet
Status
ST
GND
Basic Block Diagram
5
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TLD1125EL
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
Figure 2
Data Sheet
VS
1
VS
2
EN
3
NC
4
PWMI
14
NC
13
NC
12
OUT
11
NC
5
10
ST
IN_SET
6
9
GND
D
7
8
NC
TLD1125EL
EP
Pin Configuration
6
Rev. 1.1, 2015-03-19
TLD1125EL
Pin Configuration
3.2
Pin Definitions and Functions
Pin
Symbol
Input/
Output
Function
1, 2
VS
–
Supply Voltage; battery supply, connect a decoupling capacitor (100 nF 1 µF) to GND
3
EN
I
Enable pin
4
NC
–
Pin not connected
5
PWMI
I/O
PWM Input
6
IN_SET
I/O
Input / SET pin; Connect a low power resistor to adjust the output current
7
D
I/O
Delay for open load detection
8
NC
–
Pin not connected
9
GND
–
1)
10
ST
I/O
Status pin
11
NC
–
Pin not connected
12
OUT
O
Output
13
NC
–
Pin not connected
14
NC
–
Pin not connected
–
1)
Exposed
Pad
GND
Ground
Exposed Pad; connect to GND in application
1) Connect all GND-pins together.
Data Sheet
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TLD1125EL
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings 1)
Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin for input pins (I), positive
currents flowing out of the I/O and output pins (O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Max.
VS
VEN
VEN(VS)
VEN VOUT
VOUT
VPS
-16
40
V
–
-16
40
V
–
VS - 40
VS + 16
V
–
-16
40
V
–
-1
40
V
–
-16
40
V
–
-0.3
6
V
–
-0.3
6
V
–
-0.3
6
V
–
-0.3
6
V
–
mA
–
Diagnosis output
Voltages
4.1.1
Supply voltage
4.1.2
Input voltage EN
4.1.3
Input voltage EN related to VS
4.1.4
Input voltage EN related to VOUT
VEN - VOUT
4.1.5
4.1.6
Output voltage
Power stage voltage
VPS = VS - VOUT
4.1.7
Input voltage PWMI
4.1.8
IN_SET voltage
4.1.9
D voltage
4.1.10
Status voltage
VPWMI
VIN_SET
VD
VST
IN_SET current
IIN_SET
–
–
2
8
4.1.12
D current
0.5
mA
–
Output current
ID
IOUT
-0.5
4.1.13
–
390
mA
–
Tj
Tstg
-40
150
°C
–
-55
150
°C
–
Currents
4.1.11
Temperatures
4.1.14
Junction temperature
4.1.15
Storage temperature
ESD Susceptibility
4.1.16
ESD resistivity to GND
VESD
-2
2
kV
Human Body
Model (100 pF via
1.5 kΩ)2)
4.1.17
ESD resistivity all pins to GND
-500
500
V
CDM3)
4.1.18
ESD resistivity corner pins to GND
VESD
VESD
-750
750
V
CDM3)
1) Not subject to production test, specified by design
2) ESD susceptibility, Human Body Model “HBM” according to ANSI/ESDA/JEDEC JS-001-2011
3) ESD susceptibility, Charged Device Model “CDM” according to JESD22-C101E
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Data Sheet
8
Rev. 1.1, 2015-03-19
TLD1125EL
General Product Characteristics
4.2
Pos.
Functional Range
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Conditions
4.2.19
Supply voltage range for
normal operation
VS(nom)
5.5
40
V
–
4.2.20
Power on reset threshold
VS(POR)
–
5
V
VEN = VS
RSET = 12 kΩ
IOUT = 80% IOUT(nom)
VOUT = 2.5 V
4.2.21
Junction temperature
Tj
-40
150
°C
–
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Pos.
Thermal Resistance
Parameter
4.3.1
Junction to Case
4.3.2
Junction to Ambient 1s0p board
Symbol
RthJC
RthJA1
Limit Values
Min.
Typ.
Max.
–
8
10
–
–
4.3.3
Junction to Ambient 2s2p board
61
56
Unit
Conditions
K/W
1) 2)
K/W
1) 3)
Ta = 85 °C
Ta = 135 °C
–
–
RthJA2
K/W
–
–
45
43
–
–
1) 4)
Ta = 85 °C
Ta = 135 °C
1) Not subject to production test, specified by design. Based on simulation results.
2) Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed Pad are fixed to
ambient temperature). Ta = 85°C, Total power dissipation 1.5 W.
3) The RthJA values are according to Jedec JESD51-3 at natural convection on 1s0p FR4 board. The product (chip + package)
was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 70µm Cu, 300 mm2 cooling area. Total power dissipation 1.5 W
distributed statically and homogenously over power stage.
4) The RthJA values are according to Jedec JESD51-5,-7 at natural convection on 2s2p FR4 board. The product (chip +
package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (outside 2 x 70 µm Cu, inner 2 x
35µm Cu). Where applicable, a thermal via array under the exposed pad contacted the first inner copper layer. Total power
dissipation 1.5 W distributed statically and homogenously over power stage.
Data Sheet
9
Rev. 1.1, 2015-03-19
TLD1125EL
EN Pin
5
EN Pin
The EN pin is a dual function pin:
Internal Supply
Output Control
EN
V EN
Figure 3
Block Diagram EN pin
Note: The current consumption at the EN-pin IEN needs to be added to the total device current consumption. The
total current consumption is the sum of the currents at the VS-pin IS and the EN-pin IEN.
5.1
EN Function
If the voltage at the pin EN is below a threshold of VEN(off) the LITIXTM Basic IC will enter Sleep mode. In this state
all internal functions are switched off, the current consumption is reduced to IS(sleep). A voltage above VEN(on) at this
pin enables the device after the Power on reset time tPOR.
VS
V EN
IOU T
t
t
tPOR
100%
80%
t
Figure 4
Data Sheet
Power on reset
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Rev. 1.1, 2015-03-19
TLD1125EL
EN Pin
5.2
Internal Supply Pin
The EN pin can be used to supply the internal logic. There are two typical application conditions, where this feature
can be used:
1) In “DC/DC control Buck” configurations, where the voltage Vs can be below 5.5V.
2) In configurations, where a PWM signal is applied at the Vbatt pin of a light module. The buffer capacitor CBUF is
used to supply the LITIXTM Basic IC during Vbatt low (Vs low) periods. This feature can be used to minimize the
turn-on time to the values specified in Pos. 11.2.15. Otherwise, the power-on reset delay time tPOR (Pos. 6.3.8)
has to be considered.
The capacitor can be calculated using the following formula:
I EN ( LS )
C BUF = tLOW ( max ) ⋅ -------------------------------------------------V S – V D1 – V S ( POR )
(1)
See also a typical application drawing in Chapter 12.
VBATT
VS
D1
EN
CBUF
Internal
supply
Thermal
protection
Output
control
OUT
IN_SET
RSET
Current
adjust
TM
LITIX
Basic
Basic
LED
Driver
GND
GND
Figure 5
Data Sheet
External circuit when applying a fast PWM signal on VBATT
11
Rev. 1.1, 2015-03-19
TLD1125EL
EN Pin
V EN
t
V BATT
IOU T
t
tON (VS)
100%
80%
Switch off behavior depends on
V BATT and load characteristics
20%
t
Figure 6
Typical waveforms when applying a fast PWM signal on VBATT
The parameter tON(VS) is defined at Pos. 11.2.15. The parameter tOFF(VS) depends on the load and supply voltage
VBATT characteristics.
5.3
EN Unused
In case of an unused EN pin, there are two different ways to connect it:
5.3.1
EN - Pull Up to VS
The EN pin can be connected with a pull up resistor (e.g. 10 kΩ) to Vs potential. In this configuration the LITIXTM
Basic IC is always enabled.
5.3.2
EN - Direct Connection to VS
The EN pin can be connected directly to the VS pin (IC always enabled). This configuration has the advantage
(compared to the configuration described in Chapter 5.3.1) that no additional external component is required.
Data Sheet
12
Rev. 1.1, 2015-03-19
TLD1125EL
PWMI Pin
6
PWMI Pin
The PWMI pin is designed as a dual function pin.
IPWMI(L)
Output Control
PWMI
VPWMI
Figure 7
Block Diagram PWMI pin
The pin can be used for PWM-dimming via a push-pull stage of a micro controller, which is connecting the PWMIpin to a low or high potential.
Note: The micro controller’s push-pull stage has to able to sink currents according to Pos. 6.3.18 to activate the
device.
Furthermore, the device offers also an internal PWM unit by connecting an external-RC network according to
Figure 10.
6.1
PWM Dimming
A PWM signal can be applied at the PWMI pin for LED brightness regulation. The dimming frequency can be
adjusted in a very wide range (e.g. 400 Hz). The PWMI pin is low active. Turn on/off thresholds VPWMI(L) and
VPWMI(H) are specified in parameters Pos. 6.3.15 and Pos. 6.3.16.
V PWMI
IOU T
tON (PWMI )
tOFF(PWMI )
t
100%
80%
20%
t
Figure 8
Data Sheet
Turn on and Turn off time for PWMI pin usage
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Rev. 1.1, 2015-03-19
TLD1125EL
PWMI Pin
6.2
Internal PWM Unit
Connecting a resistor and a capacitor in parallel on the PWMI pin enables the internal pulse width modulation unit.
The following figure shows the charging and discharging defined by the RC-network according to Figure 10 and
the internal PWM unit.
VPWMI
Outputs OFF
VPWMI(H)
Internal PWM
VPWMI(L)
Outputs ON
t
OUTON
Figure 9
OUT - OFF
OUTON
OUT - OFF
OUTON
OUT - OFF
OUTON
OUT - OFF
PWMI operating voltages
The PWM Duty cycle (DC) and the PWM frequency can be adjusted using the formulas below. Please use only
typical values of VPWMI(L), VPWMI(H) and IPWMI(on) for the calculation of tPWMI(on) and tPWMI(off) (as described in
Pos. 6.3.15 to Pos. 6.3.18).
⎛ V PWMI ( H ) – I PWMI ( on ) ⋅ R PWMI⎞
-⎟
t PWMI ( on ) = –R PWMI ⋅ C PWMI ⋅ LN ⎜ ------------------------------------------------------------------------------⎝ V PWMI ( L ) – I PWMI ( on ) ⋅ R PWMI ⎠
(2)
⎛ V PWMI ( H )⎞
-⎟
t PWMI ( off ) = R PWMI ⋅ C PWMI ⋅ LN ⎜ ------------------------⎝ V PWMI ( L ) ⎠
(3)
1
f PWMI = --------------------------------------------------------t PWMI ( on ) + tPWMI ( off )
(4)
DC = tPWMI ( on ) ⋅ f PWMI
(5)
Out of this equations the required CPWMI and RPWMI can be calculated:
t
⎞ tPWMI ( off )
PWMI ( on )
------------------------
⎛ V PWMI ( L )
– I PWMI ( on ) ⋅ t PWMI ( off ) ⋅ ⎜ --------------------------⎟
⎝ V PWMI ( H )⎠
–1
C PWMI = ------------------------------------------------------------------------------------------------------------------------------------------------------------------tPWMI ( on )
-----------------------t
⎛ V PWMI ( L ) ⎞
⎛ V PWMI ( L ) ⎞ PWMI ( off )
LN ⎜ --------------------------⎟ ⋅ V PWMI ( L ) ⋅ ⎜ --------------------------⎟
– V PWMI ( H )
⎝ V PWMI ( H )⎠
⎝ V PWMI ( H )⎠
t PWMI ( off )
RPWMI = --------------------------------------------------------------⎛ V PWMI ( H )⎞
-⎟
C PWMI ⋅ LN ⎜ ------------------------⎝ V PWMI ( L ) ⎠
Data Sheet
(6)
(7)
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Rev. 1.1, 2015-03-19
TLD1125EL
PWMI Pin
See Figure 10 for a typical external circuitry.
Note: In case of junction temperatures above Tj(CRT) (Pos. 11.2.16) the device provides a temperature dependent
current reduction feature as descirbed in Chapter 11.1.1. In case of output current reduction IIN_SET is
reduced as well, which leads to increased turn on-times tPWMI(on), because the CPWMI is charged slower. The
turn off-time tPWMI(off) remains the same.
VBATT
VS
10kΩ
Internal
supply
EN
Output
control
Thermal
protection
PWMI
OUT
D
CD
RPWMI CPWMI
RSET
IN_SET
Current
adjust
Basic LED Driver
GND
GND
Figure 10
Typical circuit using internal PWM unit
6.3
Electrical Characteristics Internal Supply / EN / PWMI Pin
Electrical Characteristics Internal Supply / EN / PWMI pin
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
6.3.1
Current consumption,
sleep mode
IS(sleep)
6.3.2
Current consumption,
active mode
IS(on)
Limit Values
Min.
Typ.
Max.
–
0.1
2
Unit
Conditions
µA
1)
mA
–
–
–
–
–
–
1.4
0.75
1.5
VEN = 0.5 V
Tj < 85 °C
VS = 18 V
VOUT = 3.6 V
2)
VPWMI= 0.5 V
IIN_SET = 0 µA
Tj < 105 °C
VS = 18 V
VOUT = 3.6V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
Data Sheet
15
Rev. 1.1, 2015-03-19
TLD1125EL
PWMI Pin
Electrical Characteristics Internal Supply / EN / PWMI pin (cont’d)
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
6.3.3
Current consumption,
device disabled via ST
IS(dis,ST)
Limit Values
Min.
–
–
–
6.3.4
–
–
–
Current consumption,
device disabled via PWMI
–
–
–
6.3.8
mA
–
–
–
1.6
0.75
1.6
mA
–
–
–
1.7
1.1
1.8
Current consumption,
IS(fault,STG)
active mode in fault
detection condition with STpin connected to GND
Data Sheet
mA
–
–
–
–
–
–
6.0
4.9
5.9
–
–
25
VS = 18 V
Tj < 105 °C
VST = 5 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
1.4
0.7
1.4
Current consumption,
IS(fault,STu)
active mode in fault
detection condition with STpin unconnected
Power-on reset delay time 3) tPOR
2)
1.4
0.65
1.4
IS(dis,PWMI)
–
–
–
6.3.7
mA
mA
–
–
–
6.3.6
Conditions
Max.
Current consumption,
IS(dis,IN_SET)
device disabled via IN_SET
–
–
–
6.3.5
Typ.
Unit
µs
VS and EN-pin
2)
VS = 18 V
Tj < 105 °C
VIN_SET = 5 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
2)
VS = 18 V
Tj < 105 °C
VPWMI= 3.4 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
2)
VS = 18 V
Tj < 105 °C
RSET = 12 kΩ
VPWMI= 0.5 V
VOUT = 18 V or 0 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
2)
VS = 18 V
Tj < 105 °C
RSET = 12 kΩ
VPWMI= 0.5 V
VOUT = 18 V or 0 V
VST = 0 V
VEN = 5.5 V
VEN = 18 V
1)
REN = 10 kΩ between
VS and EN-pin
1)
VS = VEN = 0 → 13.5 V
VOUT(nom) = 3.6 ± 0.3V
IOUT = 80% IOUT(nom)
16
Rev. 1.1, 2015-03-19
TLD1125EL
PWMI Pin
Electrical Characteristics Internal Supply / EN / PWMI pin (cont’d)
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Min.
Typ.
Max.
6.3.9
Required supply voltage for VS(on)
output activation
–
–
6.3.10
Required supply voltage for VS(CC)
current control
–
6.3.11
VEN(on)
EN turn off threshold
VEN(off)
EN input current during low IEN(LS)
6.3.12
6.3.13
Symbol
EN turn on threshold
Limit Values
Unit
Conditions
4
V
–
5.2
V
VEN = 5.5 V
VOUT = 3 V
IOUT = 50% IOUT(nom)
VEN = 5.5 V
VOUT = 3.6 V
IOUT ≥ 90% IOUT(nom)
–
–
2.5
V
–
0.8
–
–
V
–
–
–
1.8
mA
1)
supply voltage
6.3.14
EN high input current
IEN(H)
mA
–
–
–
–
–
–
–
–
0.1
0.1
1.65
0.45
VS = 4.5 V
Tj < 105 °C
VEN = 5.5 V
Tj < 105 °C
VS = 13.5 V, VEN = 5.5 V
VS = 18 V, VEN = 5.5 V
VS = VEN = 18 V
1)
VS = 18 V, REN = 10 kΩ
between VS and EN-pin
6.3.15
PWMI (active low)
Switching low threshold
(output on)
VPWMI(L)
1.5
1.85
2.3
V
1)4)
6.3.16
PWMI(active low)
Switching high threshold
(output off)
VPWMI(H)
2.45
2.85
3.2
V
1)4)5)
VS = 8...18 V
6.3.17
ΔVPWMI
PWMI
Switching threshold
difference VPWMI(H) - VPWMI(L)
0.75
1
1.10
V
1)4)5)
VS = 8...18 V
6.3.18
PWMI (active low)
Low input current with
active channels (voltage
<VPWMI(L))
IPWMI(on)
IIN_SET
IIN_SET *4 IIN_SET
µA
1)
PWMI(active low)
High input current
IPWMI(off)
6.3.19
1)
2)
3)
4)
5)
*3.1
-5
*4.9
–
5
µA
VS = 8...18 V
Tj = 25...115 °C
IIN_SET = 100 µA
VPWMI= 1.7 V
VEN = 5.5 V
VS = 8...18 V
VPWMI= 5 V
VEN = 5.5 V
VS = 8...18 V
Not subject to production test, specified by design
The total device current consumption is the sum of the currents IS and IEN(H), please refer to Pos. 6.3.14
See also Figure 4
Parameter valid if an external PWM signal is applied
If TTL level compatibility is required, use µC open drain output with pull up resistor
Data Sheet
17
Rev. 1.1, 2015-03-19
TLD1125EL
IN_SET Pin
7
IN_SET Pin
The IN_SET pin is a multiple function pin for output current definition, input and diagnostics:
Logic
IN_SET
high impedance
IIN_SET
VIN_SET
VIN_SET(OL/SC)
GND
Figure 11
Block Diagram IN_SET pin
7.1
Output Current Adjustment via RSET
The current adjustment can be done by placing a low power resistor (RSET) at the IN_SET pin to ground. The
dimensioning of the resistor can be done using the formula below:
kR SET = ---------I OUT
(8)
The gain factor k (RSET * output current) is specified in Pos. 11.2.4 and Pos. 11.2.5. The current through the RSET
is defined by the resistor itself and the reference voltage VIN_SET(ref), which is applied to the IN_SET during supplied
device.
7.2
Smart Input Pin
The IN_SET pin can be connected via RSET to the open-drain output of a µC or to an external NMOS transistor as
described in Figure 12. This signal can be used to turn off the output stage of the IC. A minimum IN_SET current
of IIN_SET(act) is required to turn on the output stage. This feature is implemented to prevent glimming of LEDs
caused by leakage currents on the IN_SET pin, see Figure 15 for details. In addition, the IN_SET pin offers the
diagnostic feedback information, if the status pin is connected to GND. Another diagnostic possibility is shown in
Figure 13, where the diagnosis information is provided via the ST pin (refer to Chapter 8 and Chapter 10) to a
micro controller. In case of a fault event with the ST pin connected to GND the IN_SET voltage is increased to
VIN_SET(OL/SC) Pos. 10.3.2. Therefore, the device has two voltage domains at the IN_SET-pin, which is shown in
Figure 16.
Data Sheet
18
Rev. 1.1, 2015-03-19
TLD1125EL
IN_SET Pin
Microcontroller
(e.g. XC866)
OUT
RSET/2
RSET/2
IN_SET
Current
adjust
Status
Basic LED Driver
ST
GND
IN
VDDP = 5 V
Figure 12
Schematics IN_SET interface to µC, diagnosis via IN_SET pin
Microcontroller
(e.g. XC866)
OUT
RSET
IN_SET
Current
adjust
Status
Basic LED Driver
ST
GND
IN
VDDP = 5 V
Figure 13
optional
Schematics IN_SET interface to µC, diagnosis via ST pin
The resulting switching times are shown in Figure 14:
IIN_ SET
IOU T
tON (IN_ SET )
tOFF(IN _ SET)
t
100%
80%
20%
t
Figure 14
Data Sheet
Switching times via IN_SET
19
Rev. 1.1, 2015-03-19
TLD1125EL
IN_SET Pin
IOUT [mA]
k = IOUTx * VIN_SET(ref) / IIN_SETx
IOUTx
IIN_SET(ACT)
Figure 15
IIN_SETx
IIN_SET [µA]
IOUT versus IINSET
V IN_ SET
VIN _SET( OL /SC)m ax
Diagnostic voltage range
V IN_ SET(OL /SC) m in
VIN _SET (ref ) m ax
Normal operation and high temperature current
reduction range
Figure 16
Data Sheet
Voltage domains for IN_SET pin, if ST pin is connected to GND
20
Rev. 1.1, 2015-03-19
TLD1125EL
ST Pin
8
ST Pin
The ST pin is a multiple function pin.
IST(OL/SC)
VST(OL/SC)
No fault
Fault
Output Control
ST
No fault
Fault
VST
IST(PD)
Figure 17
Block Diagram ST pin
8.1
Diagnosis Selector
If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), the ST pin
acts as diagnosis output pin. In normal operation (device is activated) the ST pin is pulled to GND via the internal
pull down current IST(PD). In case of an open load or short circuit to GND condition the ST pin is switched to
VST(OL/SC) after the filter timetD (see Equation (11)).
If the device is operated in PWM operation via the VS and/or EN pins the ST pin should be connected to GND via
a high ohmic resistor (e.g. 470kΩ) to ensure proper device behavior during fast rising VS and/or EN slopes.
If the ST pin is shorted to GND the diagnostic feedback is performed via the IN_SET-pin, which is shown in
Chapter 7.2 and Chapter 10.
8.2
Diagnosis Output
If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), it acts as
a diagnostic output. In case of a fault condition the ST pin rises its voltage to VST(OL/SC) (Pos. 10.3.7). Details are
shown in Chapter 10.
8.3
Disable Input
If an external voltage higher than VST(H) (Pos. 10.3.5) is applied to the ST pin, the device is switched off. This
function is used for applications, where multiple drivers should be used for one light function. It is possible to
combine the drivers’ fault diagnosis via the ST pins. If a single LED chain fails, the entire light function is switched
off. In this scenario e.g. the diagnostic circuit on the body control module can easily distinguish between the two
cases (normal load or load fault), because nearly no current is flowing into the LED module during the fault
scenario - the drivers consume a current of IS(fault,STu) (Pos. 6.3.6) or IS(dis,ST) (Pos. 6.3.3).
As soon as one LED chain fails, the ST-pin of this device is switched to VST(OL/SC). The other devices used for the
same light function can be connected together via the ST pins. This leads to a switch off of all devices connected
together. Application examples are shown in Chapter 12.
Data Sheet
21
Rev. 1.1, 2015-03-19
TLD1125EL
ST Pin
V ST
IOU T
tON (ST)
tOFF( ST)
t
100%
80%
20%
t
Figure 18
Data Sheet
Switching times via ST Pin
22
Rev. 1.1, 2015-03-19
TLD1125EL
D Pin
9
D Pin
The D pin is designed as a single function pin.
ID
Output Control
D
VD
Figure 19
Block Diagram DIS pin
The D pin can be used to extend the open load detection filter time tOL by adding a small signal capacitor to the D
pin as shown in Figure 26. The filter time tD, which is defined by the charging current ID (Pos. 10.3.10). The time
is adjustable according to the following equation:
C D ⋅ V D ( th )
t typ = ------------------------ID
Data Sheet
(9)
23
Rev. 1.1, 2015-03-19
TLD1125EL
Load Diagnosis
10
Load Diagnosis
10.1
Open Load
An open load diagnosis feature is integrated in the TLD1125EL driver IC. If there is an open load on the output,
the output is turned off. The potential on the IN_SET pin rises up to VIN_SET(OL/SC). This high voltage can be used
as input signal for an µC as shown in Figure 13. The open load status is not latched, as soon as the open load
condition is no longer present, the output stage will be turned on again. An open load condition is detected, if the
voltage drop over the output stage VPS is below the threshold according Pos. 10.3.11. The output is deactivated
after a filter time tD, which is defined by the charging current ID Pos. 10.3.10. The time is adjustable by the
capacitor connected to the D pin according the following equation:
C D ⋅ V D ( th )
t D, typ = ------------------------ID
(10)
VIN_ SET
V IN_ SET(OL )
V IN_ SET(ref )
t
VD
VD( th)
tD
tIN_ SET (re se t)
VOU T
t
VS
VS – VPS( OL)
VF
open load
occurs
open load
disappears
t
Figure 20
Data Sheet
IN_SET behavior during open load condition with ST pin connected to GND
24
Rev. 1.1, 2015-03-19
TLD1125EL
Load Diagnosis
VIN_ SET
V IN_ SET(ref )
t
VST
VST (OL )
t
VD
VD( th)
tD
tIN_ SET (re se t)
VOU T
t
VS
VS – VPS( OL)
VF
open load
occurs
open load
disappears
t
Figure 21
IN_SET and ST behavior during open load condition (ST unconnected)
To provide a Limp Home functionality (reactivation in case of open load instead of complete deactivation) the filter
time tD can be used. If a PWM signal with a frequency higher than 1/tD is applied to the VS line and EN signal, the
OL detection feature will not be activated. The implementation of the D-pin is shown in the following figure:
ID
Output Control
D
VD
Figure 22
Data Sheet
Block Diagram D pin
25
Rev. 1.1, 2015-03-19
TLD1125EL
Load Diagnosis
10.2
Short Circuit to GND detection
The TLD1125EL has an integrated SC to GND detection. If the output stage is turned on and the voltage at the
output falls below VOUT(SC) the potential on the IN_SET pin is increased up to VIN_SET(OL/SC) after tSC if the ST pin is
connected to GND. If the ST is open or connected to GND via a high ohmic resistor the fault is indicated on the
ST pin according to Chapter 8 after tD. More details are shown in Figure 24. This condition is not latched. For
detecting a normal condition after a short circuit detection an output current according to IOUT(SC) is driven by the
channel.
The filter time tD is defined by the charging current ID Pos. 10.3.10. The time is adjustable by the capacitor
connected to the D pin according the following equation:
C D ⋅ V D ( th )
t D, typ = ------------------------ID
(11)
V IN _SET
VIN _SET( OL )
VIN _SET( ref )
t
VD
VD (th )
tD
tIN _ SET(re se t)
VOU T
t
VS
VF
VOUT ( SC)
t
short circuit
occurs
short circuit
disappears
Figure 23
IN_SET behavior during short circuit to GND condition with ST connected to GND
Data Sheet
26
Rev. 1.1, 2015-03-19
TLD1125EL
Load Diagnosis
V IN _SET
VIN _SET( ref )
t
VST
V ST( OL )
t
VD
VD (th )
tD
tIN _ SET(re se t)
VOU T
t
VS
VF
VOUT ( SC)
t
short circuit
occurs
short circuit
disappears
Figure 24
IN_SET and ST behavior during short circuit to GND condition (ST unconnected)
10.3
Electrical Characteristics IN_SET Pin and Load Diagnosis
Electrical Characteristics IN_SET pin and Load Diagnosis
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
1)
Min.
Typ.
Max.
1.19
1.23
1.27
V
–
5.5
V
10.3.1
IN_SET reference
voltage
VIN_SET(ref)
10.3.2
IN_SET open load/short
circuit voltage
VIN_SET(OL/SC) 4
VOUT = 3.6 V
Tj = 25...115 °C
1)
VS > 8 V
Tj = 25...150 °C
VS = VOUT (OL) or VOUTx
= 0 V (SC)
Data Sheet
27
Rev. 1.1, 2015-03-19
TLD1125EL
Load Diagnosis
Electrical Characteristics IN_SET pin and Load Diagnosis (cont’d)
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
10.3.3
IN_SET open load/short
circuit current
IIN_SET(OL/SC) 1.5
Min.
Typ.
Max.
–
7.4
Unit
Conditions
mA
1)
VS > 8 V
Tj = 25...150 °C
VIN_SET = 4 V
VS = VOUT (OL) or VOUT =
0 V (SC)
10.3.4
ST device turn on
threshold (active low) in
case of voltage applied
from external (ST-pin
acting as input)
VST(L)
0.8
–
–
V
–
10.3.5
ST device turn off
threshold (active low) in
case of voltage applied
from external (ST-pin
acting as input)
VST(H)
–
–
2.5
V
–
10.3.6
ST pull down current
IST(PD)
–
–
15
µA
10.3.7
ST open load/short
circuit voltage (ST-pin
acting as diagnosis
output)
VST(OL/SC)
4
–
5.5
V
VEN = 5.5 V
VST= 0.8 V
1)
VS > 8 V
Tj = 25...150 °C
RST = 470 kΩ
VS = VOUT (OL) or VOUT =
0 V (SC)
10.3.8
ST open load/short
circuit current (ST-pin
acting as diagnosis
output)
IST(OL/SC)
100
–
220
µA
1)
VS > 8 V
Tj = 25...150 °C
VST = 2.5 V
VS = VOUT (OL) or VOUT =
0 V (SC)
VD(th)
ID
2.45
2.85
3.2
V
1
2
3
µA
10.3.11 OL detection voltage
VPS(OL) = VS - VOUT
VPS(OL)
0.2
–
0.4
V
VS > 8 V
VS > 8 V
VD = 2 V
VS > 8 V
10.3.12 Short circuit to GND
detection threshold
VOUT(SC)
0.8
–
1.4
V
VS > 8 V
10.3.13 IN_SET diagnosis reset
time
tIN_SET(reset)
–
5
20
µs
1)
100
200
300
µA
VS > 8 V
VOUT= 0 V
10.3.9
D high threshold
10.3.10 D output current
IOUT(SC,STu)
10.3.14 SC detection current in
case of unconnected STpin
Data Sheet
28
VS > 8 V
Rev. 1.1, 2015-03-19
TLD1125EL
Load Diagnosis
Electrical Characteristics IN_SET pin and Load Diagnosis (cont’d)
Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40 °C to +150 °C, RSET = 12 kΩ, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
IOUT(SC,STG)
10.3.15 SC detection current in
case of ST-pin shorted to
GND
0.1
2
4.75
mA
VS > 8 V
VOUT= 0 V
VST = 0 V
10.3.16 IN_SET activation
IIN_SET(act)
current without turn on of
output stage
2
–
15
µA
See Figure 15
1) Not subject to production test, specified by design
Data Sheet
29
Rev. 1.1, 2015-03-19
TLD1125EL
Power Stage
11
Power Stage
The output stage is realized as high side current source with a current of 360 mA. During off state the leakage
current at the output stage is minimized in order to prevent a slightly glowing LED.
The maximum current of the channel is limited by the power dissipation and used PCB cooling areas (which results
in the applications RthJA).
For an operating current control loop the supply and output voltages according to the following parameters have
to be considered:
•
•
•
Required supply voltage for current control VS(CC), Pos. 6.3.10
Voltage drop over output stage during current control VPS(CC), Pos. 11.2.6
Required output voltage for current control VOUT(CC), Pos. 11.2.7
11.1
Protection
The device provides embedded protective functions, which are designed to prevent IC destruction under fault
conditions described in this data sheet. Fault conditions are considered as “outside” normal operating range.
Protective functions are neither designed for continuous nor for repetitive operation.
11.1.1
Over Load Behavior
An over load detection circuit is integrated in the LITIXTM Basic IC. It is realized by a temperature monitoring of the
output stage (OUT).
As soon as the junction temperature exceeds the current reduction temperature threshold Tj(CRT) the output current
will be reduced by the device by reducing the IN_SET reference voltage VIN_SET(ref). This feature avoids LED’s
flickering during static output overload conditions. Furthermore, it protects LEDs against over temperature, which
are mounted thermally close to the device. If the device temperature still increases, the output current decreases
close to 0 A. As soon as the device cools down the output current rises again.
IOU T
V IN_ SET
Tj (C R T)
Figure 25
Tj
Output current reduction at high temperature
Note: This high temperature output current reduction is realized by reducing the IN_SET reference voltage voltage
(Pos. 10.3.1). In case of very high power loss applied to the device and very high junction temperature the
output current may drop down to IOUT = 0 mA, after a slight cooling down the current increases again.
11.1.2
Reverse Battery Protection
The TLD1125EL has an integrated reverse battery protection feature. This feature protects the driver IC itself, but
also connected LEDs. The output reverse current is limited to IOUTx(rev) by the reverse battery protection.
Data Sheet
30
Rev. 1.1, 2015-03-19
TLD1125EL
Power Stage
Note: Due to the reverse battery protection a reverse protection diode for the light module may be obsolete. In case
of high ISO-pulse requirements and only minor protecting components like capacitors a reverse protection
diode may be reasonable. The external protection circuit needs to be verified in the application.
11.2
Electrical Characteristics Power Stage
Electrical Characteristics Power Stage
Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUT = 3.6 V, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
11.2.1
Output leakage current
Typ.
Unit
Conditions
µA
VEN = 5.5 V
IIN_SET = 0 µA
VOUT = 2.5 V
Tj = 150 °C
1)
Tj = 85 °C
1)
VEN = 5.5 V
IIN_SET = 0 µA
VOUT = VS = 40 V
1)
VS = -16 V
Max.
IOUT(leak)
–
–
–
–
21
9
11.2.2
Output leakage current in
boost over battery setup
-IOUT(leak,B2B) –
–
150
µA
11.2.3
Reverse output current
-IOUT(rev)
–
3
µA
–
Output load: LED with
break down voltage
< - 0.6 V
11.2.4
11.2.5
Output current accuracy
limited temperature range
Output current accuracy
over temperature
1)
kLT
2092
1935
2250
2250
2408
2565
2092
1935
2250
2250
2408
2565
kALL
11.2.6
Voltage drop over power
VPS(CC)
stage during current control
VPS(CC) = VS - VOUT
0.75
–
–
V
11.2.7
Required output voltage for VOUT(CC)
current control
2.3
–
–
V
11.2.8
Maximum output current
IOUT(max)
360
–
–
mA
Tj = 25...115 °C
VS = 8...18 V
VPS = 2 V
RSET = 6...12 kΩ
RSET = 30 kΩ
1)
Tj = -40...115 °C
VS = 8...18 V
VPS = 2 V
RSET = 6...12 kΩ
RSET = 30 kΩ
1)
VS = 13.5 V
RSET = 12 kΩ IOUT ≥ 90%
of (kLT(typ)/RSET)
1)
VS = 13.5 V
RSET = 12 kΩ IOUT ≥ 90%
of (kLT(typ)/RSET)
RSET = 4.7 kΩ
The maximum output
current is limited by the
thermal conditions.
Please refer to
Pos. 4.3.1 - Pos. 4.3.3
Data Sheet
31
Rev. 1.1, 2015-03-19
TLD1125EL
Power Stage
Electrical Characteristics Power Stage (cont’d)
Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40 °C to +150 °C, VOUT = 3.6 V, all voltages with respect to
ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins
(O) (unless otherwise specified)
Pos.
Parameter
Symbol
11.2.9
PWMI turn on time
tON(PWMI)
Limit Values
Min.
Typ.
Max.
–
–
15
Unit
Conditions
µs
2)
VS = 13.5 V
RSET = 12 kΩ
PWMI → L
IOUT = 80% of
(kLT(typ)/RSET)
11.2.10 PWMI turn off time
tOFF(PWMI)
–
–
10
µs
2)
VS = 13.5 V
RSET = 12 kΩ
PWMI → H
IOUT = 20% of
(kLT(typ)/RSET)
11.2.11 ST turn on time
tON(ST)
–
–
15
µs
3)
VS = 13.5 V
RSET = 12 kΩ
ST → L
IOUT = 80% of
(kLT(typ)/RSET)
11.2.12 ST turn off time
tOFF(ST)
–
–
10
µs
3)
VS = 13.5 V
RSET = 12 kΩ
ST → H
IOUT = 20% of
(kLT(typ)/RSET)
11.2.13 IN_SET turn on time
tON(IN_SET)
–
–
15
µs
11.2.14 IN_SET turn off time
tOFF(IN_SET)
–
–
10
µs
11.2.15 VS turn on time
tON(VS)
–
–
20
µs
11.2.16 Current reduction
temperature threshold
Tj(CRT)
–
140
–
°C
11.2.17 Output current during
current reduction at high
temperature
IOUT(CRT)
85% of –
(kLT(typ)/
RSET)
–
A
1)
2)
3)
4)
VS = 13.5 V
IIN_SET = 0 → 100 µA
IOUT = 80% of
(kLT(typ)/RSET)
VS = 13.5 V
IIN_SET = 100 → 0 µA
IOUT = 20% of
(kLT(typ)/RSET)
1) 4)
VEN = 5.5 V
RSET = 12 kΩ
VS = 0 → 13.5 V
IOUT = 80% of
(kLT(typ)/RSET)
1)
IOUT = 95% of
(kLT(typ)/RSET)
1)
RSET = 12 kΩ
Tj = 150 °C
Not subject to production test, specified by design
see also Figure 8
see also Figure 18
see also Figure 6
Data Sheet
32
Rev. 1.1, 2015-03-19
TLD1125EL
Application Information
12
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
Vbat
BCM
PROFET
VBB
channel 1
load current
sense
internal
power
supply
logic
multi step
load current
limitation
open load
detection
IN1
IS1
clamp for
inductive load
gate control
&
charge pump
ESD
protection
OUT1
temperature
sensor
SEN
channel 2
control and protection circuit
equivalent to
channel 1
IN2
IS2
OUT2
R GND
GND
TAIL
Rear Light
assembly
C mo d=2.2µF
CVS=4.7nF
VS
10kΩ
BRAKE
ISO-Pulse
protection circuit
depending on
requirements
Internal
supply
EN
Thermal
protection
Output
control
4.7nF**
PWMI
OUT
D
CD
RPWMI CPWMI
RSET
GND
Figure 26
IN_SET
Current
adjust
Basic
LITIXTMLED
Basic Driver
470kΩ*
Status
ST
GND
Eventually to other
Basic
LED
Driver
LITIXTM
Basic
CST =100pF**
* In case PWM via VS is performed.
** For EMI improvement, if required.
Application Diagram
Note: This is a very simplified example of an application circuit. In case of high ISO-pulse requirements a reverse
protection diode may be used for LED protection. The function must be verified in the real application.
12.1
•
Further Application Information
For further information you may contact http://www.infineon.com/
Data Sheet
33
Rev. 1.1, 2015-03-19
TLD1125EL
Package Outlines
13
Package Outlines
0.19 +0.06
0.08 C
0.15 M C A-B D 14x
0.64 ±0.25
1
8
1
7
0.2
M
D 8x
Bottom View
3 ±0.2
A
14
6 ±0.2
D
Exposed
Diepad
B
0.1 C A-B 2x
14
7
8
2.65 ±0.2
0.25 ±0.05 2)
0.1 C D
8˚ MAX.
C
0.65
3.9 ±0.11)
1.7 MAX.
Stand Off
(1.45)
0 ... 0.1
0.35 x 45˚
4.9 ±0.11)
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion
Dimensions in mm
PG-SSOP-14-1,-2,-3-PO V02
Figure 27
PG-SSOP14
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Data Sheet
34
Rev. 1.1, 2015-03-19
TLD1125EL
Revision History
14
Revision History
Revision
Date
Changes
1.0
2013-08-08
Inital revision of data sheet
1.1
2015-03-19
Updated parameters KLT and KALL in the chapter Power Stage.
Data Sheet
35
Rev. 1.1, 2015-03-19
Edition 2015-03-19
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2015 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
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For further information on technology, delivery terms and conditions and prices, please contact the nearest
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