isl72028seh

DATASHEET
3.3V Radiation Tolerant CAN Transceiver, with Low
Power Shutdown, Split Termination Output
ISL72028SEH
Features
The Intersil ISL72028SEH is a radiation tolerant 3.3V CAN
transceiver that is compatible with the ISO11898-2 standard for
applications calling for Controller Area Network (CAN) serial
communication in satellites and aerospace communications, and
telemetry data processing in harsh industrial environments.
• Electrically screened to SMD 5962-15228
The transceiver can transmit and receive at bus speeds up to
5Mbps. It can drive a 40m cable at 1Mbps per the ISO11898-2
specification. The device is designed to operate over a commonmode range of -7V to +12V with a maximum of 120 nodes. The
device has three discrete selectable driver rise/fall time options, a
low power shutdown mode and a split termination output.
• Bus pin fault protection to ±20V
Receiver (Rx) inputs feature a “full fail-safe” design, which
ensures a logic high Rx output if the Rx inputs are floating,
shorted, or terminated but undriven.
• Glitch free bus I/O during power-up and power-down
The ISL72028SEH is available in an 8 Ld hermetic ceramic
flatpack and die form that operate across the temperature range
of -55°C to +125°C. The logic inputs are tolerant with 5V
systems.
• High data rates. . . . . . . . . . . . . . . . . . . . . . . . . . . . up to 5Mbps
• ESD protection on all pins. . . . . . . . . . . . . . . . . . . . . . 4kV HBM
• Compatible with ISO11898-2
• Operating supply range . . . . . . . . . . . . . . . . . . . . . 3.0V to 3.6V
• Undervoltage lockout
• Cold spare: powered down devices/nodes will not affect
active devices operating in parallel
• Three selectable driver rise and fall times
• Full fail-safe (open, short, terminated/undriven) receiver
• Hi Z input allows for 120 nodes on the bus
Other CAN transceivers available are the ISL72026SEH and
ISL72027SEH. For a list of differences see Table 1 on page 2.
Related Literature
• UG051, “ISL7202xSEHEVAL1Z Evaluation Board User Guide”
• TR018, “Single Event Effects (SEE) Testing of the ISL72027SEH
CAN Transceiver”
• TR022, “Total Dose Testing of the ISL72026SEH, ISL72027SEH
and ISL72028SEH CAN Transceivers”
• Quiescent supply current . . . . . . . . . . . . . . . . . . . . 7mA (max)
• Low power shutdown mode . . . . . . . . . . . . . . . . . .50µA (max)
• -7V to +12V common-mode input voltage range
• 5V tolerant logic inputs
• Thermal shutdown
• Acceptance tested to 75krad(Si) (LDR) wafer-by-wafer
• Radiation tolerance
- SEL/B immune to LET 60MeV•cm2/mg
- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . . . .75krad(Si)
Applications
• Satellites and aerospace communications
• Telemetry data processing
• High-end industrial environments
RS 8
2 GND
CANH 7
CANH
ISL72028SEH
VCC
0.1µF
3 VCC
CANL 6
4 R
VREF 5
Rx DATA OUT
FIGURE 1. TYPICAL APPLICATION
April 28, 2016
FN8764.2
1
CANL
4
D
0
4
0
3
2
1
R
DRIVER INPUT
1 D
Tx DATA IN
DRIVER OUTPUT (V) RECEIVER OUTPUT
• Harsh environments
RS = GND, RDIFF = 60Ω
CANH - CANL
0
TIME (1µs/DIV)
FIGURE 2. FAST DRIVER AND RECEIVER WAVEFORMS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL72028SEH
Ordering Information
ORDERING/SMD
NUMBER (Note 1)
PART NUMBER
(Note 2)
TEMPERATURE RANGE
(°C)
PACKAGE
(RoHS Compliant)
PKG DWG #
5962L1522803VXC
ISL72028SEHVF
-55 to +125
8 Ld Ceramic Flat Pack
K8.A
ISL72028SEHF/PROTO
ISL72028SEHF/PROTO
-55 to +125
8 Ld Ceramic Flat Pack
K8.A
5962L1522803V9A
ISL72028SEHVX
-55 to +125
Die
ISL72028SEHX/SAMPLE
ISL72028SEHX/SAMPLE
-55 to +125
Die
ISL72028SEHEVAL1Z
Evaluation Board
NOTES:
1. Specifications for radiation tolerant QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed
in the Ordering Information table must be used when ordering.
2. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations.
TABLE 1. ISL7202xSEH PRODUCT FAMILY FEATURES TABLE
SPEC
ISL72026SEH
ISL72027SEH
ISL72028SEH
Loopback Feature
Yes
No
No
VREF Output
No
Yes
Yes
Listen Mode
Yes
Yes
No
Shutdown Mode
No
No
Yes
VTHRLM
1150mV (Max)
1150mV (Max)
N/A
VTHFLM
525mV (Min)
525mV (Min)
N/A
VHYSLM
50mV (Min)
50mV (Min)
N/A
Supply Current, Listen Mode
2mA (Max)
2mA (Max)
N/A
Supply Current, Shutdown Mode
N/A
N/A
50µA (Max)
VREF Leakage Current
N/A
±25µA (Max)
±25µA (Max)
N/A: Not Applicable
Pin Configuration
Note: The package lid is
tied to ground.
ISL72028SEH
(8 LD CERAMIC FLATPACK)
TOP VIEW
D
1
8
RS
GND
2
7
CANH
VCC
3
6
CANL
R
4
5
VREF
Pin Descriptions
PIN # PIN NAME
FUNCTION
1
D
CAN Driver Digital Input. The bus states are LOW = Dominant and HIGH = Recessive. Internally tied HIGH.
2
GND
Ground connection.
3
VCC
System power supply input (3.0V to 3.6V). The typical voltage for the device is 3.3V.
4
R
CAN Data Receiver Output. The bus states are LOW = Dominant and HIGH = Recessive.
8
RS
A resistor to GND from this pin controls the rise and fall time of the CAN output waveform. Drive RS HIGH to put into low power
shutdown.
7
CANH
CAN bus line for low level output
6
CANL
CAN bus line for high level output
5
VREF
VCC/2 reference output for split mode termination.
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ISL72028SEH
Equivalent Input and Output Schematic Diagrams
VCC
VCC
4k
INPUT
OUTPUT
35k
OUTPUT
2k
30V
30V
30V
7k
GND
GND
FIGURE 3. CANH AND CANL INPUTS
GND
FIGURE 4. CANH OUTPUT
FIGURE 5. CANL OUTPUT
VCC
VCC
COLD SPARE
VCC
VCC
LO/LPSD
INPUT
330k
5
200k
OUTPUT
INPUT
5
10V
+
-
10k
10V
10V
GND
GND
FIGURE 6. D INPUT
GND
FIGURE 7. R OUTPUT
FIGURE 8. RS INPUT
VCC
LO/LPSD
36V
1500
OUTPUT
1500
36V
30V
LO/LPSD
GND
FIGURE 9. VREF
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April 28, 2016
ISL72028SEH
Absolute Maximum Ratings
Thermal Information
VCC to GND With/Without Ion Beam . . . . . . . . . . . . . . . . . . . . -0.3V to 4.5V
CANH, CANL, VREF Under Ion Beam . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18V
CANH, CANL, VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V
I/O Voltages
D, R, RS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
Receiver Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10mA to 10mA
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating:
Human Body Model
CANH, CANL Bus Pins (Tested per MIL-PRF-883 3015.7) . . . . . . . 4kV
All Other Pins (Tested per MIL-PRF-883 3015.7) . . . . . . . . . . . . . . 4kV
Charged Device Model (Tested per JESD22-C101D) . . . . . . . . . . . . 750V
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . . 200V
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
8 Ld FP Package (Notes 3, 4) Direct Attach. .
39
7
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Recommended Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-55°C to +125°C
VCC Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.0V to 3.6V
Voltage on CAN I/O. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-7V to 12V
VIH D Logic Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 5.5V
VIL D Logic Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to 0.8V
IOH Driver (CANH - CANL = 1.5V, VCC = 3.3V) . . . . . . . . . . . . . . . . . . - 40mA
IOH Receiver (VOH = 2.4V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -4mA
IOL Driver (CANH - CANL = 1.5V, VCC = 3.3V) . . . . . . . . . . . . . . . . . . +40mA
IOL Receiver (VOL = 0.4V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3. JA is measured with the component mounted on a high effective thermal conductivity test board (two buried 1oz copper planes) with “direct attach”
features package base mounted to PCB thermal land with a 10mil gap fill material having a k of 1W/m-K. See Tech Brief TB379.
4. For JC, the “case temp” location is the center of the package underside.
Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Typicals are at TA = +25°C (Note 7); unless otherwise specified (Note 5).
Boldface limits apply across the operating temperature range, -55°C to +125°C or over a total ionizing dose of 75krad(Si) at +25°C with exposure at a
low dose rate of <10mrad(Si)/s.
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
MIN
(°C) (Note 6)
TYP
(Note 7)
MAX
(Note 6) UNIT
DRIVER ELECTRICAL CHARACTERISTICS
Dominant Bus Output Voltage
VO(DOM)
Recessive Bus Output Voltage
VO(REC)
Dominant Output Differential
Voltage
VOD(DOM)
Recessive Output Differential
Voltage
VOD(REC)
D = 0V, CANH, RS = 0V,
Figures 10 and 11
3.0V ≤ VCC ≤ 3.6V
Full
2.25
2.85
VCC
V
D = 0V, CANL, RS = 0V,
Figures 10 and 11
Full
0.10
0.65
1.25
V
D = 3V, CANH, RS = 0V, 60Ωand 3.0V ≤ VCC ≤ 3.6V
no load, Figures 10 and 11
Full
1.80
2.30
2.70
V
D = 3V, CANL, RS = 0V, 60Ωand
no load, Figures 10 and 11
Full
1.80
2.30
2.80
V
D = 0V, RS = 0V, 3.0V ≤ VCC ≤ 3.6V, Figures 10 and 11
Full
1.5
2.2
3.0
V
D = 0V, RS = 0V, 3.0V ≤ VCC ≤ 3.6V, Figures 11 and 12
Full
1.2
2.1
3.0
V
D = 3V, RS = 0V, 3.0V ≤ VCC ≤ 3.6V, Figures 10 and 11
Full
-120
0.2
12
mV
D = 3V, RS = 0V, 3.0V ≤ VCC ≤ 3.6V, no load
Full
-500
-34
50
mV
V
Logic Input High Voltage (D)
VIH
3.0V ≤ VCC ≤ 3.6V, Note 8
Full
2.0
-
5.5
Logic Input Low Voltage (D)
VIL
3.0V ≤ VCC ≤ 3.6V, Note 8
Full
0
-
0.8
V
High Level Input Current (D)
IIH
D = 2.0V, 3.0V ≤ VCC ≤ 3.6V
Full
-30
-3
30
µA
Low Level Input Current (D)
IIL
D = 0.8V, 3.0V ≤ VCC ≤ 3.6V
Full
-30
-7
30
µA
RS Input Voltage for Low Power
Shutdown Mode
VIN(RS)
3.0V ≤ VCC ≤ 3.6V
Full
0.75xVC
1.9
5.5
V
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4
FN8764.2
April 28, 2016
ISL72028SEH
Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Typicals are at TA = +25°C (Note 7); unless otherwise specified (Note 5).
Boldface limits apply across the operating temperature range, -55°C to +125°C or over a total ionizing dose of 75krad(Si) at +25°C with exposure at a
low dose rate of <10mrad(Si)/s. (Continued)
PARAMETER
SYMBOL
Output Short-Circuit Current
IOSC
TEST CONDITIONS
TEMP
MIN
(°C) (Note 6)
TYP
(Note 7)
MAX
(Note 6) UNIT
VCANH = -7V, CANL = OPEN, 3.0V ≤ VCC ≤ 3.6V,
Figure 18
Full
-250
-100
-
mA
VCANH = +12V, CANL = OPEN, 3.0V ≤ VCC ≤ 3.6V,
Figure 18
Full
-
0.4
1.0
mA
VCANL = -7V, CANH = OPEN, 3.0V ≤ VCC ≤ 3.6V,
Figure 18
Full
-1.0
-0.4
-
mA
VCANL = +12V, CANH = OPEN, 3.0V ≤ VCC ≤ 3.6V,
Figure 18
Full
-
100
250
mA
Thermal Shutdown Temperature
TSHDN
3.0V < VIN < 3.6V
-
-
163
-
°C
Thermal Shutdown Hysteresis
THYS
3.0V < VIN < 3.6V
-
-
12
-
°C
RECEIVER ELECTRICAL CHARACTERISTICS
Input Threshold Voltage (Rising)
V THR
RS = 0V, 10k, 50k, (recessive to dominant),
Figures 14 and 15
Full
-
750
900
mV
Input Threshold Voltage (Falling)
V THF
RS = 0V, 10k, 50k, (dominant to recessive),
Figures 14 and 15
Full
500
650
-
mV
Input Hysteresis
VHYS
(V THR - V THF), RS = 0V, 10k, 50k,
Figures 14 and 15
Full
40
90
-
mV
Receiver Output High Voltage
VOH
IO = -4mA
Full
2.4
VCC - 0.2
-
V
Receiver Output Low Voltage
VOL
IO = +4mA
Full
-
0.2
0.4
V
Input Current for CAN Bus
ICAN
CANH or CANL at 12V, D = 3V, other bus pin at 0V,
RS = 0V
Full
-
420
500
µA
CANH or CANL at 12V, D = 3V, VCC = 0V, other bus pin
at 0V, RS = 0V
Full
-
150
250
µA
CANH or CANL at -7V, D = 3V, other bus pin at 0V,
RS = 0V
Full
-400
-300
-
µA
CANH or CANL at -7V, D = 3V, VCC = 0V, other bus pin at
0V, RS = 0V
Full
-150
-85
-
µA
Input Capacitance (CANH or CANL) CIN
Input to GND, D = 3V, RS = 0V
25
-
35
-
pF
Differential Input Capacitance
CIND
Input to input, D = 3V, RS = 0V
25
-
15
-
pF
Input Resistance (CANH or CANL)
RIN
Input to GND, D = 3V, RS = 0V
Full
20
40
50
kΩ
RIND
Input to input, D = 3V, RS = 0V
Full
40
80
100
kΩ
ICC(LPS)
RS = D = VCC, 3.0V ≤ VCC ≤ 3.6V, Note 9
Full
-
20
50
µA
Supply Current, Dominant
ICC(DOM)
D = RS = 0V, no load, 3.0V ≤ VCC ≤ 3.6V
Full
-
5
7
mA
Supply Current, Recessive
ICC(REC)
D = VCC, RS = 0V, no load, 3.0V ≤ VCC ≤ 3.6V
Full
-
2.6
5.0
mA
CANH Leakage Current
IL(CANH)
VCC = 0.2V, CANH = -7V or 12V, D = VCC, CANL = float,
RS = 0V
Full
-25
-4
25
µA
CANL Leakage Current
IL(CANL)
VCC = 0.2V, CANL = -7V or 12V, D = VCC, CANH = float,
RS = 0V
Full
-25
-4
25
µA
VREF Leakage Current
IL(VREF)
VCC = 0.2V, VREF = -7V or 12V, D = VCC
Full
-25.00
0.01
25.00
µA
75
150
ns
Differential Input Resistance
SUPPLY CURRENT
Supply Current, Low Power
Shutdown Mode
COLD SPARING BUS CURRENT
DRIVER SWITCHING CHARACTERISTICS
Propagation Delay LOW to HIGH
tPDLH1
RS = 0V, Figure 13
Full
-
Propagation Delay LOW to HIGH
tPDLH2
RS = 10kΩ, Figure 13
Full
-
520
850
ns
Propagation Delay LOW to HIGH
tPDLH3
RS = 50kΩ, Figure 13
Full
-
850
1400
ns
Propagation Delay HIGH to LOW
tPDHL1
RS = 0V, Figure 13
Full
-
80
155
ns
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ISL72028SEH
Electrical Specifications Test Conditions: VCC = 3.0V to 3.6V; Typicals are at TA = +25°C (Note 7); unless otherwise specified (Note 5).
Boldface limits apply across the operating temperature range, -55°C to +125°C or over a total ionizing dose of 75krad(Si) at +25°C with exposure at a
low dose rate of <10mrad(Si)/s. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
MIN
(°C) (Note 6)
TYP
(Note 7)
MAX
(Note 6) UNIT
Propagation Delay HIGH to LOW
tPDHL2
RS = 10kΩ, Figure 13
Full
-
460
800
ns
Propagation Delay HIGH to LOW
tPDHL3
RS = 50kΩ, Figure 13
Full
-
725
1300
ns
Output Skew
tSKEW1
RS = 0V, (|tPHL - tPLH|), Figure 13
Full
-
5
50
ns
Output Skew
tSKEW2
RS = 10kΩ, (|tPHL - tPLH|), Figure 13
Full
-
60
510
ns
Output Skew
tSKEW3
RS = 50kΩ, (|tPHL - tPLH|), Figure 13
Full
-
110
800
ns
Output Rise Time
tr1
RS = 0V, (fast speed) Figure 13
Full
20
55
100
ns
Output Fall Time
tf1
Full
10
25
75
ns
Output Rise Time
tr2
Full
200
400
780
ns
Output Fall Time
tf2
Full
175
300
500
ns
Output Rise Time
tr3
Full
400
700
1400
ns
Output Fall Time
tf3
Total Loop Delay, Driver Input to
Receiver Output, Recessive to
Dominant
t(LOOP1)
Total Loop Delay, Driver Input to
Receiver Output, Dominant to
Recessive
t(LOOP2)
Low Power Shutdown to Valid
Dominant Time
tLPS_DOM
RS = 10kΩ, (medium speed - 250Kbps) Figure 13
RS = 50kΩ, (slow speed - 125Kbps) Figure 13
Full
300
650
1000
ns
RS = 0V, Figure 16
Full
-
115
210
ns
RS = 10kΩ, Figure 16
Full
-
550
875
ns
RS = 50kΩ, Figure 16
Full
-
850
1400
ns
RS = 0V, Figure 16
Full
-
130
270
ns
RS = 10kΩ, Figure 16
Full
-
500
825
ns
RS = 50kΩ, Figure 16
Full
-
750
1300
ns
Figure 17, Note 9
Full
-
6
15
µs
RECEIVER SWITCHING CHARACTERISTICS
Propagation Delay LOW to HIGH
tPLH
Figure 14
Full
-
50
110
ns
Propagation Delay HIGH to LOW
tPHL
Figure 14
Full
-
50
110
ns
Rx Skew
tSKEW1
|(tPHL - tPLH)|, Figure 14
Full
-
2
35
ns
Rx Rise Time
tr
Figure 14
Full
-
2
-
ns
Rx Fall Time
tf
Figure 14
Full
-
2
-
ns
VREF
-5µA < IREF < 5µA
Full
0.45xVC
1.6
0.55xVC
V
VREF/RS PIN CHARACTERISTICS
VREF Pin Voltage
C
-50µA < IREF < 50µA
Full
0.40xVC
C
1.6
0.60xVC
C
RS Pin Input Current
V
C
IRS(H)
RS = 0.75xVCC
Full
-10.0
-0.2
-
µA
IRS(L)
VRS = 0V
Full
-450
-125
0
µA
NOTES:
5. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
6. Parameters with MIN and/or MAX limits are 100% tested at -55°C, +25°C and +125°C, unless otherwise specified.
7. Typical values are at 3.3V. Parameters with a single entry in the “TYP” column apply to 3.3V. Typical values shown are not guaranteed.
8. Parameter included in functional testing.
9. Performed during the 100% screening operations across the full operating temperature range. Not performed as part of TCI Group E and Group C.
Radiation characterization testing performed as part of the initial release and any major changes in design.
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Test Circuits and Waveforms
DOMINANT
VO(CAN_H)
CAN_H
D
60Ω
RECESSIVE
CAN_L
V VO(CAN_L)
V
VOD
3V
2.3V
VO(CAN_H)
VO(CAN_L)
GND
FIGURE 10. DRIVER TEST CIRCUIT
1V
FIGURE 11. DRIVER BUS VOLTAGE DEFINITIONS
330Ω
D
CAN_H
60Ω
CAN_L
330Ω
V
-7V < VCM < 12V
GND
FIGURE 12. DRIVER COMMON-MODE CIRCUIT
D
CAN_H
60Ω
±1%
VIN
CAN_L
CL
50pF
±20%
V
tr
VO
0.9V
VO
GND
FIGURE 13A. DRIVER TIMING TEST CIRCUIT
VDOM
90%
0.5V
10%
SCOPE
VIN = 125kHz, 0V to VCC, Duty Cycle 50%, tr = tf ≤ 6ns, ZO = 50Ω
CL includes fixture and instrumentation capacitance
tf
tPLH
tPHL
VREC
VCC
VIN
0.5 x VCC
0V
FIGURE 13B. DRIVER TIMING MEASUREMENT POINTS
FIGURE 13. DRIVER TIMING
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Test Circuits and Waveforms (Continued)
CAN_H
R
15pF
VO
CAN_L
VIN
GND
1.5V
CAN_H
R
VDIFF
VCANH
CAN_L
VIN = 125kHz, Duty Cycle 50%, tr = tf ≤ 6ns, ZO = 50Ω
CL includes test setup capacitance
VO
FIGURE 14B. RECEIVER TEST CIRCUIT
GND
VCANL
tr
50%
VO
tf
VOH
90%
50%
10%
tPLH
tPHL
VOL
2.9V
VIN
2.2V
1.5V
FIGURE 14A. RECEIVER VOLTAGE DEFINITIONS
FIGURE 14C. RECEIVER TEST MEASUREMENT POINTS
FIGURE 14. RECEIVER TEST
INPUT
OUTPUT
MEASURED
VCANH
VCANL
R
VDIFF
–6.1V
–7V
L
900mV
12V
11.1V
L
900mV
–1V
–7V
L
6V
12V
6V
L
6V
–6.5V
–7V
H
500mV
12V
11.5V
H
500mV
–7V
–1V
H
6V
6V
12V
H
6V
FIGURE 15. DIFFERENTIAL INPUT VOLTAGE THRESHOLD TEST
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FN8764.2
April 28, 2016
ISL72028SEH
Test Circuits and Waveforms (Continued)
0Ω, 10kΩ, 50kΩ
RS
FLOAT
VREF
CAN H
D
VO
50%
50%
VIN
R
VIN
VCC
60Ω
±1%
CAN L
GND
0V
t(LOOP2)
t(LOOP1)
50%
15pF ±20%
VOH
50%
VO
VOL
VIN = 125kHz, Duty Cycle 50%, tr = tf ≤ 6ns
FIGURE 16A. TOTAL LOOP DELAY TEST CIRCUIT
FIGURE 16B. TOTAL LOOP DELAY MEASUREMENT POINTS
FIGURE 16. TOTAL LOOP DELAY
RS
FLOAT
VIN
VO
CAN_H
VREF
VOD
D
CAN_L
R
GND
60Ω
VCC
±1%
50%
VIN
0V
VOH
50%
15pF ±20%
VO
VOL
t(LPS - DOM)
VIN = 125kHz, 0V to VCC, Duty Cycle 50%, tr = tf ≤ 6ns.
FIGURE 17A. LOW POWER SHUTDOWN TO DOMINANT TIME CIRCUIT
FIGURE 17B. LOW POWER SHUTDOWN TO DOMINANT TIME
MEASUREMENT POINTS
FIGURE 17. LOW POWER SHUTDOWN TO DOMINANT TIME
|IO(SRT)|
IO(SRT)
GND
D
0A
CANH
12V
CANL
VIN
IO(SRT)
+
-
GND
VIN = -7V
OR 12V
FIGURE 18A. OUTPUT SHORT-CIRCUIT CURRENT CIRCUIT
10ms
0V
VIN
-7V
FIGURE 18B. OUTPUT SHORT-CIRCUIT CURRENT WAVEFORMS
FIGURE 18. OUTPUT SHORT CIRCUIT
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FN8764.2
April 28, 2016
ISL72028SEH
Functional Description
Overview
The Intersil ISL72028SEH is a 3.3V radiation tolerant CAN
transceiver that is compatible with the ISO11898-2 standard for
use in CAN (Controller Area Network) serial communication
systems.
The device performs transmit and receive functions between the
CAN controller and the CAN differential bus. It can transmit and
receive at bus speeds of up to 5Mbps. It is designed to operate
over a common-mode range of -7V to +12V with a maximum of
120 nodes. The device is capable of withstanding ±20V on the
CANH and CANL bus pins outside of ion beam and ±16V under
ion beam.
Slope Adjustment
The output driver rise and fall time has three distinct selections
that may be chosen by using a resistor from the RS pin to GND.
Connecting the RS pin directly to GND results in output switching
times that are the fastest, limited only by the drive capability of
the output stage. RS = 10kΩ provides for a typical slew rate of
8V/µs and RS = 50kΩ provides for a typical slew rate of 4V/µs.
Putting a high logic level to the RS pin places the device in a low
power shutdown mode. The protocol controller uses this mode to
switch between low power shutdown mode and normal transmit
mode.
Low Power Shutdown Mode
When a high level is applied to the RS pin, the device enters the
low power shutdown mode in which the driver and receiver are
switched off to conserve power. The bus pins are at High Z and R
pin will be at logic high. In low power shutdown the transceiver
draws 50µA (max) of current.
A low level on the RS pin brings the device back to operation.
Using 3.3V Devices in 5V Systems
Looking at the differential voltage of both the 3.3V and 5V
devices, the differential voltage is the same, the recessive
common-mode output is the same. The dominant
common-mode output voltage is slightly lower than the 5V
counterparts. The receiver specs are also the same. Though the
electrical parameters appear compatible, it is advised that
necessary system testing be performed to verify interchangeable
operation.
Split Mode Termination
The VREF pin provides a VCC/2 output voltage for split mode
termination. The VREF pin has the same ESD protection, short
circuit protection and common-mode operating range as the bus
pins.
The split mode termination technique is shown in Figure 19.
VREF
Cable Length
The device can work per ISO11898 specification with a 40m
cable and stub length of 0.3m and 60 nodes at 1Mbps. This is
greater than the ISO requirement of 30 nodes. The cable type
specified is twisted pair (shielded or unshielded) with a
characteristic impedance of 120Ω. Resistors equal to this are to
be terminated at both ends of the cable. Stubs should be kept as
short as possible to prevent reflections.
Cold Spare
High reliability system designers implementing data
communications have to be sensitive to the potential for single
point failures. To mitigate the risk of a failure, they will use
redundant bus transceivers in parallel. In this arrangement, both
active and quiescent devices can be present simultaneously on
the bus. The quiescent devices are powered down for cold spare
and do not affect the communication of the other active nodes.
To achieve this, a powered down transceiver (VCC < 200mV) has
a resistance between the VREF pin or the CANH pin or CANL pin
and the VCC supply rail of >480kΩ (max) with a typical resistance
>2MΩ. The resistance between CANH and CANL of a
powered-down transceiver has a typical resistance of 80kΩ.
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10
NODE
#1
NODE
#2
NODE
#n
VREF
CANH
60Ω
CL
60Ω
60Ω
CANL
60Ω
CL
FIGURE 19. SPLIT TERMINATION
It is used to stabilize the bus voltage at VCC/2 and prevent it from
drifting to a high common-mode voltage during periods of
inactivity. The technique improves the electromagnetic
compatibility of a network. The split mode termination is put at
each end of the bus.
The CL capacitor between the two 60Ω resistors, filters unwanted
high frequency noise to ground. The resistors should have a
tolerance of 1% or better and the two resistors should be
carefully matched to provide the most effective EMI immunity. A
typical value of CL for a high speed CAN network is 4.7nF, which
generates a 3dB point at 1.1Mbps. The capacitance value used is
dependent on the signaling rate of the network.
FN8764.2
April 28, 2016
ISL72028SEH
Typical Performance Curves
CL = 15pF, TA = +25°C; unless otherwise specified.
25
25
-55 °C
+125 °C
+25 °C
20
20
+25 °C
+125 °C
ICC (mA)
ICC (mA)
15
10
5
15
-55 °C
10
5
RS = GND, RDIFF = 60Ω
0
100
200
300
400
500
600
700
800
900
RS = 10kΩ, RDIFF = 60Ω
0
100
1000
200
300
400
500
600
700
800
900
1000
DATA RATE (kbps)
DATA RATE (kbps)
FIGURE 20. SUPPLY CURRENT vs FAST DATA RATE vs
TEMPERATURE
FIGURE 21. SUPPLY CURRENT vs MEDIUM DATA RATE vs
TEMPERATURE
200
25
VCC = RS = GND, D = 3V, OTHER BUS PIN = GND
+125 °C
150
20
-55 °C
BUS CURRENT (µA)
ICC (mA)
+25 °C
15
+25 °C
10
-55 °C
100
+125 °C
50
0
5
-50
RS = 50kΩ, RDIFF = 60Ω
0
100
200
300
400
500
600
700
800
900
-100
1000
DATA RATE (kbps)
-8
15
600
VCC = 3V OR 3.6V, RS = GND, D = VCC, OTHER BUS PIN = GND
BUS CURRENT (mA)
BUS CURRENT (µA)
-55 °C
+25 °C
0
-200
12
-55 °C
+25 °C
5
0
+125 °C
-5
-10
-400
-600
-12
8
VCC = 3V OR 3.6V, RS = GND, D = VCC, OTHER BUS PIN = GND
10
+125 °C
200
0
4
BUS VOLTAGE (V)
FIGURE 23. BUS PIN LEAKAGE vs VCM AT VCC = 0V
FIGURE 22. SUPPLY CURRENT vs SLOW DATA RATE vs
TEMPERATURE
400
-4
-9
-6
-3
0
3
BUS VOLTAGE (V)
6
FIGURE 24. BUS PIN LEAKAGE vs ±12V VCM
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11
9
12
-15
-40
-30
-20
-10
0
10
BUS VOLTAGE (V)
20
30
40
FIGURE 25. BUS PIN LEAKAGE vs ±35V VCM
FN8764.2
April 28, 2016
ISL72028SEH
Typical Performance Curves
CL = 15pF, TA = +25°C; unless otherwise specified. (Continued)
3.0
120
H TO L, VCC = 3V
RS = GND, RDIFF = 60Ω
2.5
100
2.0
80
TIME (ns)
RECEIVER VOLTAGE (V)
100kΩ ON R TO VCC, RS = D = GND, RDIFF = OPEN
1.5
DOWN
L TO H, VCC = 3V
L TO H, VCC = 3.6V
60
H TO L, VCC = 3.6V
1.0
40
SKEW, VCC = 3V
UP
0.5
20
SKEW, VCC = 3.6V
0
0
0.5
1.0
1.5
2.0
2.5
3.0
VCC SWEEP (V)
3.5
4.0
4.5
0
-55
5.0
-15
5
25
45
65
85
105
125
TEMPERATURE (°C)
FIGURE 26. VCC UNDERVOLTAGE LOCKOUT
FIGURE 27. TRANSMITTER PROPAGATION DELAY AND SKEW vs
TEMPERATURE AT FAST SPEED
800
1200
RS = 10kΩ, RDIFF = 60Ω
700
-35
RS = 10kΩ, RDIFF = 60Ω
L TO H, VCC = 3V
L TO H, VCC = 3V
1000
600
800
L TO H, VCC = 3.6V
400
H TO L, VCC = 3V
300
TIME (ns)
TIME (ns)
500
H TO L, VCC = 3.6V
SKEW, VCC = 3V
H TO L, VCC = 3V
45
65
85
105
SKEW, VCC = 3V
200
100
25
L TO H, VCC = 3.6V
600
400
200
SKEW, VCC = 3.6V
0
-55
-35
-15
5
H TO L, VCC = 3.6V
SKEW, VCC = 3.6V
0
-55
-35
-15
5
125
TEMPERATURE (°C)
FIGURE 28. TRANSMITTER PROPAGATION DELAY AND SKEW vs
TEMPERATURE AT MEDIUM SPEED
125
RS = 10kΩ, RDIFF = 60Ω
55
RISE, VCC = 3V
500
RISE, VCC = 3.6V
RISE, VCC = 3V
400
TIME (ns)
45
TIME (ns)
105
600
RS = GND, RDIFF = 60Ω
RISE, VCC = 3.6V
40
35
FALL, VCC = 3V
300
200
FALL, VCC = 3V
FALL, VCC = 3.6V
30
100
25
20
-55
85
FIGURE 29. TRANSMITTER PROPAGATION DELAY AND SKEW vs
TEMPERATURE AT SLOW SPEED
60
50
25
45
65
TEMPERATURE (°C)
FALL, VCC = 3.6V
-35
-15
5
25
45
65
85
105
125
TEMPERATURE (°C)
FIGURE 30. TRANSMITTER RISE AND FALL TIMES vs TEMPERATURE
AT FAST SPEED
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12
0
-55
-35
-15
5
25
45
65
85
105
125
TEMPERATURE (°C)
FIGURE 31. TRANSMITTER RISE AND FALL TIMES vs TEMPERATURE
AT MEDIUM SPEED
FN8764.2
April 28, 2016
ISL72028SEH
Typical Performance Curves
CL = 15pF, TA = +25°C; unless otherwise specified. (Continued)
1200
100
RS = 50kΩ, RDIFF = 60Ω
90
1000
RISE, VCC = 3.6V
800
TIME (ns)
DRIVER OUTPUT CURRENT (mA)
RISE, VCC = 3V
600
400
FALL, VCC = 3.6V
FALL, VCC = 3V
200
RDIFF = 20Ω
+25 °C
80
RDIFF = 30Ω
+85 °C
70
RDIFF = 60Ω
60 +125 °C
50
40
RDIFF = 120Ω
30
20
10
0
-55
-35
-15
5
25
45
65
85
105
0
125
0
0.5
TEMPERATURE (°C)
FIGURE 32. TRANSMITTER RISE AND FALL TIMES vs TEMPERATURE
AT SLOW SPEED
150
-55 °C
100
BUS CURRENT (mA)
BUS CURRENT (mA)
CANL
0
-50
+125 °C
CANH
0
-50
+125 °C
-100
CANH
-15
-10
-5
0
5
10
15
-55 °C
-200
-20
20
-15
-10
-5
BUS VOLTAGE (V)
+25 °C
+125 °C
VOL
10
0
+125 °C
VOH
+25 °C
-20
-30
RECEIVER OUTPUT CURRENT (mA)
RECEIVER OUTPUT CURRENT (mA)
VCC = 3.6V
-55 °C
40
-40
60
15
20
-55 °C
+25 °C
+125 °C
40
20
VOL
0
+125 °C
VOH
+25 °C
-20
-40
-55 °C
-55 °C
0
10
80
VCC = 3V
-10
5
FIGURE 35. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE
vs TEMPERATURE
50
20
0
BUS VOLTAGE (V)
FIGURE 34. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE
vs TEMPERATURE
30
+25 °C
-150
-55 °C
-150
-20
3.3
3.0
CANL
+125 °C
50
+25 °C
-100
2.5
+25 °C
+25 °C
+125 °C
2.0
VCC = 3.6V, D = GND
-55 °C
VCC = 3V, D = GND
50
1.5
FIGURE 33. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT
VOLTAGE
150
100
1.0
DIFFERENTIAL OUTPUT VOLTAGE (V)
0.5
1.0
1.5
2.0
2.5
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 36. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE AT VCC = 3V
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3.0
-60
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 37. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE AT VCC = 3.6V
FN8764.2
April 28, 2016
ISL72028SEH
Typical Performance Curves
CL = 15pF, TA = +25°C; unless otherwise specified. (Continued)
3.5
80
L TO H, VCC = 3V
RISE, VCC = 3V
70
3.0
H TO L, VCC = 3V
60
FALL, VCC = 3V
40
TIME (ns)
TIME (ns)
50
H TO L, VCC = 3.6V
30
L TO H, VCC = 3.6V
FALL, VCC = 3.6V
2.5
2.0
RISE, VCC = 3.6V
SKEW, VCC = 3V
20
1.5
SKEW, VCC = 3.6V
10
-15
5
25
45
65
85
105
1.0
-55
125
-35
-15
TEMPERATURE (°C)
5
25
45
65
85
105
125
TEMPERATURE (°C)
FIGURE 38. RECEIVER PROPAGATION DELAY AND SKEW vs
TEMPERATURE
FIGURE 39. RECEIVER RISE AND FALL TIMES vs TEMPERATURE
RECEIVER OUTPUT (V)
70
60
-55 °C
ICC (mA)
50
40
30
10
0
+125 °C
0
1
2
3
4
5
6
VCC (V)
DRIVER OUTPUT (V)
+25 °C
20
4
D
4
3
RS = GND, RDIFF = 60Ω
2
1
0
3
RS = 10kΩ, RDIFF = 60Ω
2
CANH - CANL
0
RECEIVER OUTPUT (V)
R
DRIVER OUTPUT (V)
0
DRIVER INPUT (V)
RECEIVER OUTPUT (V)
DRIVER OUTPUT (V)
FIGURE 41. FAST DRIVER AND RECEIVER WAVEFORMS
4
1
CANH - CANL
TIME (1µs/DIV)
4
0
R
0
FIGURE 40. SUPPLY CURRENT vs SUPPLY VOLTAGE vs
TEMPERATURE
D
0
4
D
0
4
0
R
3
RS = 50kΩ, RDIFF = 60Ω
2
CANH - CANL
1
0
TIME (1µs/DIV)
TIME (1µs/DIV)
FIGURE 42. MEDIUM DRIVER AND RECEIVER WAVEFORMS
FIGURE 43. SLOW DRIVER AND RECEIVER WAVEFORMS
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DRIVER INPUT (V)
-35
DRIVER INPUT (V)
0
-55
FN8764.2
April 28, 2016
ISL72028SEH
Die Characteristics
Assembly Related Information
Die Dimensions
SUBSTRATE POTENTIAL
Floating
2413µm x 3322µm (95 mils x 130.79 mils)
Thickness: 305µm ±25µm (12 mils ±1 mil)
Additional Information
Interface Materials
WORST CASE CURRENT DENSITY
1.6 x 105A/cm2
GLASSIVATION
Type: 12kÅ Silicon Nitride on 3kÅ Oxide
TRANSISTOR COUNT
TOP METALLIZATION
4055
Type: 300Å TiN on 2.8µm AlCu
In Bondpads, TiN has been removed.
Weight of Packaged Device
0.31 grams
BACKSIDE FINISH
Lid Characteristics
Silicon
Finish: Gold
Potential: Grounded, tied to package pin 2
PROCESS
P6SOI
NC
NC
NC
NC
NC
NC
NC
NC
Metalization Mask Layout
8
7
6
5
4
3
2
1
26
GND_ESD
12
VCC
13
VCC_VREF
14
R
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15
15
25
CANH
24
CANL
23
VREF
22
16
17
18
19
20
21
NC
11
NC
GND
NC
10
NC
GND_LPSD
NC
9
NC
D
RS
NC
FN8764.2
April 28, 2016
ISL72028SEH
TABLE 2. ISL72028SEH DIE LAYOUT X-Y COORDINATES
PAD NUMBER
PAD NAME
X
(µm)
Y
(µm)
X
Y
1
NC
90.0
90.0
901.4
1365.6
2
NC
90.0
90.0
767.4
1365.6
3
NC
90.0
90.0
-183.23
1365.6
4
NC
90.0
90.0
-333.25
1365.6
5
NC
90.0
90.0
-483.25
1365.6
6
NC
90.0
90.0
-633.25
1365.6
7
NC
90.0
90.0
-783.25
1365.6
8
NC
90.0
90.0
-933.25
1365.6
9
D
110.0
110.0
-931.1
901.85
10
GND_LSPD
110.0
110.0
-931.1
563.25
11
GND
110.0
180.0
-931.1
342.25
12
GND_ESD
110.0
110.05
-931.1
119.42
13
VCC
110.0
180.0
-931.1
-115.05
14
VCC_VREF
110.0
180.05
-931.1
-371.08
15
R
110.0
180.0
-931.1
-1350.0
16
NC
90.0
90.0
-711.1
-1394.95
17
NC
90.0
90.0
-561.1
-1394.95
18
NC
90.0
90.0
-411.1
-1394.95
19
NC
90.0
90.0
-261.1
-1394.95
20
NC
90.0
90.0
-111.1
-1394.95
21
NC
90.0
90.0
38.9
-1394.95
22
NC
110.0
110.0
756.9
-1307.3
23
VREF
110.0
180.0
775.3
-1072.3
24
CANL
110.0
180.0
772.1
2.15
25
CANH
110.0
180.05
772.1
343.33
26
RS
110.0
180.0
848.1
1140.6
NOTE: Origin of coordinates is the center of the die. NC - No Connect
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FN8764.2
April 28, 2016
ISL72028SEH
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted.
Please go to the web to make sure that you have the latest revision.
DATE
REVISION
CHANGE
April 28, 2016
FN8764.2
- Updated title.
- Updated the test condition for Output Rise Time on page 6.
- Changed maximum data rate from 1Mbps to 5Mbps in the following locations:
- Second paragraph and “Features” section on page 1.
- In “Overview” on page 10.
November 9, 2015
FN8764.1
Absolute Maximum Ratings table on page 4: changed the value for “CANH, CANL, VREF Under Ion Beam”
from ±16V to ±18V.
October 26, 2015
FN8764.0
Initial Release
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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FN8764.2
April 28, 2016
ISL72028SEH
Package Outline Drawing
K8.A
8 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
Rev 4, 12/14
0.015 (0.38)
0.008 (0.20)
PIN NO. 1
ID OPTIONAL
1
2
0.050 (1.27 BSC)
0.005 (0.13)
MIN
4
PIN NO. 1
ID AREA
0.022 (0.56)
0.015 (0.38)
0.110 (2.79)
0.087 (2.21)
0.265 (6.73)
0.245 (6.22)
TOP VIEW
0.036 (0.92)
0.026 (0.66)
0.009 (0.23)
0.004 (0.10)
6
0.265 (6.75)
0.245 (6.22)
-D-
-H-
-C-
0.180 (4.57)
0.170 (4.32)
SEATING AND
BASE PLANE
0.370 (9.40)
0.325 (8.26)
0.03 (0.76) MIN
SIDE VIEW
0.007 (0.18)
0.004 (0.10)
NOTES:
LEAD FINISH
0.009 (0.23)
BASE
METAL
0.004 (0.10)
0.019 (0.48)
0.015 (0.38)
0.0015 (0.04)
MAX
0.022 (0.56)
0.015 (0.38)
2. If a pin one identification mark is used in addition to or instead of a tab,
the limits of the tab dimension do not apply.
3. The maximum limits of lead dimensions (section A-A) shall be
measured at the centroid of the finished lead surfaces, when solder
dip or tin plate lead finish is applied.
4. Measure dimension at all four corners.
3
SECTION A-A
1. Index area: A notch or a pin one identification mark shall be located
adjacent to pin one and shall be located within the shaded area shown.
The manufacturer’s identification shall not be used as a pin one
identification mark. Alternately, a tab may be used to identify pin one.
5. For bottom-brazed lead packages, no organic or polymeric materials
shall be molded to the bottom of the package to cover the leads.
6. Dimension shall be measured at the point of exit (beyond the
meniscus) of the lead from the body. Dimension minimum shall
be reduced by 0.0015 inch (0.038mm) maximum when solder dip
lead finish is applied.
7. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
8. Controlling dimension: INCH.
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18
FN8764.2
April 28, 2016