CD4011BT Data Sheet July 1999 File Number CMOS Quad 2-Input NAND Gate Features Intersil’s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of reliability. • QML Class T, Per MIL-PRF-38535 The CD4011BT, Quad 2-Input NAND gate provides the system designer with direct implementation of the NAND function and supplements the existing family of CMOS gates. All inputs and outputs are buffered. 4620.1 • Radiation Performance - Gamma Dose (γ) 1 x 105 RAD(Si) - SEP Effective LET > 75 MEV/gm/cm2 • Propagation Delay Time = 60ns (typ.) at CL = 50pF, VDD = 10V • Buffered Inputs and Outputs • Standardized Symmetrical Output Characteristics • 100% Tested for Maximum Quiescent Current at 20V Specifications • 5V, 10V and 15V Parametric Ratings Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Pinouts CD4011BT (SBDIP), CDIP2-T14 TOP VIEW Detailed Electrical Specifications for the CD4011BT are contained in SMD 5962-96621. A “hot-link” is provided from our website for downloading. www.intersil.com/quality/manuals.asp Intersil’s Quality Management Plan (QM Plan), listing all Class T screening operations, is also available on our website. www.intersil.com/quality/manuals.asp Ordering Information ORDERING NUMBER PART NUMBER TEMP. RANGE (oC) 5962R9662101TCC CD4011BDTR -55 to 125 5962R9662101TXC CD4011BKTR -55 to 125 A 1 14 VDD B 2 13 H J = AB 3 12 G K = CD 4 11 M = GH C 5 10 L = EF D 6 9 E VSS 7 8 F CD4011BT (FLATPACK), CDFP3-F14 TOP VIEW A 1 14 VDD B 2 13 H NOTE: Minimum order quantity for -T is 150 units through J = AB 3 12 G distribution, or 450 units direct. K = CD 4 11 M = GH C 5 10 L = EF D 6 9 E VSS 7 8 F 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 CD4011BT Schematic and Logic Diagram 14 p 1† p n (8, 6, 13) VDD p 2† p (9, 5, 12) p n 3 (10, 4, 11) n n n VDD 7 VSS VSS † ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK 1 OF 4 GATES (NUMBERS IN PARENTHESES ARE TERMINAL NUMBERS FOR OTHER GATES) 1(8, 6,13) 3 (10, 4, 11) 2(9, 5, 12) 2 LOGIC DIAGRAM CD4011BT Die Characteristics DIE DIMENSIONS: PASSIVATION: (1143µm x 1626µm x 533µm ±25.4µm) Type: Phosphorus Doped Silox (SiO2) 45 x 64 x 21mils ±1mil Thickness: 13kÅ ±2.6kÅ METALLIZATION: WORST CASE CURRENT DENSITY: < 2.0e5 A/cm2 Type: Al Thickness: 12.5kÅ ±1.5kÅ TRANSISTOR COUNT: SUBSTRATE POTENTIAL: 10 Leave Floating or Tie to VDD PROCESS: Bond Pad #14 (VDD) First Bulk CMOS BACKSIDE FINISH: Silicon Metallization Mask Layout CD4011BT 45mils 64mils All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 3 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029