Supertex inc. MD2134DB1 MD2134 Ultrasound Beamforming Transmitter Demoboard Introduction The MD2134 is a high-speed, arbitrary waveform, push-pull source-driver. It is designed for medical ultrasound imaging and HIFU beam forming applications. It also can be used in NDT, sonar and other ultrasound phase-array focusing beamforming applications. The integrated circuit (IC) consists of the CMOS digital logic input circuits, an 8-bit current DAC for the waveform amplitude control, and four pre-stored Sine waveforms with pulseamplitude-modulation (PAM) current sources. These current sources are constructed with the high-speed current-switch array and SPI programmable LV[15:1] PAM level registers. The PAM level resolution of the waveform is 7-bit, 128-step plus sign. There are four logic inputs M[3:0] as fast control signals. They control the push-pull current-source’s output timing, frequency, cycle in the burst, as well as the currentlevel output. The 15 level registers, along with the DAC value, together can be written and read-back via a SPI serial interface. The MD2134’s output stage is designed to drive two depletion mode high voltage Supertex DN2625 N-type MOSFETs as the source drivers. The MOSFET drains are connected to a center-tap ultrasound frequency pulse transformer. The secondary winding of the transformer can connect to the ultrasound piezo or capacitive transducer via cable and with a good impedance match. MD2134 has a high-speed 120MHz serial data interface that can quickly update the beam forming apodization between scans. General Description This demoboard datasheet describes how to use the MD2134DB1 to generate the ultrasound transmit beam forming waveform with the Gaussian profile, and the adjustable frequency, amplitude and phase angle. It also provides information about how to design a user application circuit and PCB using the MD2134K7 and DN2625DK6 devices. The MD2134DB1 circuit uses a pair of depletion mode, high voltage, DN2625 MOSFETs in the push-pull mode to drive the center-tap wide band ultrasound output transformer. The MOSFETs are in one 8-Lead DFN surface mount package. The sources of the MOSFETs are directly driven by the MD2134’s two outputs, whose maximum peak sinking current is up to 3.3A. These current-source outputs are controlled by the MD1234’s internal current source switch array and the input signals M[3:0]. All of the MD2134’s logic control signals are generated by two small CPLD-programmable logic circuits clocked by an onboard 160MHz crystal oscillator. The on-board CPLD circuits not only generate accurate timing for the high-speed PAM level control waveforms, but also the serial data and clock to set and change the waveform amplitude DAC and waveform selection registers. The external clock input can be used if the on-board oscillator is disabled. The external trigger input can be used to synchronize the burst waveforms’ launch timing. There are five push buttons for enabling and selecting the output waveform selection (PAM), amplitude (DAC) and chip en- Demoboard Block Diagram +3.3V VCC EXTRG VCCIO EXTRG CPLD EXCLK OSC 160MHz +2.5V JTAG CLKIN DIS Wave Freq Phase Ampl ENA Doc.# DSDB-MD2134DB1 A070114 EN M1 M3 M0 M2 SDI SDO SCK CS LD Phase DAC PWR EN +2.5V +5.0V VLL VDD PA MD2134 GND RFB PB +5.0V +3.3V DN2625 +70 to 100V VPP C7 DN2625 T1 1:1:1 JUMP 220pF XDCX 1k LOAD +5.0V +3.3V Supertex inc. www.supertex.com MD2134DB1 very small inductive loads, ringing and even oscillations are possible. The supply voltage bypass capacitors and the MOSFET gate de-coupling capacitors should be as close to the pins as possible. The capacitor’s ground pin pads should have low inductance, feed-through connections that are connected directly to a solid ground plane. The VDD and VPP supplies can draw fast transient currents of up to 3.5A, so they should be provided with a low-impedance bypass capacitor at the chip’s pins. A ceramic capacitor of 0.1 to 1.0µF may be used. Minimize the trace length to the ground plane, and insert a ferrite bead in the power supply lead to the capacitor to prevent resonance in the power supply lines. For applications that are sensitive to jitter and noise and when using multiple MD2134 ICs, insert another ferrite bead between VDD and decouple each chip supply separately. Pay particular attention to minimizing trace lengths and using sufficient trace width to reduce inductance not only on the supply pins but also on the CA/B and KA/B compensation pins. Very closely placed surface mount components are highly recommended. Be aware of the parasitic coupling from the high voltage outputs to the input signal terminals of MD2134. This feedback may cause oscillations or spurious waveform shapes on the edges of signal transitions. Since the input operates with signals down to 2.5V, even small coupling voltages may cause problems. Use of a solid ground plane and good power and signal layout practices will prevent this problem. Also ensure that the circulating ground return current from a capacitive load cannot react with common inductance to create noise voltages in the input logic circuitry. able (EN). The FREQ button is not being used for this revision of firmware. Four color LEDs indicate the power, chip enable, waveform selection, and DAC states. The MD2134DB1 output waveform can be displayed by using an oscilloscope and the high impedance probe at the TP13 test point. It also can use an SMA to BNC 50Ω coaxial cable connected directly to an oscilloscope, with an attenuation of 5:1 if R10 is 200Ω. A cable can also be used to drive the user’s transducer directly. Jumper J4 can be used to select whether or not to connect the on-board equivalent-load, which is formed by a 220pF capacitor in parallel with a 1.0kΩ resistor. Circuit Design & PCB Layout The thermal pad at the bottom of the MD2134 package must be connected to the VSUB pin on the PCB. The VSUB is connected to the IC’s substrate. It is important to make sure that the VSUB is well grounded. A proper supply voltage power-up sequence is needed to test the circuit. To prevent any supply voltage polarity reversing, the circuit also has protection Schottky diodes (D7, D8 and D9). Due to the high current and high current slew rate nature of this common gate, source-driven and push-pull circuit topology, the two cascading N-channel MOSFETs need to have very low lead inductance of the connections. The Supertex DN2625DK6 is designed for this application and works with the MD2134K7 seamlessly. In particular, a good PCB layout design needs to shorten the traces between the MD2134K7 output pins and the DN2625DK6 source pins. It is also necessary to connect all three pairs of pins between them for the high current carrying capacity. Furthermore, because of the high di/dt current in MD2134’s outputs, it is also necessary to connect the Schottky diodes D5 and D6 from the driver output pins connected to the +5.0V power supply line, as the clamping diodes. Note that the diodes must have enough speed and peak current capability. The RC snubber circuits of R8-C5 and R15-C28 at the output pins can dump the current pulse edge ringing effectively. This MD2134DB1 demoboard should be powered up with multiple DC power supplies with current limiting functions. The power supply voltages and current limits used in the testing are listed on page 7. There are examples of the MD2134DB1 demoboard input and output waveform and measurements shown in Figures 1 to 7 below. Output Transformer Design The center tap, wide band, ultrasound transformer for pushpull output circuit serves three functions: a balanced-differential to single-end output transformer; an isolation barrier to the ultrasound probe; and an impedance matching or low-pass network combined with the cable and transducer element. The MD2134 PAM clock may operate at a 80 to 160MHz frequency range, however the wide band transformer needs only to work in the frequency band of the dummy load (220pF//1.0k). Besides the bandwidth consideration, the small transformer should be designed using a ferrite magnetic core selected to give high enough saturation current and low leakage inductance. PCB designers need to pay attention to some of the connecting traces as high-voltage and high-speed traces. In particular, low capacitance to the ground plane and more trace spacing needs to be applied in this situation. High-speed PCB trace design practices that are compatible with about 100 to 200 MHz operating speed are used for the demoboard PCB layout. The internal circuitry of the MD2134 can operate at quite a high frequency, with the primary speed limitation being load capacitance. Because of this high speed and the high transient currents that result when driving even Doc.# DSDB-MD2134DB1 A070114 2 Supertex inc. www.supertex.com MH2 B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 3 2 3 2 R7 50 TP2 TP3 CC DD EE FF GG HH II JJ KK LL MM NN MH3 36 40 32 29 28 33 8 38 42 1 41 34 1 37 J3 EXTRG R2 50 MH4 VCC U3 XC9572XL_VQ44 AA 44 PH0 DAC PWR NC1 NC2 NC3 NC4 NC5 MH1 2 3 5 6 7 BB 4 GND 17 GND 25 GND C8 0.1 C7 0.1 C29 0.1 16 23 14 13 22 3 SDI SDO SCK CS LD EN TP20 VCC OUT GND 18 NC9 NC8 20 19 NC7 21 NC6 12 EN C6 0.1 2 SDI SDO SCK CS LD VCCIO 39 EXTRG CLKIN 43 31 LED1 30 LED2 27 PWR 35 VCC 15 VCC 26 10 TMS 9 TDI2 24 TDO2 11 TCK B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 36 40 32 29 28 33 8 38 42 1 41 34 C1 0.1 VLL VCC R17 33k R22 200 X1 FXO-HC73-160 1 4 EN VCC SW1 2 1 C31 0.1 J2 EX = 0 C D E F G H I J K L M N TP4 TP5 R24 200 R18 33k R23 200 37 B 44 D4 YLW VCC U2 XC9572XL_VQ44 A 4 GND 17 GND 25 GND SW3 R1 1k R26 200 1 SW2 C30 0.1 R25 200 R20 33k SW5 R19 33k SW4 C37 0.1 39 EXTRG 43 CLKIN 31 NC12 30 NC11 27 NC10 C38 0.1 J6 JTAG R3 1k D1 YLW R4 1k D1 RED R5 1k D3 GRN D7A D7B VDD LD CS SCK SDO SDI EN EN 21 EN 15 M0 13 M2 14 M1 12 M3 C12 0.1 TP1 VLL C24 0.1 R14 200 3 + R27 0 J7 + C33 10 16V U4 2 LM4040 1 (+3.3V) (+5.0V) VCC VGG VDD C32 10 16V VDD TP1 PWR R6 1k TP15 11 SDI TP10 18 SDO TP14 10 SCK TP18 19 CS TP16 20 LD 9 DGND TP6 TP12 TP7 TP9 TP8 C11 0.1 DAC C20 0.1 13 14 23 16 22 18 20 19 21 12 C10 0.1 VCC U V X Y Z EN M0 M2 M1 M3 C9 0.1 PH0 1 2 35 VCC 26 VCC 15 VCC 10 TMS 9 24 TDI1 TDO1 11 TCK 1 2 3 4 5 6 WAV FRE PAM AMPL ENA 1 2 1 2 3 5 6 7 1 2 6 3 R21 33k C35 0.1 1 2 4 C2 0.1 C13 27nF C3 0.1 C4 0.1 U1 MD2134K7 C14 27nF VDD D9 B1100-13 D8A C26 27nF C25 27nF R16 49.9k 41 VSUB 4 GND 2 GND 8 VLL VREF 22 RFB 23 6 1 17 AGND 1 2 3 4 5 VDD VDD VDD 16 5 26 7 GND 6 C3A GND 24 C2B 31 3 VDD TP17 TP11 PA 1 R8 1.0 1W 7 8 9 10 11 12 C16 0.1 M1B DN2625DK6 D5B C5 3.3nF VDD C36 1µ 100V (+70 to 100V) VPP C21 27nF C27 0.1 3 VCC C22 0.1 C28 3.3nF R15 1.0 1W 16 15 14 13 34 PB M1A 6 33 PB PB DN2625DK6 32 5 PB 3 D6A D6B 29 GND 27 GND 36 VSUB 35 VSUB 39 PA 38 PA PA 37 D5A C15 27nF C39 0.1 C1B 40 C2A C3B 25 1 1 2 4 KA C1A KB 28 4 6 3 1 1 6 3 3 30 2 Doc.# DSDB-MD2134DB1 A070114 4 J1 EXCLK R12 100 1W 1 R9 100 1W 3 2 5 4 1 C34 10 16V 2 OUT1 4 OUT2 7 6 10 OUTPUT 9 J4 + 2 4 R28 0 TP19 C19 220p 250V 1 3 OUT1 T1 EP10_EP13 TP13 U5 ADP3339AKC-2.5RL7 IN C23 0.1 (+3.3V) VGG D2 VPP R11 0 C18 1µ 100V D1 C17 0.1 (+3.3V) VGG 4 3 D8B (+2.5V) VLL R13 1k 1W R10 200 1 2 3 J5 XDCR-A MD2134DB1 Circuit Schematic Supertex inc. www.supertex.com MD2134DB1 PCB Layout MD2134DB1 Demoboard Actual Dimensions: 10.2cm x 7.6cm (4.00” x 3.00”) Doc.# DSDB-MD2134DB1 A070114 4 Supertex inc. www.supertex.com MD2134DB1 +2.5V +5.0V VLL C3A VDD M0 PAM Level Select M1 M2 M3 SDO SCK CS KA C1A +5.0V +3.3V A D1 PA M1 Level Translator DN2625 B Beamform Switch Matrix EN SDI C2A Data Latch & Control Logic GND +70 to 100V VPP SUB DAC (WE750340727-02) TP Leakage 2µH 1kΩ 220pF Test Load PB DN2625 M2 D2 LD +5.0V +3.3V DGND AGND VREF RFB C3B C2B KB C1B +VREF MD2134DB1 Input and Output Waveforms Figure 1: Output waveform of 16-sample/cycle fS = 160MHz, VPP = 75V, 220pF//1.0kΩ load. LV = (0, -12, -12, -45, -45, -12, -12, 0, 0, 14, 14, 45, 45, 14, 14, 0, . . .) 5 cycles Doc.# DSDB-MD2134DB1 A070114 5 Supertex inc. www.supertex.com MD2134DB1 Figure 2: Output waveform of 16-sample/cycle of 7.46MHz DAC = 255, VPP = 75V, 220pF//1.0kΩ load. 130 112 94 76 58 40 22 4 -14 -32 -50 0 10 20 30 40 Figure 3: Example of Gauss-Sine waveform for LV1~LV15 SPI register values and transmit sequence. The level-registers in MD2134 store 7 positive and 8 negative numbers and control the M[3:0] to transmit these levels. Use the sequence below and its reverse order. Including zeros, there are a total of 45 transmitted data samples. LV = (0, 0, 2, 2, 2, 0, 0, -6, -12, -20, -29, -38, -45, -48, -45, -32, -12, 14, 45, 76, 103, 121, 127, . . ) Doc.# DSDB-MD2134DB1 A070114 6 Supertex inc. www.supertex.com MD2134DB1 200 Voltage (V) 100 0 -100 -200 0 40 80 120 160 200 240 280 320 360 400 Time (ns) Figure 4: Output waveform and polarity reversed Gauss-Sine waveform at 16-sample/cycle of 7.46MHz DAC = 255, VPP = 75V, 220pF//1.0kΩ load. Figure 5: Gauss-Sine waveform at 16-sample/cycle of 7.46MHz DAC = 255, VPP = 75V, 220pF//1.0kΩ load. Doc.# DSDB-MD2134DB1 A070114 7 Supertex inc. www.supertex.com MD2134DB1 Figure 6: MD2134DB1 6.5MHz Gauss-Sine waveforms and frequency spectrum. Current Level Control Pin Description Input Control Pin Name M3 M2 M1 M0 PAM Current Level 0 0 0 0 LV0 PA & PB both off, zero current. 0 0 0 1 LV1 Select LV1 current magnitude to PA. 0 0 1 0 LV2 Select LV2 current magnitude to PA. 0 0 1 1 LV3 Select LV3 current magnitude to PA. 0 1 0 0 LV4 Select LV4 current magnitude to PA. 0 1 0 1 LV5 Select LV5 current magnitude to PA. 0 1 1 0 LV6 Select LV6 current magnitude to PA. 0 1 1 1 LV7 Select LV7 current magnitude to PA. 1 0 0 0 LV8 Select LV8 current magnitude to PB. 1 0 0 1 LV9 Select LV9 current magnitude to PB. 1 0 1 0 LV10 Select LV10 current magnitude to PB. 1 0 1 1 LV11 Select LV11 current magnitude to PB. Description 1 1 0 0 LV12 Select LV12 current magnitude to PB. 1 1 0 1 LV13 Select LV13 current magnitude to PB. 1 1 1 0 LV14 Select LV14 current magnitude to PB. 1 1 1 1 LV15 Select LV15 current magnitude to PB. Note: Turning on PA & PB simultaneously can cause over-current and permanent damage to the IC, high voltage MOSFETs, or to the transformer. Doc.# DSDB-MD2134DB1 A070114 8 Supertex inc. www.supertex.com MD2134DB1 Board Connector and Test Pin Description CPLD Pin # Signal Name Description U2, 3 - 15, 26, 35 VCC CPLD logic power supply +3.3V U2, 3 - 26 VLL CPLD, VCCIO and MD2134 logic power supply +2.5V U2, 3 - 4, 17, 25 GND Logic power ground 0V U2 - 2 WAV Run or stop demo waveform phase U2 - 3 FRE Selecting frequency: 8,10 and 13.3MHz U2 - 5 PHASE Single step phase change, angle stepping:0, 7.5, 15…360 U2 - 6 AMPL Single step amplitude change, DAC stepping: 15, 31…255 U2 - 7 ENA U2 - 18 M1 Output signal to MD2134 M1 U2 - 19 M0 Output signal to MD2134 M0 U2 - 20 M3 Output signal to MD2134 M3 U2 - 21 M2 Output signal to MD2134 M2 U3 - 31 LED1 Output signal yellow, PH0 LED is on when phase = 0 U3 - 30 LED2 Output signal yellow, DAC LED is on when DAC = 127 U3 - 27 PWR Output signal LED green, indicates +3.3V power supply on U2, 3 - 10 TMS Test mode select of JTAG U2, 3 - 9 TDI Test data in of JTAG, two CPLD in daisy chain U2, 3 - 24 TDO Test data out of JTAG, two CPLD in daisy chain U2, 3 - 11 TCK Test clock of JTAG U2, 3 - 43 CLK CPLD clock input U2, 3 - 39 EXTRG U2, 3 - 12 EN Output signal LED red, indicates MD2134 is enabled U3 - 22 SDI Output signal to MD2134 SDI U3 - 16 SDO Input signal from MD2134 SDO U3 - 23 SCK Output signal to MD2134 SCK U3 - 14 CS Output signal to MD2134 CS U3 - 13 LD Output signal to MD2134 LD All remaining pins Doc.# DSDB-MD2134DB1 A070114 Control MD2134 EN pin External trigger signal input to control waveform timing NC or Reserved 9 Supertex inc. www.supertex.com MD2134DB1 JTAG Connector Pin # Signal Name J6-1 TMS Test Mode Select of CPLD. J6-2 TDI Test Data In of CPLD. J6-3 TDO Test Data Out of CPLD. J6-4 TCK Test Clock of CPLD. J6-5 GND Logic power supply ground 0V for programming only. J6-6 VCC Logic power supply +3.3V for programming only. Signal and Jumper Pin # Signal Name Description J1 EXCLK External clock input when on-board oscillator is disabled, or output of the clock when it is enabled. J2 OSC_EN J3 EXTRG External trigger signal input. J4 Load JP Jumper for on-board RC load to MD2134DB1 high voltage output and XDCR connector. J5 XDCR Description Jumper for on-board oscillator, short = disabled, open = enabled. MD2134DB1 waveform output, for SMA-cable to oscilloscope, high voltage! 0 to +/-350VP-P max. Power Supply Connector J7-1 VCC +3.3V, MOSFET gate biasing and CPLD supply voltage with current limit from 120 to 150mA. J7-2 GND Ground reference, 0V. J7-3 VDD +5.0V MD2134 positive supply voltages with current limit to 50mA J7-4 GND Ground reference, 0V. J7-5 VPP +70 to100V, the high voltage supply with current limit to 30mA. Voltage Supply Power-Up Sequence Step Signal Name Description 1 VDD +5.0, MD2134 positive supply voltages 2 VCC +3.3V, MOSFET gate biasing and CPLD control logic supply voltage 3 VPP +70V to 100V, the high voltage supply 4 EN Logic Active Enable logic control, active-high signal to MD2134 Voltage Supply Power-Down Sequence 1 EN Logic Active 2 VPP +70V to 100V, the high voltage supply, off 3 VDD +5.0V, MD2134 positive supply voltages with all input signals LOW, off 4 VCC +3.3, CPLD control logic supply voltage with EN = 0, off Doc.# DSDB-MD2134DB1 A070114 Disable logic control, active-high signal to MD2134 10 Supertex inc. www.supertex.com MD2134DB1 MD2134DB1 Bill of Materials Reference Description Manufacturer’s Part Number Manufacturer C1 - C12, C16, C17, C20, C22 - C24, C27, C29 - C31, C35, C37 - C39 CAP .1µF 25V CERAMIC X7R 0603 ECJ-1VB1E104K Panasonic C5, C28 CAP CER 3300PF 10% 100V X7R 0603 06031C332KAT2A AVX C13, C14, C15, C21, C25, C26 CAP .027µF 50V CERAMIC X7R 0603 ECJ-1VB1H273K Panasonic C18,C36 CAP CER 1µF 100V X7R 20% 1210 C3225X7R2A105M TDK C19 CAP CERAMIC 220PF 200V NP0 0805 ECJ-2YC2D221J Panasonic C32, C33, C34 CAP 10µF 16V ELECT WT SMD UWT1C100MCL1GB Nichicon D1, D4 LED THIN 585NM YEL DIFF 0805 SMD SML-LXT0805YW-TR Lumex D2 LED THIN 635NM RED DIFF 0805 SMD SML-LXT0805IW-TR Lumex D3 LED THIN 565NM GRN DIFF 0805 SMD SML-LXT0805GW-TR Lumex D9 Diode Schottky, 100V, 1.0A, SMA B1100-13 Diodes Inc. D5 - D8 Diode Schottky, dual, 30V, SOT-363 BAT54DW-7 Diodes Inc. M1 250V 3.0A dual depletion N-MOSFET, 5x5mm, DFN-8 DN2625DK6-G Supertex Inc. R1 RES 1.00kΩ 1/16W 1% 0603 SMD ERJ-3EKF1001V Panasonic R2, R7 RES 49.9Ω 1/16W 1% 0603 SMD ERJ-3EKF49R9V Panasonic R3 - R6, R10, R14, R22 - R26 RES 200Ω 1/16W 1% 0603 SMD ERJ-3EKF2000V Panasonic R8,R15 RES 1.0Ω 1W 1% 2512 SMD ERJ-1TRQF1R0U Panasonic R9,R12 RES 100Ω 1W 1% 2512 SMD ERJ-1TNF1000U Panasonic R11,R27 PCB copper short NA NA R13 RES 1kΩ 1W 1% 2512 SMD ERJ-1TYF102U Panasonic R16 RES 49.9kΩ 1/16W 1% 0603 SMD ERJ-3EKF4992V Panasonic R17, R18, R19, R20, R21 RES 33.2kΩ 1/16W 1% 0603 SMD ERJ-3EKF3322V Panasonic R28 PCB copper short NA NA T1 22µH, 1:1:1 wideband ultrasound pulse transformer 750340727 Würth Electronics U1 IC ultrasound beamforming source driver 40-Lead QFN MD2134K7-G Supertex Inc. U2, U3 IC CPLD, 72 MCELL, C-Temp, 44-VQFP XC9572XL-5VQ44C Xilinx U4 IC precision reference micropower ref, SOT-23 LM4040DEM3-2.5 National U5 IC voltage regulator, 1.5A, 2.5V, SOT-223 ADP3339AKC-2.5 ADI X1 Oscillator clock, 160.000MHz, 3.3V, SMD JITO-2-DC3AE-160 FOX Electronics Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2014 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSDB-MD2134DB1 A070114 11 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com