Supertex inc. HV7350DB1 Eight Channel ±60V, ±1.0A, Ultrasound Pulser Demoboard General Description This demoboard datasheet describes how to use the HV7350DB1 to generate the basic high voltage pulse waveform as an ultrasound transmitting pulser. The HV7350 is a monolithic eight channel, high-speed, high voltage, ultrasound transmitter RTZ pulser. This integrated, high performance circuit is in a single, 8x8x0.9 mm, 56-lead QFN package. The HV7350 can deliver a guaranteed ±1.0A source and sink current to a capacitive transducer with +/-60V peak to peak voltage. It is designed for portable medical ultrasound imaging and ultrasound NDT applications. It can also be used as a high voltage driver for other piezoelectric or capacitive MEMS transducers, or for test systems as a signal source or pulse signal generators. The HV7350 circuit uses DC coupling from a 3.3V logic input to output Tx1~8 internally, therefore the chip needs three sets of voltage supply rails: VLL +3.3V, VDD +5.0V and VPP/VNN ±10 to ±60V. The VPP and VNN rail voltages can be changed rather quickly, compared to the capacitor gatecoupled driving pulsers. This direct coupling topology of the gate drivers not only saves two high voltage capacitors per channel, but also makes the PCB layout easier. The HV7350’s circuitry consists of controller logic circuits, level translators, gate driving buffers and a high current and high voltage MOSFET output stage. The output stages of each channel are designed to provide peak output currents typically over ±1.0A for pulsing, with up to ±60V swings in RTZ mode. The upper limit frequency of the pulser waveform is depending on the load capacitance. The HV7350DB1 output waveforms can be displayed using an oscilloscope by connecting the scope probe directly to the test points TX1~8 and GND. The soldering jumper can select whether or not to connect the on-board dummy-load, a 330pF capacitor paralleling with a 2.5kΩ resistor. The test points can be used to connect the user’s transducer to easily evaluate the pulser. Block Diagram +3.3V +3.3V +3.3V CLKIN EN Waveform Generator CPLD 6 NIN1 Logic & Level Translator PWR PHAS OEN OEN REN REN Doc.# DSDB-HV7350DB1 A070214 +5.0V VNF TX1 -5V GND GND SUB DAP GND LRN CNEG TX1 R2 -5.0V Dummy Load Rb N-Driver RTZ FREQ RGND DMP CLK PHAS GND HVOUT1 VPF NIN8 WAVE 1 of 8 Channels P-Driver PIN8 JTAG VPF 1.0µF VPP LRP GND PIN1 40MHz CPF LRP +4.0V +5.0V OEN 1.0µF CPOS VREF REN OSC 1.0µF VDD VLL EXCLK +10 to +60V 1.0µF 0.1µF C4 330pF VNF GND LRN CNF 1.0µF VNN RGND RGND R3 2.5k RGND 1.0µF 1.0µF -10 to -60V Supertex inc. www.supertex.com HV7350DB1 The PCB Layout Techniques Be aware of the parasitic coupling from the outputs to the input signal terminals of the HV7350. This feedback may cause oscillations or spurious waveform shapes on the edges of the signal transitions. Since the input operates with signals down to 3.3V, even small coupling voltages may cause problems. Use of a solid ground plane and good power and signal layout practices will prevent this problem. Also ensure that the circulating ground return current from a capacitive load cannot react with common inductance to create noise voltages in the input logic circuitry. The large thermal pad at the bottom of the HV7350 package is internally connected to the IC’s substrate (VSUB). This thermal pad should be connected to 0V or GND externally on the PCB. Designers need to pay attention to the connecting traces on the outputs TX1~8, specifically the high voltage and high speed traces. In particular, controlled impedance to the ground plane and more trace spacing needs to be applied in this situation. High speed PCB trace design practices that are compatible with about 50 to 100MHz operating speeds are used for the demoboard PCB layout. The internal circuitry of the HV7350 can operate at quite a high frequency, with the primary speed limitation being load capacitance. Because of this high speed and the high transient currents that result when driving capacitive loads, the supply voltage bypass capacitors and the driver to the FET’s gate-coupling capacitors should be as close to the pins as possible. The GND pin should have low inductance feed-through via connections that are connected directly to a solid ground plane. The VDD, VPP, VNN, CPF, CNF, CNEG and CPOS voltage supply and/or bypass capacitor pins can draw fast transient currents of up to ±2.0A, so they should be provided with a low impedance bypass capacitor at the chip’s pins. A ceramic capacitor of 1.0 to 2.0µF may be used. Only the VPP and VNN pins to GND capacitors need to be the high-voltage type. The CPF to VPP and CNF to VNN capacitors maybe low voltage. Minimize the trace length to the ground plane, and insert a ferrite bead in the power supply lead to the capacitor to prevent resonance in the power supply lines. For applications that are sensitive to jitter and noise and using multiple HV7350 ICs, insert another ferrite bead between each chip’s supply lines. Testing the Integrated Pulser The HV7350 pulser demoboard should be powered up with multiple lab DC power supplies with current limiting functions. The on-board dummy load 330pF//2.5kΩ should be connected to the high voltage pulser output through the solder jumper when using an oscilloscope’s high impedance probe to meet the typical loading condition. To evaluate different loading conditions, one may change the values of RC within the current and power limit of the device. In order to drive the user’s piezo transducers with a cable, one should match the output load impendence properly to avoid cable and transducer reflections. A 70 to 75Ω coaxial cable is recommended. The coaxial cable end should be soldered to the TX1~8 and GND directly with very short leads. If a user’s load is being used, the on-board dummy load should be disconnected by cutting the small shorting copper trace in between the 0Ω resistors R2, R9, R12, R18, R23, R53, R54 or R55 pads. They are shorted by factory default. All the on-board test points are designed to work with the high impedance probe of the oscilloscope. Some probes may have limited input voltage. When using the probe on these high voltage test-points, make sure that VPP/VNN voltages do not exceed the probe limit. Using the high impendence oscilloscope probe for the on-board test points, it is important to have short ground leads to the circuit board ground plane. Pay particular attention to minimizing trace lengths and using sufficient trace width to reduce inductance. Surface mount components are highly recommended. Since the output impedance of the HV7350’s high voltage power stages is very low, in some cases it may be desirable to add a small value resistor in series with the output TX1~8 to obtain better waveform integrity at the load terminals after long cables. This will, of course, reduce the output voltage slew rate at the terminals of a capacitive load. Doc.# DSDB-HV7350DB1 A070214 If both of the inputs PIN and NIN are high, then the channel out TX will be in Hi-Z. 2 Supertex inc. www.supertex.com 2 C30 0.22 R25 33k C31 0.22 SW1 2 TP18 C32 0.22 SW2 MH2 R40 200 R26 33k R20 1k EXTRG SYNC CLK C33 0.22 SW3 R27 33k 39 40 43 MH3 R41 200 TP30 R16 1k SYNC 3 EXTRG R15 50 R14 1.0k 3 1 OUT GND TP12 MH4 R42 200 VCC R8 1.0k R7 1.0k TP10 R6 1.0k U2 XC9572XL_VQ44 R43 200 MH1 C34 0.22 SW4 R28 33k C35 0.22 SW5 R29 33k R44 200 Note: J4-4, 5, 6 & 7- pins for test only VCC J2 EXCLK J1 EX=0 40MHz X1 4 2 1 EN VCC 1 TP13 C18 0.22 VCC R5 1.0k R4 1.0k RED D7 VCC R30 1 VDD J3 JTAG C22 0.22 41 42 8 12 13 14 16 18 19 20 21 22 33 34 37 38 C2 022 R38 INF R37 INF J4 HEADER 10 TP9 VNN R32 10 CPF TP6 R57 INF CNEG CPOS CNF TP51 TP50 TP49 TP48 TP47 TP46 TP45 TP44 TP29 TP28 TP27 TP25 TP22 TP19 TP20 TP16 C3 022 R31 1 VDD NIN8 PIN8 NIN7 PIN7 NIN6 PIN6 NIN5 PIN5 NIN4 PIN4 NIN3 PIN3 NIN2 PIN2 NIN1 PIN1 C1 022 REN OEN C25 022 NIN8 PIN8 NIN7 PIN7 NIN6 PIN6 NIN5 PIN5 NIN4 PIN4 NIN3 PIN3 NIN2 PIN2 NIN1 PIN1 OEN REN PAD R35 10 VPP 16 15 14 13 12 11 10 9 6 5 4 3 2 1 56 55 7 8 C19 022 VCC TP2 17 GRN VLL D6 C12 1µF C13 1µF VDD U3 HV7350 TP33 TP36 C37 1µF TP35 TP8 VCC = +3.3V VDD = +4.0 to 5.2V VPP / VNN = +/-5.0 to 70V C36 1µF TP43 19 VDD YLW RTZ 4 GND 17 GND 25 GND 48 CPF D5 REN 32 WAV 2 FRE 3 SEL 5 ENA 6 MOD 7 23 C5 1µ C24 1µF CPF YLW PHAS LE 31 SET 30 MC OEN PWR 29 CS 28 EN 35 VCC 26 VCC 15 VCC TMS 10 TDI 9 TDO 24 TCK 11 1 2 3 4 5 6 C8 1µ TP6 20 D4 1 2 3 4 5 6 7 8 9 10 54 VLL PAD 72 GND 18 GND 53 CPOS 36 CNEG 35 52 VDD CNF 47 CNF 24 21 VPP VNN C23 1µF 25 C9 1µ 22 VPP VNN 26 C6 1µ 49 VPP VNN 1 6 VDD VNN 27 50 VPP VNN 44 VPP 51 28 30. 32 34 37 39 41 43 4 3 VCC C27 1µF 100v 1 2 1 2 VNN C29 330P 250V C20 330P 250V BAV99/SOT_1 2 D30 3 1 BAV99/SOT_1 2 D29 3 1 C40 330P 250V C38 330P 250V BAV99/SOT_1 2 D28 3 1 BAV99/SOT_1 2 D27 3 1 BAV99/SOT_1 2 D26 3 1 BAV99/SOT_1 2 D25 3 1 BAV99/SOT_1 2 D24 3 1 BAV99/SOT_1 2 D31 3 1 VPP C28 1µF 100v TP17 RGND 40 RGND 42 RGND 33 RGND 38 RGND 31 RGND 29 TX8 TX7 TX6 TX5 TX4 TX3 TX2 TX1 VPP VNN 45 VPP VNN 46 D20A BAT54DW-7 RED D20B BAT54DW-7 3 D17 B1100-13 Doc.# DSDB-HV7350DB1 A070214 D16 B1100-13 D3 R24 2.55k 1W TP0 TP40 R56 2.55k 1W TP26 R55 0 R52 2.55k 1W TP41 TX8 R53 0 TX6 TP21 R23 0 TX4 C21 330P 250V C4 330P 250V C39 330P 250V C14 330P 250V R13 2.55k 1W TP14 TP32 R12 0 TX2 TP11 TP1 TP23 TP4 R3 2.55k 1W R51 2.55k 1W TP39 R54 0 TP0 TP7 R10 2.55k 1W TX7 R9 0 TX5 TP42 TP31 R19 2.55k 1W R18 0 TX3 R2 0 TX1 HV7350DB1 HV7350DB1 Schematic Supertex inc. www.supertex.com HV7350DB1 HV7350DB1 PCB and Board Layout Actual Board Size: 72.4mm x 68.4mm Power Connector Description 1 +VCC +3.3V Logic voltage input for VLL and CPLD. (100mA) 2 GND 0V, Ground 3 +VDD +5.0V HV7350 positive VDD supply. (25mA) 4 CNEG -5.0V HV7350 negative VNEG supply, only when REN=0 5 CPOS +5.0V HV7350 Positive VPOS supply, only when REN=0 6 CNF HV7350 VNF supply reference to VNN, ( VNF - VNN) = +5.0V, only when REN=0 7 CPF HV7350 VPF supply reference to VPP, ( VPP - VPF) = +5.0V, only when REN=0 8 -VNN -10 to -60V negative high voltage supply. (-5.0mA) 9 GND 0V, Ground 10 +VPP +10 to +60V positive high voltage supply. (+5.0mA) Note: J4-4 to 7 are for external power connection of VNEG, VPOS, VNF, VPF, when REN = 0. Note, as default the resistors R34, R37, R38 and R57 is not installed. Do not need to connect these four pins to any power supply when internal regulators are be used when REN=1. Voltage Supply Power-Up and Operation Sequence 1 +VCC Power on +3.3V positive logic supply voltage for HV7350’s VLL and CPLD VCC 2 +VDD Power on +5.0V VDD positive supply 3 OEN & REN 4 +VPP / -VNN 5 OEN & REN Turn on OEN & REN LED on 6 WAVE Button Push WAVE button to select waveforms Turn both OEN & REN LED off Power on VPP/VNN = ±10 to 60V positive and negative high voltage supply Note: Power-down in the 6,5… to 1 reversing order. Push Button Operations WAV Toggle select pulse B-mode waveforms: None, 1-cycle, 1-cycle inverting, 3-cycle & 3-cycle inverting FREQ Toggle select B-mode demo frequency of 10, 5, 2.5, 1.25 & 0.625MHz when X1 oscillator is 40MHz PHAS Toggle select B-mode waveform phase polarity OEN Toggle on or off HV7350 chip output signal OEN REN Toggle select on or off HV7350 internal voltage-regulators signal REN Doc.# DSDB-HV7350DB1 A070214 4 Supertex inc. www.supertex.com HV7350DB1 LED Indicator RTZ RTZ indication, default is on PHAS Phase polarity indication PWR HV7350DB1 VLL 3.3V and CPLD chip VCC power supply indication OEN HV7350 chip enable EN signal indication, power on default is off until OEN button is pushed REN HV7350 built-in regulators enable indication, power on default is off until REN button is pushed Typical Waveforms Figure 1. VPP/VNN = +/-60V 5MHz with 330pF//2.5kΩ load and 8-Channel pulsing Figure 2. VPP/VNN = +/-60V 5MHz with 330pF//2.5kΩ load and 8-Channel pulsing Doc.# DSDB-HV7350DB1 A070214 5 Supertex inc. www.supertex.com HV7350DB1 Typical Waveforms (cont.) Figure 3. VPP/VNN = +/-60V 10MHz with 330pF//2.5kΩ load and 8-Channel pulsing Figure. 4. Rise and Fall time at VPP/VNN = +/-60V with 330pF//2.5kΩ load Doc.# DSDB-HV7350DB1 A070214 6 Supertex inc. www.supertex.com HV7350DB1 Typical Waveforms (cont.) Figure 5. VPP/VNN = +/-60V 5MHz with 330pF//2.5kΩ load and 8-Channel pulsing Figure 6. Damping fall time at VPP/VNN = +/-60V with 330pF//2.5kΩ load Doc.# DSDB-HV7350DB1 A070214 7 Supertex inc. www.supertex.com HV7350DB1 Typical Waveforms (cont.) Figure 7. Damping rise time at VPP/VNN = +/-60V with 330pF//2.5kΩ load Figure 8. VPP/VNN = +/-60V 5MHz with 330pF//2.5kΩ load 4 of the 8-Channel waveforms shown Doc.# DSDB-HV7350DB1 A070214 8 Supertex inc. www.supertex.com HV7350DB1 Typical Waveforms (cont.) Figure 9. HD2 at VPP/VNN = +/-50V 2.5MHz with 330pF//2.5kΩ load Doc.# DSDB-HV7350DB1 A070214 9 Supertex inc. www.supertex.com HV7350DB1 Bill of Materials Component Description Manufacturer Part Number C1 - C3, C18, C19, C22, C25, C30 - C35 CAP CER .22µF 16V X7R 10% 0603 TDK C1608X7R1C224K C4, C14, C20, C21, C29, C38 - C40 CAP CERC 330PF 200V X7R 0603 Panasonic ECJ-1VB2D331K C5, C8, C12, C13, C23, C24, C36, C37 CAP CER 1.0µF 16V X7R 0603 TDK C1608X7R1C105M C6, C9, C27, C28 CAP CER 1µF 100V X7R 20% 1210 TDK C3225X7R2A105M D3, D7 LED THIN 635NM RED DIFF 0805 SMD Lumex SML-LXT0805IW-TR D4, D5 LED THIN 585NM YEL DIFF 0805 SMD Lumex SML-LXT0805YW-TR D6 LED THIN 565NM GRN DIFF 0805 SMD Lumex SML-LXT0805GW-TR D16, D17 DIODE SCHOTTKY 100V 1A SMA Diodes Inc. B1100-13 D20 DIODE SCHOTTKY DUAL 30V SOT-363 Diodes Inc. BAT54DW-7 D24 - D31 DIODE SWITCH SS DUAL 70V SOT323 Fairchild BAV99WT1G J1 CONN HEADER 2POS .100 VERT GOLD Molex 22-28-4023 J2 CONN JACK END LAUNCH PCB GOLD SMA Johnson 142-0711-821 J3 CONN HEADER 6POS .100 VERT GOLD Molex 22-28-4063 J4 CONN HEADER 10POS .100 VERT GOLD Tyco 1-640454-0 R2, R9, R12, R18, R23, R53 - R55 Solder Gap (SHORT) NA NA R3, R10, R13, R19, R24, R51, R52, R56 RES 2.55kΩ 1W 1% 2512 SMD Panasonic ERJ-1TNF2551U R4 - R8, R14, R16, R20 RES 1.00kΩ 1/16W 1% 0603 SMD Panasonic ERJ-3EKF1001V R15 RES 49.9Ω 1/16W 1% 0603 SMD Panasonic ERJ-3EKF49R9V R25, R26, R27, R28, R29 RES 33.2kΩ 1/16W 1% 0603 SMD Panasonic ERJ-3EKF3322V R30, R31 RES 1.00Ω 1/10W 1% 0603 SMD Rohm MCR03EZPFL1R00 R32, R35 RES 10.0Ω 1/10W 1% 0603 SMD Panasonic ERJ-3EKF10R0V R34, R37, R38, R57 NA NA NA R40, R41, R42, R43, R44 RES 200 OHM 1/16W 1% 0603 SMD Panasonic ERJ-3EKF2000V SW1, SW2, SW3, SW4, SW5 SWITCH LT 4.7MMX3.5MM 100GF SMD Panasonic EVQ-P2002M TP3, TP15 TEST POINT PC MULTI PURPOSE BLK Keystone 5011 U2 IC CPLD 72 MCELL C-TEMP 44-VQFP Xilinx XC9572XL-5VQ44C U3 IC HV7350K6-G 8-ch RTZ Supertex Inc. HV7350K6-G X1 OSC CLOCK 40.000 MHZ 3.3V SMD CTS CB3LV-3C-40.0000-T Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2014 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSDB-HV7350DB1 A070214 10 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com