EVB-USB4624BCUH-01 Evaluation Board Schematic - PDF

5
4
3
Evaluation Board for USB4624 with Battery Charging
1
Revision History
Revision Date
A platform that supports:
D
2
USB4624 in the QFN48 package
Battery Charging on two USB 2.0 ports w/ Charger Current LED display
USB 2.0 HSIC on two ports
Self-power from 12 VDC (Molex PC, or barrel)
SMBus interface
SPI programming and configuration
UART bridge interface
Optional 9V Auxilliary Power Out
Revision Summary
Author
A
20121114 Released
C. Johnson
A1
20130612 Replaced 180uF caps on downstream VBUS with 150uF caps.
J. Hancock
A2
20150924 Replaced Maxim PPCs with Micrel part number. The new part caused the ILIM
resistor to change as well.
J. Hancock
D
C
C
B
B
A
A
Microchip Technology, Inc.
USB/Networking Group - UNG
www.Microchip.com
Description:
Evaluation Board -- USB4624 Bat. Chg. x2, HSIC x2, Uart
Page
Content: Title Sheet
Project
PN:
Cestus48
EVB-USB4624BCUH-01
Name:
Size:
Date: Friday, September 25, 2015
Sheet 1 of 4
Rev.:
B
5
4
3
2
1
A2
5
4
3
2
1
Functional Block Diagram
Connected Function Examples
Ext. 12V supply (4A)
PICtail Plus connector for iPodR PICtail Plus Board
EVB-USB4624BCUH-01
9V
9V Regulator (1A)
UART
USB4624
(QFN48)
Up
Stream
Prog &
Debug
Enable
Detect
Data
Data
Strobe
Strobe
USB 2.0
HS/FS/LS
HSIC
Strobe
HSIC
Detect
Data
E-Net
10/100
USB
2.0
(FS)
LAN9730 DC
Enable
Detect
Data
Data
Strobe
Strobe
SD
I/F
USB4640 DC
Headphone
OUT
PIC32
MX795F
512L
-80I/PT
MIC
on-bd
Microchip
Audio
Development
Board
220 x 176 TFT
Color Display
DB-9
Serial Port
USB
2.0
Port 0
C
HSIC
1V2
VDD12
Regulator
PC Std.
Header
HSIC
3V3
VDD33
Regulator
DB-9
Serial Port
5V System
Regulator
D
Line
IN
Power
5V USB Regulator (6A)
HSIC
D
C
SMBus I/F
Header
B
B
5V
SPI
Flash
SPI I/F
GPIO
LED
Indicators
Port Power
Control
PCtl3
PCtl4
OCS3#
OCS4#
UART Activity
HSIC 1 Activity
HSIC 2 Activity
USB 2.0
HS/FS/LS
USB
2.0
Port 3
Current Monitor
Up to 3A
Walk-up
Port1
Port2
DC Ammeter
88.88
DC Ammeter
88.88
Down
Stream
A
USB 2.0
HS/FS/LS
USB
2.0
Port 4
A
Microchip Technology, Inc.
USB/Networking Group - UNG
www.Microchip.com
Description:
Up to 3A
Walk-up
Evaluation Board -- USB4624 Bat. Chg. x2, HSIC x2, Uart
Page
Content: Block Diagram
Project
PN:
Cestus48
EVB-USB4624BCUH-01
Name:
Size:
Date: Thursday, September 24, 2015
Sheet 2 of 4
Rev.:
B
5
4
3
2
1
A2
STRB
J29
DATA_R
R32
ZERO
3
38
H0
1
U.FL
39
42
STRB
DATA
J27
DATA
1
1
2
nc
5
VSS
3
R5
100K
MR
C50
6pF
2
5
Ext_Rst
35
RBIAS
46
12.0K
1%
TC1270A_SOT23-5
J4
RESET#
3V3
RBIAS
(tp)
44
XTAL1
Clock
1V2
C37
0.1uF
HSIC_EN1
<1>
1
DAT2
STR2
RESET
2
(Swap)
nc0/VDD12P0
(USB/HSIC)
Common
J13
5
6
DATA2
STROBE2
2
3
2
3
U.FL
J14
1
U.FL
J15
7
XTAL1/REFCLK
<3>
DM3
DP3
R6
330
C7
0.1uF
1
2
3
150uF 4
PWR3
C3
3
31
33
SM_DAT
SM_CLK
B
VCC
SCK
SI
SO
CS*
C63
0.1uF
4
WP*
HOLD*
GND
6
5
2
1
WP#
HOLD#
-Vbat V*1-2
3V3 1
2
3
5V
C27
J11
4.7uF
R36
J16
5
3V3
4
27
26
24
25
3
74LVC1G14
-CRreg V*open
3V3
1
-1V2 Dest*1-2 & 3-4
VDD33
PIO19/UART_RX/OCS3
PIO20/UART_TX/OCS4
0.1uF
48
12
37
C32
4.7uF
(@ pin 48)
18
32
V_CR_REG
47
2
1V2
4.7uF 0.1uF
DNP
C36
C40
C46
C60
C59
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
C8
0.1uF
C6
R16
15
19
21
29
HSIC_EN1
HSIC_EN2
PCTL3
PCTL4
R11
1%
4
76.8
5
7
C21
<1>
<2>
2
2
28
30
UART_RX
UART_TX
VBAT
[4.7 uF]
VDDA33/BYP
VDDA33
VDDA33
VDD33
VDD33
3.3V IO
3.3V Log.
PIO
R46
SUSP/PIO0
SOF/PIO1
PIO3
PIO8
PIO10
PIO17
PIO18
(*Fill the GND FLAG with
a field of GND vias!) GND(FLAG)
[1.0 uF]
VDDCR12/BYP
2
2
SUSP/PIO0
SOF/PIO1
PIO3
PIO8
PIO10
PIO17
PIO18
2
2
2
0.1uF
1.0uF
J22
J20
J23
J25
1
1
1.2V Core
1.2V HSIC
nc3
R19
1K
R2
2.2K
2
FLG
IN
IN
3
GND
1
v+
cs
gnd
U5
RS+
RS-
0.020
C17
1%
4.7uF
ZERO
Rout
0.1uF
C
2
CUR_MTR4
R14
10K
6 3
C12
0.001uF
<4>
PWR4
5V
C2
D2
C14
1.0uF 0.1uF
Dec_Sel
J7 DNP
1
2
3
4
5
6
0.1uF
C11
J10
(5v)
(disp_en)
(5v_rtn)
DP3_4 (dp3#)
DP2_4 (dp2#)
DP1_4 (dp1#)
1
2
3
4
5
6
J3
12
11
10
9
8
7
(in-)
(in+)
(an_com)
(disp_test)
(ref_out)
(ref_in)
B
1.8.8.8
Mtr2
+/-20V Blue LED
JUMPER JMP2
(*3-4)
DMS-20PC-2-Bx-C
1
U18
74LVC1G14
4
R39
U15 MAX232E_SO16
C1+
C53
1K
VCC
VS+
VS-
1.0uF
3
4
D9
Br_Yel_RA
"Transmit"
C61
C1C2+
GND
5
UART_Act/PIO10
UART_RX_R
UART_TX
9
10
11
12
C2CMOS
ROUT2
DIN2
DIN1
ROUT1
5V
16
2
6
C66
RS/TIA-232
1.0uF
PIO8
Br_Yel_RA
45
PWR4R
ILIM
3V3
1.0uF
15
C48
C52
1.0uF
1.0uF
Motherboard
Serial Header
J37
RS-232
RIN2
DOUT2
DOUT1
RIN1
8
7
14
13
RX
TX
3V3
A
Microchip Technology, Inc.
USB/Networking Group - UNG
www.Microchip.com
U8
2
2
74LVC1G14
4
6
8
OUT
OUT
PIO3
1
(in-)
(in+)
(an_com)
(disp_test)
(ref_out)
(ref_in)
1
3V3
SUSP/PIO0
SOF(8KHz)/PIO1
1
Rsense
R10
MIC2549A-1
EN
"Susp"
D6
4
C49
J24
49
VDDCRREG
2
4
C47
UART
2
14
13
22
23
34
16
20
C20
3V3
1
J26 PIO17 (HSIC Act. P1)
1
J28 PIO18 (HSIC Act. P2)
(tp)
Reg.
OCS4
C18
0.1uF
1.0uF
4
74LVC1G14
3
R44
1K
U16
ALL LED drive resistors set for High brightness levels!
5
U6
1
PCTL4
100
(ISet=3A)
Power
Reg.
17
1
3
330
SPI_CLK/PIO4
SPI_DO/SPI_SPD_SEL/PIO5
SPI_DI(pull up)/PIO9
SPI_CE
C33
3
J18
R7
12
11
10
9
8
7
1.8.8.8
Mtr1
+/-20V Blue LED
MAX9934F_uSOP8
8
(tp)
1
J19
DM4
DP4
J2
3V3
USB-A Jack
5
VCC SR1 6
DSL1 7
D+
SR2 8
GND
SL2
1
2
3
150uF 4
PWR4
VBAT
VDD12
A
C39
SPI / I2C
PIO41/HSIC_EN1
PIO42/HSIC_EN2
PIO43/PRTPWR3/PRTCTL3
PIO44/PRTPWR4/PRTCTL4
VDD33
U19
<4>
OCS/UART
2
1K
C38
SDA/SM_DAT/PIO45
SCL/SM_CLK/PIO2
Port Power/Connect Control
-Vdd33 V*short
1
3V3 2
1K
V_CR_REG
SMBUS
10
11
J9
1
2
3
4
5
6
(5v)
(disp_en)
(5v_rtn)
DP3_3 (dp3#)
DP2_3 (dp2#)
DP1_3 (dp1#)
[1A across Rsense --> 1V across Rout]
5V_USB
SPI_SCK
SPI_MOSI
SPI_MISO
SPI_CE#
3
7
SPI Disable
J33
1
2
D10
Blue-RA
"SPI_CE#"
USB_DM4
USB_DP4
10K
10K
10K
SPI_FLASH-25X20_SO8
R38
XTAL2
R12
10K
U17
8
USB-A Jack
5
SR1 6
SL1 7
SR2 8
SL2
5
SPI
1
2
3
4
5
1.0uF 0.1uF
Dec_Sel
J5 DNP
1
2
3
4
5
6
0.1uF
C9
DMS-20PC-2-Bx-C
Port 4
43
C13
5
R35
R40
R34
3V3
R3
10K
XTAL2
C1
D1
7
+
(gnd)
(smdat)
(smclk)
(gnd)
(reset#)
S-Port -Program-
3
D3
Red-RA
"Reset"
1.0uF
VCC
DD+
GND
5
J1
74LVC1G14
C51
6pF
GND
5V
Port 3
3
1K
2
3
C4
0.1uF
J8
4
IN
IN
4.7uF
D
PWR3
JUMPER JMP1
(*3-4)
U1
R4
150uF
DNP
FLG
1V2
Y1
24MHz
3V3
C16 + C5
2
<2>
J6
USB_DM3
USB_DP3
5
7
R1
2.2K
ILIM
2x5RA
(placement critical)
C34
0.1uF
8
9
5V_USB
D12
Description:
SHUNT2
SW1
3
4
R25
1
C
3.08 Vtrip
4
VDD RST
1
VDD12P1
VDD12P2
U2
2
FLEX_HSIC_STR
FLEX_HSIC_DAT
J30
1
2
1V2
(Short to use HSIC host)
Port0 SMA Connector Option
3V3
FLEX_USB_DM0
FLEX_USB_DP0
C54
0.1uF
SMA
EDGE
-RESET-
Up Stream (Flex)
U.FL
4
76.8
(ISet=3A)
HSIC_Support
J32
1
2
1V2
3
4
3V3
5
6
5V
7
8
12V_IN
9
10
HSIC_EN2
<3>
Rout
ZERO
1
U.FL
2
3
1
40
41
1
R9
2
3
2
3
U.FL
J12
0.001uF
2
4
6
8
10
R33
2
3
SMA
EDGE
J38
3V3
Slide-Top
Br_Yel_RA
STRB_R
5
STR1
DAT1
STROBE1
DATA1
C10
1
3
5
7
9
1K
VBUS_DET/PIO16
3
4
0.020
C15
1%
"Pwr-Port 4"
R28
1
USB4624_QFN48
PWR3R
Br_Grn-RA
Br_Grn-RA
U11
36
VB_DET
6
8
OUT
OUT
2
SHUNT7
2.2K
2
1%
Rsense
R8
CUR_MTR3
R13
10K
6 3
3V3
MIC2549A-1
EN
3
1
R41
D8
"Manual"
J40
1
3
4
6
VDET_MAN
D11
"External"
2
3
4
5
2
3
4
5
100K
1
PCTL3
Down Stream
R22
3V3
VB_DET Sel.
External/Manual
SW2
OCS3
Blue-RA
U4
for HSIC:
PU DM & DP
D
1K
100
2
v+
74LVC1G14
R15
RS+
RS-
0.1uF
1
U3
cs
gnd
2.2uF
"VBUS"
D4
R18
4
"Pwr-Port 3"
2
VB_DET
Br_Grn-RA
J21
R42
100K
7
SHUNT6
100K
*Note:
All USB differential pairs must have Zdiff = 90 Ohms.
All HSIC lines must have Z0 = 45 - 50 Ohms and are NOT
to be coupled to each other, nor routed as a diff-pair.
SHUNT5
C72
MAX9934F_uSOP8
8
3V3
U7
C19
[1A across Rsense --> 1V across Rout]
SHUNT1
0.1uF
VB_EXT
J34
1
3V3
Br_Grn-RA
"UART Act"
330
C73
1.0nF
Ext. VB_DET
1
2
3
R45
C70
R43
+
5
6
(Short to use HSIC host)
J35
1
2
3V3
1
2
VBUS_UP
DM_UP
DP_UP
2
SHUNT4
J39
3
*Note:
Jumper selections marked with
an asterisk (*) are default settings.
5
USB-B Jack
1
VCC 2
D- 3
SH1
D+ 4
SH2 GND
4
SHUNT3
5
Evaluation Board -- USB4624 Bat. Chg. x2, HSIC x2, Uart
Page
Content: USB4624 Hub
Project
PN:
Cestus48
EVB-USB4624BCUH-01
Name:
Size:
Date: Friday, September 25, 2015
Sheet 3 of 4
Rev.:
B
1
A2
5
4
3
2
1
J41
R-5V
Bk-gnd
Bk-gnd
Y-12V
4
3
2
1
Conn-HD_RA
PC
5V Regulator, 6A
J36
2.5 mm
1
12V_IN
2
D
3
J31
Ext. 12V
DNP
C69
180uF
16V
DNP
1
2
2
1
12V_IN
+
C71
10uF
25V
1V2 Regulator, 1 A
5V_USB
U12
~48W
VIN
ENABLE
VOUT
TRIM
6_Amp
GND
5V
4
5
C58
3
R37
C57
R31
255 10uF
1%
C62
0.1uF
L3
4.7uH
U13
ENA
2
1
VIN
ENABLE
VOUT
TRIM
3_Amp
GND
1K
4.7uF
C67
0.1uF
DNP
(set pt. = 5.22V)
4
5
3
VDD12REG
FBA
R26
1.91K
1%
D
1V2
R29
C56
29.4K
10uF
1%
C44
C43
C42
4.7uF
1.0uF
DNP
0.1uF
C55
0.1uF
Power Needs:
12V Input = 4 A
9V
0.75 A (option)
5V_USB
~6 A
5V
2 A
3V3
1 A
1V2
1 A
C
5V
U14
2
1
12V_IN
C68
10uF
25V
VIN
ENABLE
VOUT
TRIM
3_Amp
GND
5V
4
5
R30
255 10uF
1%
C64
C35
0.1uF
4.7uF
(set pt. = 5.22V)
L1
4.7uH
U9
R23
C65
3
C
3V3 Regulator, 1 A
5V Regulator, 2A
ENB
2
1
VIN
ENABLE
VOUT
TRIM
3_Amp
GND
1K
C45
0.1uF
DNP
4
5
3
VDD33REG
R17
432
1%
3V3
C29
C28
10uF
0.1uF
C24
C25
C23
4.7uF
1.0uF
DNP
0.1uF
3V3
R21
330
D5
UB Red
"3V3 Present"
B
B
Optional 9V, 0.75A Aux. Supply
MPS MP2359DT_SOT23-6
[(R1/R2) +1]*0.81V=Vout
R20
100K
U10
EN9V
4
5
12V_IN
C26
10uF
25V
C22
0.1uF
6
EN
FB
VIN
GND
SW
BST
R24
3
4.99K
(R2)
2
1
(set pt. = 9.105V)
R27
51.1K
(R1)
MP2359_SOT23-6
C41
L2
4.7uH
0.01uF
9V
2
SW9V
A
C31
C30
10uF
25V
10uF
25V
J17
Ext. 9V out
A
1
D7
B240A-13
Microchip Technology, Inc.
USB/Networking Group - UNG
www.Microchip.com
DNP
Description:
Evaluation Board -- USB4624 Bat. Chg. x2, HSIC x2, Uart
Page
Content: Power and Reset
Project
PN:
Cestus48
EVB-USB4624BCUH-01
Name:
Size:
Date: Thursday, September 24, 2015
Sheet 4 of 4
Rev.:
B
5
4
3
2
1
A2