LT3796/LT3796-1 - 100V Constant-Current and Constant-Voltage Controller with Dual Current Sense

LT3796/LT3796-1
100V Constant-Current and
Constant-Voltage Controller
with Dual Current Sense
Description
Features
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3000:1 True Color PWM™ Dimming
Wide Input Voltage Range: 6V to 100V
Current Monitoring Up to 100V
High Side PMOS Disconnect and PWM Switch Driver
Constant-Current and Constant-Voltage Regulation
Dual Current Sense Amplifiers with Reporting
C/10 Detection for Battery and SuperCap Charging
Linear Current Sense Threshold Programming
Short-Circuit Protection
Adjustable Frequency: 100kHz to 1MHz
Frequency Synchronization (LT3796)
Independent Top Gate Enable Pin (LT3796-1)
Programmable Open LED Protection with VMODE Flag
Programmable Undervoltage Lockout with Hysteresis
Soft-Start with Programmable Fault Restart Timer
Available in 28-Lead TSSOP Package
The LT®3796/LT3796-1 are DC/DC controllers designed to
regulate a constant-current or constant-voltage and are
ideal for driving LEDs. The fixed frequency and current
mode architecture result in stable operation over a wide
range of supply and output voltages. Two ground referred
voltage FB pins serve as the input for several LED protection features, and also allow the converter to operate as a
constant-voltage source. The LT3796/LT3796-1 feature a
programmable threshold output current sense amplifier
with rail-to-rail common mode range. A separate high
side amplifier is gain configurable with two resistors and
can be used to regulate a second current or a voltage
in combination with one of the FB pins. The PWM input
provides LED dimming ratios of up to 3000:1.
The LT3796-1 is optimized for a second output current
regulation loop that can be enabled/disabled with a PMOS
switch, either to drive a second LED string or to extend
analog dimming range.
Applications
High Power LED, High Voltage LED, Dual String
Battery and SuperCap Chargers
n Accurate Current Limited Voltage Regulators
n
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and True
Color PWM is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 7199560, 7321203,
7746300.
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Typical Application
Boost LED Driver with Input Current Monitor
1M
2k
499k
VIN
VS
97.6k
VREF
CSOUT
0.1µF
INTVCC
VMODE
CSN
FB1
ISMON
ISP
85
80
70
ISN
0
10
20
30
VIN (V)
40
50
60
37961 TA01b
TG
FAULT
INTVCC
VMODE
10nF
90
75
620mΩ
100k
RT
10k
95
GND
PWM
VC
13.7k
15mΩ
LT3796
SYNC
100k
FAULT
2.2µF
×4
SENSE
CSOUT
PWM
1M
GATE
CTRL
40.2k
CSP
EN/UVLO
118k
10nF
100
EFFICIENCY (%)
2.2µF
×3
Efficiency vs VIN
22µH
50mΩ
VIN
9V TO 60V
100V (TRANSIENT)
FB2
31.6k
250kHz
SS
INTVCC
4.7µF
0.1µF
85V LED
400mA
37961 TA01a
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1
LT3796/LT3796-1
Absolute Maximum Ratings
Pin Configuration
(Note 1)
VIN, VS.....................................................................100V
EN/UVLO..................................................................100V
ISP, ISN....................................................................100V
TG, GATE...............................................................Note 2
CSP, CSN.................................................................100V
VS - CSP, VS - CSN........................................ –0.3V to 4V
INTVCC (Note 3)......................................8.6V, VIN + 0.3V
PWM, VMODE, FAULT................................................12V
FB1, FB2, SYNC (LT3796), TGEN (LT3796-1)...............8V
CTRL..........................................................................15V
SENSE.......................................................................0.5V
ISMON, CSOUT............................................................5V
VC, VREF, SS.................................................................3V
RT................................................................................2V
Operating Junction Temperature Range (Note 4)
LT3796E/LT3796I................................... –40 to 125°C
LT3796H................................................. –40 to 150°C
Storage Temperature Range.......................–65 to 150°C
TOP VIEW
ISP
1
28 CSOUT
ISN
2
27 CSP
TG
3
26 CSN
GND
4
25 VS
ISMON
5
24 EN/UVLO
FB2
6
23 VIN
FB1
7
VC
8
CTRL
9
VREF 10
29
GND
22 GND
21 GND
20 INTVCC
19 GATE
SS 11
18 SENSE
RT 12
17 GND
TGEN/SYNC* 13
PWM 14
16 VMODE
15 FAULT
FE PACKAGE
28-LEAD PLASTIC TSSOP
TJMAX = 150°C, θJA = 30°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
*SYNC FOR LT3796, TGEN FOR LT3796-1
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3796EFE#PBF
LT3796EFE#TRPBF
LT3796FE
28-Lead Plastic TSSOP
–40°C to 125°C
LT3796IFE#PBF
LT3796IFE#TRPBF
LT3796FE
28-Lead Plastic TSSOP
–40°C to 125°C
LT3796HFE#PBF
LT3796HFE#TRPBF
LT3796FE
28-Lead Plastic TSSOP
–40°C to 150°C
LT3796EFE-1#PBF
LT3796EFE-1#TRPBF
LT3796FE-1
28-Lead Plastic TSSOP
–40°C to 125°C
LT3796IFE-1#PBF
LT3796IFE-1#TRPBF
LT3796FE-1
28-Lead Plastic TSSOP
–40°C to 125°C
LT3796HFE-1#PBF
LT3796HFE-1#TRPBF
LT3796FE-1
28-Lead Plastic TSSOP
–40°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LT3796/LT3796-1
Electrical
Characteristics
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIN Minimum Operating Voltage
VIN Tied to INTVCC
6
V
VIN Shutdown IQ
EN/UVLO = 0V, PWM = 0V
EN/UVLO = 1.15V, PWM = 0V
1
12
µA
µA
VIN Operating IQ (Not Switching)
RT = 82.5k to GND, FB1 = 1.5V
2.5
3
mA
2.015
2.06
VREF Voltage
–100µA ≤ IREF ≤ 10µA
VREF Pin Line Regulation
6V < VIN < 100V
VREF Pin Load Regulation
–100µA < IREF < 0µA
SENSE Current Limit Threshold
l
1.97
1.5
10
l
100
113
V
m%/V
m%/µA
125
mV
SENSE Input Bias Current
Current Out of Pin
60
µA
SS Sourcing Current
SS = 0V
28
µA
SS Sinking Current
ISP – ISN = 1V, SS = 2V
2.8
µA
Error Amplifier
Full Scale LED Current Sense Threshold
(V(ISP-ISN))
ISP = 48V, CTRL ≥ 1.2V
ISP = 0V, CTRL ≥ 1.2V
l
l
243
243
250
250
257
257
mV
mV
9/10th LED Current Sense Threshold
(V(ISP-ISN))
CTRL = 1V, ISP = 48V
CTRL = 1V, ISP = 0V
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220
220
225
225
230
230
mV
mV
1/2 LED Current Sense Threshold
(V(ISP-ISN))
CTRL = 0.6V, ISP = 48V
CTRL = 0.6V, ISP = 0V
l
l
119
119
125
125
131
131
mV
mV
1/10th LED Current Sense Threshold
(V(ISP-ISN))
CTRL = 0.2V, ISP = 48V
CTRL = 0.2V, ISP = 0V
l
l
16
16
25
25
32
32
mV
mV
ISP/ISN Current Monitor Voltage (VISMON)
V(ISP-ISN) = 250mV, ISP = 48V, –50µA < IISMON < 0 µA
V(ISP-ISN) = 250mV, ISP = 0V, –50µA < IISMON < 0 µA
l
l
0.96
0.96
1
1
1.04
1.04
V
V
ISP/ISN Over Current Protection Threshold
(V(ISP-ISN))
ISN = 48V
ISN = 0V
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l
360
360
375
375
390
390
mV
mV
CTRL Input Bias Current
Current Out of Pin, CTRL = 1.2V
50
200
nA
100
V
0.1
µA
µA
ISP/ISN Current Sense Amplifier Input
Common Mode Range
0
ISP/ISN Input Current Bias Current
(Combined)
PWM = 5V (Active), ISP = 48V
PWM = 0V (Standby), ISP = 48V
700
0
ISP/ISN Current Sense Amplifier gm
V(ISP-ISN) = 250mV
400
VC Output Impedance
µs
2000
VC Standby Input Bias Current
PWM = 0V
FB1, FB2 Regulation Voltage (VFB)
ISP = ISN = 48V
ISP = ISN = 48V
–20
kΩ
20
nA
1.230
1.238
1.250
1.250
1.270
1.264
V
V
FB1 Amplifier gm
450
600
750
µS
FB2 Amplifier gm
130
170
210
µS
100
200
nA
FB1, FB2 Pin Input Bias Current
FB = VFB
FB1 Open LED Threshold
VMODE Falling, ISP = ISN = 48V
C/10 Comparator Threshold (V(ISP-ISN))
VMODE Falling, FB1 = 1.25V, ISP = 48V
VMODE Falling, FB1 = 1.25V, ISN = 0V
l
VFB – 70mV VFB – 60mV VFB – 50mV
25
25
V
mV
mV
FB1 Overvoltage Threshold
FAULT Falling
VFB + 35mV VFB + 50mV VFB + 60mV
V
FB2 Overvoltage Threshold
TG Rising
VFB + 35mV VFB + 50mV VFB + 60mV
V
VC Current Mode Gain (∆VVC/∆VSENSE)
4.2
V/V
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LT3796/LT3796-1
Electrical
Characteristics
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Current Sense Amplifier (CSA)
Power Supply Voltage Range (VS)
l
3
100
V
CSA Input Voltage Common Mode Range
(VCSP and VCSN)
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2.5
100
V
CSOUT Maximum Output Current
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200
µA
3
mV
Input Voltage Offset (V(CSP-CSN))
VSNS = 100mV, VS = 48V (Note 5)
CSP, CSN Input Bias Current
RIN1 = RIN2 = 1k (Note 5)
100
nA
CSP, CSN Input Current Offset
RIN1 = RIN2 = 1k (Note 5)
0
nA
VS Supply Current
VS = 48V
80
µA
1
µs
l
–3
Input Step Response ( to 50% of Output Step) ∆VSENSE = 100mV Step, RIN1 = RIN2 = 1k, ROUT = 5k
0
Linear Regulator
INTVCC Regulation Voltage
l
Dropout (VIN – INTVCC)
IINTVCC = –10mA, VIN = 6V
INTVCC Current Limit
VIN = 100V, INTVCC = 6V
VIN = 12V, INTVCC = 6V
INTVCC Shutdown Bias Current if Externally
Driven to 7V
EN/UVLO = 0V, INTVCC = 7V
7.4
7.7
8
400
mV
20
85
mA
mA
10
INTVCC Undervoltage Lockout
3.8
INTVCC Undervoltage Lockout Hysteresis
V
4
µA
4.1
150
V
mV
Oscillator
Switching Frequency
RT = 82.5k
RT = 19.6k
RT = 6.65k
Minimum Off-Time
(Note 6)
190
ns
Minimum On-Time
(Note 6)
210
ns
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l
l
85
340
900
105
400
1000
125
480
1150
kHz
kHz
kHz
LOGIC Input/Outputs
PWM Input Threshold Rising
l
0.96
PWM Pin Bias Current
1
1.04
10
EN/UVLO Threshold Voltage Falling
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1.185
EN/UVLO Rising Hysteresis
1.220
1.250
20
EN/UVLO Input Low Voltage
IVIN Drops Below 1µA
0.4
EN/UVLO Pin Bias Current Low
EN/UVLO = 1.15V
2.5
EN/UVLO Pin Bias Current High
EN/UVLO = 1.30V
VMODE OUTPUT Low
V
µA
V
mV
V
3
3.8
µA
40
200
nA
IVMODE = 0.5mA
300
mV
FAULT OUTPUT Low
IFAULT = 0.5mA
300
mV
SYNC Pin Resistance to GND
LT3796 Only
SYNC Input Low Threshold
LT3796 Only
SYNC Input High Threshold
LT3796 Only
TGEN Pin Resistance to GND
LT3796-1 Only
TGEN Input Low Threshold
LT3796-1 Only
TGEN Input High Threshold
LT3796-1 Only
40
kΩ
0.4
V
1.5
40
V
kΩ
0.4
V
1.5
V
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LT3796/LT3796-1
Electrical
Characteristics
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Gate Driver
tr NMOS GATE Driver Output Rise Time
CL = 3300pF, 10% to 90%
20
tf NMOS GATE Driver Output Fall Time
CL = 3300pF, 10% to 90%
18
NMOS GATE Output Low (VOL)
ns
ns
0.05
NMOS GATE Output High (VOH)
V
INTVCC –
0.05
V
tr Top GATE Driver Output Rise Time
CL = 300pF
50
ns
tf Top GATE Driver Output Fall Time
CL = 300pF
100
ns
Top Gate On Voltage (VISP -VTG)
ISP = 48V
7
8
V
Top Gate Off Voltage (VISP -VTG)
PWM = 0V, ISP = 48V
0
0.3
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Do not apply a positive or negative voltage source to TG and GATE
pins, otherwise permanent damage may occur.
Note 3: Operating maximum for INTVCC is 8V.
Note 4: The LT3796E and LT3796E-1 are guaranteed to meet specified
performance from 0°C to 125°C. Specifications over the –40°C to 125°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls. The LT3796I and LT3796I-1
are guaranteed to meet performance specifications over the –40°C to
125°C operating temperature range. The LT3796H and LT3796H-1 are
guaranteed over the full –40°C to 150° C operating junction temperature
range. High junction temperatures degrade operating lifetimes. Operating
lifetime is derated at junction temperatures greater than 125°C.
Note 5: Measured in servo. See Figure 9 for details.
Note 6: See Duty Cycle Considerations in the Applications Information
section.
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LT3796/LT3796-1
Typical Performance Characteristics
253
200
150
100
50
0
0
0.2
0.6 0.8
VCTRL (V)
0.4
1.0
1.2
254
251
250
249
248
251
250
249
248
0
20
60
40
VISP (V)
246
–50 –25
100
80
0
25 50 75 100 125 150
TEMPERATURE (°C)
37961 G03
37961 G02
V(ISP-ISN) Threshold at CTRL = 0.6V
vs Temperature
V(ISP-ISN) Threshold vs FB Voltage
128
300
127
250
1.27
VFB vs Temperature
FB1
126
125
124
123
122
–50 –25
0
25
50
75
150
1.24
50
1.2
1.15
TEMPERATURE (°C)
1.25
900
376
374
372
75
100 125 150
TEMPERATURE (°C)
100 125 150
VREF Voltage vs Temperature
PWM = 5V
800
2.04
700
2.03
ISP
500
400
2.01
1.99
200
1.98
1.97
ISN
0
20
40
60
IREF = –100µA
2.00
300
0
IREF = 0µA
2.02
600
80
100
VISP, VISN (V)
37961 G06
75
2.05
100
50
50
37961 G05
VREF (V)
ISP, ISN BIAS CURRENT (µA)
378
25
TEMPERATURE (°C)
ISP/ISN Input Bias Current vs
VISP , VISN
380
25
0
37961 G04
ISP/ISN Overcurrent Protection
Threshold vs Temperature
0
1.23
–50 –25
1.3
VFB (V)
37961 G03a
370
–50 –25
1.25
100
0
1.1
100 125 150
1.26
FB2
200
VFB (V)
V(ISP-ISN) THRESHOLD (mV)
V(ISP-ISN) (mV)
252
247
37961 G01
ISP/ISN OVERCURRENT THRESHOLD (mV)
ISP = 48V
CTRL = 2V
253
252
247
1.4
V(ISP-ISN) Full-Scale Threshold vs
Temperature
V(ISP-ISN) Threshold vs VISP
V(ISP-ISN) THRESHOLD (mV)
250
V(ISP-ISN) THRESHOLD (mV)
V(ISP-ISN) THRESHOLD (mV)
300
V(ISP-ISN) Threshold vs VCTRL
TA = 25°C, unless otherwise noted.
1.96
–50 –25
0
25
50
75
100 125 150
TEMPERATURE (°C)
37961 G07
37961 G08
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LT3796/LT3796-1
Typical Performance Characteristics
VREF vs VIN
2.05
100
IREF = 0µA
TA = 25°C, unless otherwise noted.
Switching Frequency vs
Temperature
RT vs Switching Frequency
440
2.02
RT (kΩ)
VREF (V)
2.03
2.01
10
2.00
1.99
420
410
400
390
380
1.98
1.97
370
0
20
60
40
80
1
100
VIN (V)
360
–50 –25
0 100 200 300 400 500 600 700 800 900 1000
SWITCHING FREQUENCY (kHz)
37961 G09
2.5
450
50
75
100 125 150
37961 G11
Quiescent Current vs VIN
2000
VISMON vs V(ISP-ISN)
1800
2.0
300
250
200
150
100
1600
1400
VISMON (mV)
VIN CURRENT (mA)
350
1.5
1.0
200
400
600
800
1000
0
1200
0
20
60
40
80
3.0
EN/UVLO (V)
2.5
2.0
1.5
1.0
118
1.27
117
1.26
116
1.25
EN/UVLO RISING THRESHOLD
1.24
1.23
EN/UVLO FALLING THRESHOLD
1.19
–50 –25
37961 G14
500
115
114
113
112
111
109
0
25
50
75
100 125 150
TEMPERATURE (°C)
TEMPERATURE (°C)
400
110
1.20
100 125 150
300
37961 G13
1.28
1.21
0.5
200
SENSE Current Limit Threshold vs
Temperature
1.22
75
100
V(ISP-ISN) (mV)
EN/UVLO Falling/Rising
Threshold vs Temperature
3.5
50
0
37961 G12
EN/UVLO Hysteresis Current vs
Temperature
25
0
100
VIN (V)
37961 G11a
0
800
200
PWM = 0V
SS VOLTAGE (mV)
0
–50 –25
1000
400
50
0
1200
600
0.5
SENSE THRESHOLD (mV)
SW FREQUENCY (kHz)
25
TEMPERATURE (°C)
400
0
0
37961 G10
Switching Frequency vs
SS Voltage
EN/UVLO HYSTERESIS CURRENT (µA)
RT = 19.6k
430
SWITCHING FREQUENCY (kHz)
2.04
108
–50 –25
0
25
50
75
100 125 150
TEMPERATURE (°C)
37961 G15
37961 G16
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LT3796/LT3796-1
Typical Performance Characteristics
SENSE Current Limit Threshold vs
Duty Cycle
120
110
105
0
20
40
60
80
VIN = 24V
100
80
60
40
20
0
100
100
INTVCC CURRENT LIMIT (mA)
INTVCC CURRENT LIMIT (mA)
SENSE THRESHOLD (mV)
115
0
20
60
40
80
60
50
–50 –25
100
8
1600
7
1400
3
2
1
125°C
80
25°C
800
0°C
600
0
100
7.7
7.6
7.5
400
7.4
–55°C
–40°C
0
5
VIN (V)
10
15
7.3
–50 –25
20
0
INTVCC LOAD (mA)
25
50
37961 G22
V(CSP-CSN) Offset Voltage vs
Temperature
Current Sense Amplifier Gain
Error vs Temperature
0.6
2
2.0
ICSOUT = 100µA
1.5
0
ICSOUT = 10µA
0.2
ICSOUT = 50µA
0
–1
–2
1.0
ICSOUT = 100µA
GAIN ERROR (%)
V(CSP-CSN) (mV)
V(CSP-CSN) (mV)
0.4
ICSOUT = 50µA
0
20
40
60
80
100
–0.2
–50 –25
37961 G23
0.5
ICSOUT = 50µA
0
–0.5
0
25
50
75
–1.5
100 125 150
TEMPERATURE (°C)
VS (V)
ICSOUT = 10µA
–1.0
ICSOUT = 10µA
SEE NOTE 5 FOR TEST SETUP
100 125 150
37961 G21
V(CSP-CSN) Offset Voltage with
Different ICSOUT vs VS
ICSOUT = 100µA
75
TEMPERATURE (°C)
37961 G20
1
100 125 150
7.8
75°C
200
60
75
7.9
150°C
1000
4
50
INTVCC vs Temperature
VIN = 6V
1200
5
25
8.0
INTVCC (V)
1800
INTVCC DROPOUT (mV)
9
40
0
37961 G19
INTVCC Dropout Voltage vs
Current, Temperature
6
INTVCC (V)
VIN = 48V
70
37961 G18
INTVCC vs VIN
20
80
TEMPERATURE (°C)
37961 G17
0
90
VIN (V)
DUTY CYCLE (%)
0
INTVCC Current Limit
vs Temperature
INTVCC Current Limit vs VIN
120
100
TA = 25°C, unless otherwise noted.
–2
–50 –25
0
25
50
75
100 125 150
TEMPERATURE (°C)
37961 G24
37961 G25
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LT3796/LT3796-1
Typical Performance Characteristics
Top Gate (PMOS) Rise/Fall Time
vs Capacitance
NMOS Gate Rise/Fall Time vs
Capacitance
Current Sense Amplifier Gain vs
Frequency
30
160
800
25
140
700
120
600
15
TIME (ns)
10
5
0
–5
100
RISE TIME
80
60
FALL TIME
40
–10
VS = 48V, RIN = 1k
–15 ROUT = 10k, VSENSE = 100mV
(NOTE 5)
–20
0.1
1
10
100
0.01
TIME (ns)
20
GAIN (dB)
TA = 25°C, unless otherwise noted.
0
0
10
20
30
40
85V
75V
50
0
0
1
2
100ns/DIV
PMOS VISHAY SILICONIX Si7113DN
3
4
5
6
7
8
9
10
CAPACITANCE (nF)
37961 G27
Top Gate Driver Rising Edge
TG
RISE TIME
CAPACITANCE (nF)
37961 G26
5V
0V
300
100
FREQUENCY (kHz)
PWM
FALL TIME
400
200
20
1000 10000
500
37961 G28
Top Gate Driver Falling Edge
PWM
5V
0V
TG
85V
75V
3796 G29
100ns/DIV
37961 G30
PMOS VISHAY SILICONIX Si7113DN
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9
LT3796/LT3796-1
Pin Functions
ISP (Pin 1): Connection Point for the Positive Terminal
of the Current Feedback Resistor (RLED). Also serves as
positive rail for TG pin driver.
ISN (Pin 2): Connection Point for the Negative Terminal
of the Current Feedback Resistor (RLED).
TG (Pin 3): Top Gate Driver Output. An inverted PWM signal
drives series PMOS device between VISP and (VISP – 7V)
if VISP > 7V. An internal 7V clamp protects the PMOS gate
by limiting VGS. Leave TG unconnected if not used.
GND (Pins 4, 17, 21, 22, Exposed Pad Pin 29): Ground.
These pins also serve as current sense input for control
loop, sensing negative terminal of current sense resistor in
the source of the N-channel MOSFET. Solder the exposed
pad directly to ground plane.
ISMON (Pin 5): ISP/ISN Current Report Pin. The LED
current sensed by ISP/ISN inputs is reported as VISMON =
ILED • RLED • 4. Leave ISMON pin unconnected if not used.
When PWM is low, ISMON is driven to ground. Bypass
with a 47nF capacitor or higher if needed.
FB2 (Pin 6): Voltage Loop Feedback 2 Pin. This pin is
connected to the internal transconductance amplifier positive input node. The internal transconductance amplifier
with output VC regulates FB2 to 1.25V through the DC/
DC converter. On LT3796 only, the FB2 has an additional
feature. If FB2 is driven above 1.3V, the TG pin is pulled
high to turn off the external PMOS and GATE pin is driven
to GND to turn off the external N-channel MOSFET. Connect
to GND if not used.
FB1 (Pin 7): Voltage Loop Feedback 1 Pin. FB1 is intended
for constant-voltage regulation or for LED protection/open
LED detection. The internal transconductance amplifier
with output VC regulates FB1 to 1.25V (nominal) through
the DC/DC converter. If the FB1 input is regulating the loop
and V(ISP-ISN) is less than 25mV (normal), the VMODE
pull-down is asserted. This action may signal an open
LED fault. If FB1 is driven above the 1.3V (by an external
power supply spike, for example), the FAULT pull-down is
asserted, the GATE pin is pulled low to turn off the external
N-channel MOSFET and the TG pin is driven high to protect
the LEDs from an overcurrent event. Do not leave the FB1
pin open. If not used, connect FB1 to GND.
VC (Pin 8): Transconductance Error Amplifier Output Pin.
Used to stabilize the control loop with an RC network.
This pin is high impedance when PWM is low, a feature
that stores the demand current state variable for the next
PWM high transition. Connect a capacitor between this
pin and GND; a resistor in series with the capacitor is
recommended for fast transient response. Do not leave
this pin open.
CTRL (Pin 9): Current Sense Threshold Adjustment Pin.
Regulating threshold V(ISP-ISN) is 0.25 • VCTRL plus an offset
for 0.1V < VCTRL < 1V. For VCTRL > 1.2V the current sense
threshold is constant at the full-scale value of 250mV. For
1V < VCTRL < 1.2V, the dependence of the current sense
threshold upon VCTRL transitions from a linear function
to a constant value, reaching 98% of full-scale value by
VCTRL = 1.1V. Connect CTRL to VREF for the 250mV default
current threshold. Do not leave this pin open. Pull CTRL
pin to GND for zero LED current.
VREF (Pin 10): Voltage Reference Output Pin. Typically
2.015V. This pin drives a resistor divider for the CTRL
pin, either for analog dimming or for temperature limit/
compensation of LED load. It can supply up to 100μA.
SS (Pin 11): Soft-Start Pin. This pin modulates oscillator
frequency and compensation pin voltage (VC) clamp. The
soft-start interval is set with an external capacitor. The pin
has a 28μA (typical) pull-up current source to an internal
2.5V rail. This pin can be used as fault timer. Provided the
SS pin has exceeded 1.7V, the pull-up current source is
disabled and a 2.8µA pull-down current enabled when any
one of the following fault conditions happen:
1. LED overcurrent
2. INTVCC undervoltage
3. Thermal limit
The SS pin must be discharged below 0.2V to reinitiate a
soft-start cycle. Switching is disabled until SS is recharged.
RT (Pin 12): Switching Frequency Adjustment Pin. Set the
frequency using a resistor to GND (for resistor values, see
the Typical Performance curve or Table 2). Do not leave
the RT pin open.
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LT3796/LT3796-1
Pin Functions
SYNC (Pin 13) LT3796: The SYNC pin is used to synchronize the internal oscillator to an external logic level
signal. If SYNC is used, the RT resistor should be chosen
to program an internal switching frequency 20% slower
than the SYNC pulse frequency. Gate turn-on occurs a fixed
delay after the rising edge of SYNC. Use a 50% duty cycle
waveform to drive this pin. If not used, tie this pin to GND.
TGEN (Pin 13) LT3796-1: Top Gate Driver Enable Pin. TGEN
signal low causes the TG pin to transition high and turn
off a PMOS switch, independent of the PWM input. Unlike
PWM, TGEN low does not put the switching regulator in an
idle state. TGEN can be used in combination with TG and
a PMOS switch to deactivate one of two output current
regulation loops. Tie the TGEN pin to 1.5V or higher if its
function is not used. There is an equivalent 90k resistor
from TGEN to ground internally.
PWM (Pin 14): PWM Input Signal Pin. A signal low turns
off switching, idles the oscillator, disconnects the VC pin
from all internal loads, and makes the TG pin high. There
is an equivalent 500k resistor from PWM pin to GND
internally. If not used, tie this pin to VREF.
FAULT (Pin 15): An open-collector pull-down on FAULT
asserts when any of the following conditions happen: 1.
FB1 overvoltage (VFB1 > 1.3V), 2. INTVCC undervoltage,
3. LED overcurrent (V(ISP-ISN) > 375mV), or 4. Thermal
shutdown. If all faults are removed, FAULT flag returns
high. Fault status is only updated during PWM high
state and latched during PWM low state. FAULT remains
asserted until the SS pin is discharged below 0.2V for
cases 2, 3 and 4 above.
VMODE (Pin 16): An open-collector pull-down on VMODE
asserts if the FB1 input is above 1.19V (typical), and
V(ISP-ISN) is less than 25mV (typical). To function, the
pin requires an external pull-up resistor. VMODE status is
updated only during PWM high state and latched during
PWM low state.
SENSE (Pin 18): The current sense input for the control
loop. Kelvin connect this pin to the positive terminal of
the switch current sense resistor, RSENSE, in the source
of the N-channel MOSFET. The negative terminal of the
current sense resistor should be Kelvin connected to the
GND plane of the IC.
GATE (Pin 19): N-Channel MOSFET Gate Driver Output.
Switches between INTVCC and GND. It is driven to GND
during shutdown, fault or idle states.
INTVCC (Pin 20): Regulated Supply for Internal Loads, GATE
Driver and Top Gate (PMOS) Driver. Supplied from VIN and
regulates to 7.7V (typical). INTVCC must be bypassed with
a 4.7μF capacitor placed close to the pin. Connect INTVCC
directly to VIN if VIN is always less than or equal to 7V.
VIN (Pin 23): Input Supply Pin. Must be locally bypassed
with a 0.22μF (or larger) capacitor placed close to the IC.
EN/UVLO (Pin 24): Enable and Undervoltage Lockout
Pin. An accurate 1.22V falling threshold with externally
programmable hysteresis detects when power is OK to
enable switching. Rising hysteresis is generated by the
external resistor divider and an accurate internal 3μA
pull-down current. Above the threshold (but below 6V),
EN/UVLO input bias current is sub-μA. Below the falling
threshold, a 3μA pull-down current is enabled so the
user can define the hysteresis with the external resistor
selection. An undervoltage condition resets soft-start.
Tie to 0.4V, or less, to disable the device and reduce VIN
quiescent current below 1μA.
VS (Pin 25): Current Sense Amplifier Power Supply Pin.
This pin supply current to the current sense amplifier and
can operate from 3V to 100V.
CSN (Pin 26): Negative Current Sense Input Terminal.
CSN remains functional for voltages up to 100V. Typically
connected to VS and CSP as shown in Figure 9.
CSP (Pin 27): Positive Current Sense Input Terminal. The
internal sense amplifier sinks current from CSP to regulate
it to the same potential as CSN. A resistor (RIN1) tied from
VIN to CSP sets the output current ICSOUT = VSNS/RIN1.
VSNS is the voltage developed across RSNS. See Figure 9.
CSOUT (Pin 28): Current Sense Amplifier Output. CSOUT
pin sources the current that is drawn from CSP. Typically
is output to an external resistor to GND.
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LT3796/LT3796-1
Block Diagram
EN/UVLO
FB1
A1
–
VC
SHDN
PWM
ISP-7V
VIN
1.25V
+
1.25V
1.5V
VLED
X1
7.7V
INTVCC
10µA AT
FB1 = 1.25V
LT3796-1 ONLY
SCILMB
A5
–
A4
SHORT-CIRCUIT
DETECT
–
LDO
+
gm
3µA
ISMON
TG
ISP
A2
–
+
1.22V
TGEN
(LT3796-1 ONLY)
TGOFFB
2.5V
+
10µA
ISP
+
100mV
–+
X4
ISN
–
–
+
+
1.1V
CTRL
FB2
gm
EAMP
FAULTB
+
R
A7
A6
–
10µA AT
A6+ = A6–
S
PWM
COMPARATOR
ILIM
A8
–
+
–
+
1.25V
5.5V
113mV
A9
A9
gm
VS
GATE
DRIVER
Q
10µA AT
FB2 = 1.25V
5.5V
CSP
2.5V
–
CSN
28µA
THERMAL
SHDN
A11
+
PWM
CSOUT
ISENSE
SS
SS AND FAULT
LOGIC
FAULTB
FAULT
1mA
+
1.3V
–
–
GND
RAMP
GENERATOR
2.8µA
100kHz TO 1MHz
OSCILLATOR
INTVCC SCILMB
FB1
SENSE
A9
A10
TGOFFB
5.5V
+
VMODE
A3
OVFB1
1.19V
0VFB
COMPARATOR
+
FB2
INTVCC
100µA
1V
A16
0VFB2
1.3V
–
LT3796 ONLY
+
+
–
–
A12
A7
A13
FREQ
PROG
VREF
FB1
+
VLED
–
A14
A7
100mV
–
C/10 COMPARATOR
WITH 200mV
HYSTERESIS
A15
2.015V
+
+
SS
RT
SYNC (LT3796 ONLY)
37961 BD
LT3796/LT3796-1 Block Diagram
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LT3796/LT3796-1
Operation
The LT3796/LT3796-1 are constant-frequency, current
mode controllers with a low side NMOS gate driver. The
operation of the LT3796/LT3796-1 is best understood by
referring to the Block Diagram. In normal operation, with
the PWM pin low, the GATE pin is driven to GND, the TG
pin is pulled high to ISP to turn off the PMOS disconnect switch, the VC pin goes high impedance to store the
previous switching state on the external compensation
capacitor, and the ISP and ISN pin bias currents are reduced to leakage levels. When the PWM pin transitions
high, the TG pin transitions low after a short delay. At the
same time, the internal oscillator wakes up and generates
a pulse to set the PWM latch, turning on the external power
N-channel MOSFET switch (GATE goes high). A voltage
input proportional to the switch current, sensed by an external current sense resistor between the SENSE and GND
input pins, is added to a stabilizing slope compensation
ramp and the resulting switch current sense signal is fed
into the negative terminal of the PWM comparator. The
current in the external inductor increases steadily during
the time the switch is on. When the switch current sense
voltage exceeds the output of the error amplifier, labeled
VC, the latch is reset and the switch is turned off. During
the switch off phase, the inductor current decreases. At the
completion of each oscillator cycle, internal signals such
as slope compensation return to their starting points and
a new cycle begins with the set pulse from the oscillator.
Through this repetitive action, the PWM control algorithm
establishes a switch duty cycle to regulate a current or
voltage in the load. The VC signal is integrated over many
switching cycles and is an amplified version of the difference between the LED current sense voltage, measured
between ISP and ISN, and the target difference voltage
set by the CTRL pin. In this manner, the error amplifier
sets the correct peak switch current level to keep the
LED current in regulation. If the error amplifier output
increases, more current is demanded in the switch; if it
decreases, less current is demanded. The switch current
is monitored during the on phase and the voltage across
the SENSE pin is not allowed to exceed the current limit
threshold of 113mV (typical). If the SENSE pin exceeds
the current limit threshold, the SR latch is reset regardless
of the output state of the PWM comparator. Likewise, any
fault condition, i.e. FB1 overvoltage (VFB1 > 1.3V), LED
over current, or INTVCC undervoltage (INTVCC < 4V), the
GATE pin is pulled down to GND immediately.
In voltage feedback mode, the operation is similar to that
described above, except the voltage at the VC pin is set
by the amplified difference of the internal reference of
1.25V (nominal) and the FB1 and FB2 pins. If FB1 and
FB2 are both lower than the reference voltage, the switch
current increases; if FB1 or FB2 is higher than the reference voltage, the switch demand current decreases. The
LED current sense feedback interacts with the voltage
feedback so that neither FB1 or FB2 exceeds the internal
reference and the voltage between ISP and ISN does not
exceed the threshold set by the CTRL pin. For accurate
current or voltage regulation, it is necessary to be sure
that under normal operating conditions, the appropriate
loop is dominant. To deactivate the voltage loop entirely,
FB1 and FB2 can be connected to GND. To deactivate the
LED current loop entirely, the ISP and ISN should be tied
together and the CTRL input tied to VREF .
Two LED specific functions featured on the LT3796/LT37961 are controlled by the voltage feedback FB1 pin. First,
when the FB1 pin exceeds a voltage 60mV lower (–5%)
than the FB1 regulation voltage and V(ISP-ISN) is less than
25mV (typical), the pull-down driver on the VMODE pin
is activated. This function provides a status indicator that
the load may be disconnected and the constant-voltage
feedback loop is taking control of the switching regulator.
When the FB1 pin exceeds the FB1 regulation voltage by
50mV (4% typical), the FAULT pin is activated.
LT3796/LT3796-1 feature a PMOS disconnect switch driver.
The PMOS disconnect switch can be used to improve
the PWM dimming ratio, and operate as fault protection
as well. Once a fault condition is detected, the TG pin is
pulled high to turnoff the PMOS switch. The action isolates
the LED array from the power path, preventing excessive
current from damaging the LEDs.
A standalone current sense amplifier is integrated in the
LT3796/LT3796-1. It can work as input current limit or open
LED protection. The detailed information can be found in
the Application Information section.
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LT3796/LT3796-1
Applications Information
INTVCC Regulator Bypassing and Operation
The INTVCC pin requires a capacitor for stable operation
and to store the charge for the large GATE switching currents. Choose a 10V rated low ESR, X7R or X5R ceramic
capacitor for best performance. A 4.7μF ceramic capacitor
is adequate for many applications. Place the capacitor
close to the IC to minimize the trace length to the INTVCC
pin and also to the IC ground.
is to allow the user to program the rising hysteresis. The
following equations should be used to determine the
values of the resistors:
R1+ R2
VIN(FALLING) = 1.22 •
R2
V
=V
+ 3µA • R1
IN(RISING) IN(FALLING)
VIN
An internal current limit on the INTVCC output protects
the LT3796/LT3796-1 from excessive on-chip power dissipation. The minimum value of this current limit should
be considered when choosing the switching N-channel
MOSFET and the operating frequency. IINTVCC can be
calculated from the following equation:
LT3796/LT3796-1
R1
EN/UVLO
R2
37961 F01
Figure 1.
IINTVCC = QG • fOSC
Careful choice of a lower QG MOSFET allows higher
switching frequencies, leading to smaller magnetics. The
INTVCC pin has its own undervoltage disable (UVLO) set
to 4V (typical) to protect the external FETs from excessive
power dissipation caused by not being fully enhanced.
If the INTVCC pin drops below the UVLO threshold, the
GATE pin is forced to 0V, TG pin is pulled high and the
soft-start pin will be reset. If the input voltage, VIN, will
not exceed 7V, then the INTVCC pin should be connected
to the input supply. Be aware that a small current (typically
10μA) loads the INTVCC in shutdown. If VIN is normally
above, but occasionally drops below the INTVCC regulation voltage, then the minimum operating VIN is close to
6V. This value is determined by the dropout voltage of the
linear regulator and the 4V INTVCC undervoltage lockout
threshold mentioned above.
LED Current Programming
Programming the Turn-On and Turn-Off Thresholds
with the EN/UVLO Pin
ILED = 0, VCTRL = 0V
The falling UVLO value can be accurately set by the resistor
divider. A small 3μA pull-down current is active when EN/
UVLO is below the threshold. The purpose of this current
The LED current is programmed by placing an appropriate
value current sense resistor RLED between the ISP and ISN
pins. Typically, sensing of the current should be done at
the top of the LED string. If this option is not available,
then the current may be sensed at the bottom of the string.
The CTRL pin should be tied to a voltage higher than 1.2V
to get the full-scale 250mV (typical) threshold across the
sense resistor. The CTRL pin can also be used to dim the
LED current to zero, although relative accuracy decreases
with the decreasing voltage sense threshold. When the
CTRL pin voltage is less than 1V, the LED current is:
ILED =
VCTRL – 100mV
, 0.1V < VCTRL ≤ 1V
RLED • 4
When the CTRL pin voltage is between 1V and 1.2V, the
LED current varies with CTRL, but departs from the previous equation by an increasing amount as the CTRL voltage increases. Ultimately above 1.2V, the LED current no
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LT3796/LT3796-1
Applications Information
longer varies with CTRL. The typical V(ISP-ISN) threshold
vs CTRL is listed in the Table 1.
Table 1. V(ISP-ISN) Threshold vs CTRL
VCTRL (V)
V(ISP-ISN) (mV)
1
225
1.05
236
1.1
244.5
1.15
248.5
1.2
250
regulation. FB2 does not have this extra comparator. The
output voltage can be set by selecting the values of R3
and R4 (see Figure 2) according to the following equation:
VOUT =1.25 •
R3+R4
R4
VOUT
LT3796/LT3796-1
R3
FB1
When CTRL is higher than 1.2V, the LED current is regulated to:
ILED =
R4
37961 F02
Figure 2. Feedback Resistor Connections for Boost and SEPIC
Applications
250mV
RLED
The CTRL pin should not be left open (tie to VREF if not
used). The CTRL pin can also be used in conjunction with
a thermistor to provide overtemperature protection for the
LED load, or with a resistor divider to VIN to reduce output
power and switching current when VIN is low. The presence
of a time varying differential voltage signal (ripple) across
ISP and ISN at the switching frequency is expected. The
amplitude of this signal is increased by high LED load
current, low switching frequency and/or a smaller value
output filter capacitor.
Programming Output Voltage (Constant-Voltage
Regulation) or Open LED/Overvoltage Threshold
The LT3796/LT3796-1 have two voltage feedback pins,
FB1 and FB2. Either one can be used for a boost or SEPIC
application. The difference between these two pins is
FB1 has a comparator that senses when FB1 exceeds
VFB – 60mV (VMODE threshold) and asserts the VMODE
output if V(ISP-ISN) is less than 25mV. This indicates that
the output is in voltage regulation mode and not current
For a boost type LED driver, set the resistor from the output
to the FB1 pin such that the expected VFB1 during normal
operation does not exceed 1.15V. For an LED driver of buck
mode or a buck-boost mode configuration, the FB voltage
is typically level shifted to a signal with respect to GND as
illustrated in Figure 3. The output can be expressed as:
R5 R6 +R7
•
for Figure 3a
R8
R6
R9
+ VBE(Q1) for Figure 3b
or VOUT = 1.25 •
R10
VOUT = 1.25 •
VS
LT3796/
LT3796-1
+
R5
CSP
R6
VOUT
RLED
LED
STRING
R7
CSN
–
CSOUT
FB1
37961 F03a
R8
Figure 3a. Feedback Resistor Connection for Buck Mode or
Buck-Boost Mode LED Driver
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15
LT3796/LT3796-1
Applications Information
+
RSENSE
R9
VOUT
LT3796/
LT3796-1
–
Q1
LED
ARRAY
FB1
37961 F03b
R10
Figure 3b. Feedback Resistor Connection for Buck Mode or
Buck-Boost Mode LED Driver Using External PNP
recommended to limit the transient short-circuit current.
With the PNP helper, the short-circuit current can be
limited to 2A, whereas the short-circuit current can reach
to 20A without the PNP helper as shown in Figure 5 and
Figure 6 respectively. Refer to boost LED driver with output
short-circuit protection and LED current monitor for the
test schematic. Note that the impedance of the short-circuit
cable affects the peak current.
L1
D1
VIN
C1
Open LED Detection
VIN
GATE
SENSE
LT3796/
LT3796-1
The LT3796/LT3796-1 provide an open-collector status pin,
VMODE, that pulls low when the FB1 pin is above 1.19V and
V(ISP-ISN) is less than 25mV. If the open LED clamp voltage is programmed correctly using the resistor divider,
then the FB1 pin should never exceed 1.15V when LEDs
are connected, therefore, the only way for the FB1 pin to
be within 60mV of the 1.25V regulation voltage is for an
open LED event to have occurred.
C2
M1
RSNS
ISP
Q1
RLED
ISN
TG
M2
LED+
LED
STRING
LED Over Current Protection Feature
GND (BOOST) OR
VIN (BUCK-BOOST MODE)
The ISP and ISN pins have a short-circuit protection feature
independent of the LED current sense feature. This feature
prevents the development of excessive switching currents
and protects the power components. The short-circuit
protection threshold (375mV, typ) is designed to be 50%
higher than the default LED current sense threshold. Once
the LED over current is detected, the GATE pin is driven
to GND to stop switching, and TG pin is pulled high to
disconnect the LED array from the power path.
A typical LED short-circuit protection scheme for boost
or buck-boost mode converter is shown in Figure 4. The
Schottky diode D2 should be put close to the drain of
M2 on the board. It protects the LED+ node from swinging well below ground when being shorted to ground
through a long cable. Usually, the internal protection loop
takes about 1µs to respond. Including PNP helper Q1 is
D2
37961 F04
Figure 4. The Simplified LED Short-Circuit Protection
Schematic for Boost/Buck-Boost Mode LED Driver
LED+
50V/DIV
IM2
10A/DIV
FAULT
10V/DIV
1µs/DIV
37961 F05
Figure 5. Short-circuit Current without PNP Helper
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LT3796/LT3796-1
Applications Information
A second method uses the PWM pin to modulate the LED
current between zero and full current to achieve a precisely
programmed average current, without the possibility of
color shift that occurs at low current in LEDs. To make
PWM dimming more accurate, the switch demand current is stored on the VC node during the quiescent phase
when PWM is low. This feature minimizes recovery time
when the PWM signal goes high. To further improve
the recovery time, a disconnect switch should be used
in the LED current path to prevent the output capacitor
from discharging during the PWM signal low phase. The
minimum PWM on or off time depends on the choice of
operating frequency through the RT input. For best current
accuracy, the minimum PWM high time should be at least
three switching cycles (3μs for fSW = 1MHz).
LED+
50V/DIV
IM2
1A/DIV
FAULT
10V/DIV
1µs/DIV
37961 F06
Figure 6. Short-circuit Current with PNP Helper
VIN
RLED
M2
LED+
Q1
VIN ISP
LED
STRING
ISN
TG
D3
C2
LED–
LT3796/LT3796-1
D2
L1
D1
GATE
M1
C1
SENSE
37961 F07
RSNS
Figure 7. The Simplified LED Short-Circuit Protection Schematic
for Buck Mode Converter
Similar to boost, Schottky diodes D2, D3 and PNP transistor Q1 are recommended to protect short-circuit event in
the buck mode.
PWM Dimming Control for Brightness
There are two methods to control the LED current for
dimming using the LT3796/LT3796-1. One method uses
the CTRL pin to adjust the current regulated in the LEDs.
A low duty cycle PWM signal can cause excessive start-up
times if it were allowed to interrupt the soft-start sequence.
Therefore, once start-up is initiated by PWM > 1V, it will
ignore a logical disable by the external PWM input signal.
The device will continue to soft-start with switching and
TG enabled until either the voltage at SS reaches the 1.0V
level, or the output current reaches one-fourth of the fullscale current. At this point the device will begin following
the dimming control as designated by PWM. If at any time
an output overcurrent is detected, GATE and TG will be
disabled even as SS continues to charge.
Programming the Switching Frequency
The RT frequency adjust pin allows the user to program
the switching frequency from 100kHz to 1MHz to optimize
efficiency/performance or external component size. Higher
frequency operation yields smaller component size but
increases switching losses and gate driving current, and
may not allow sufficiently high or low duty cycle operation.
Lower frequency operation gives better performance at the
cost of larger external component size. For an appropriate
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17
LT3796/LT3796-1
Applications Information
RT resistor value see Table 2. An external resistor from the
RT pin to GND is required—do not leave this pin open.
respectively. The following equations express the minimum/ maximum duty cycle:
Table 2. Typical Switching Frequency vs RT Value (1% Resistor)
Min Duty Cycle = minimum on-time • switching
frequency
RT(kΩ)
1000
6.65
900
7.50
800
8.87
700
10.2
600
12.4
500
15.4
400
19.6
300
26.1
200
39.2
100
82.5
Max Duty Cycle = 1 – minimum off-time • switching
frequency
350
300
250
TIME (ns)
fosc(kHz)
MIN ON-TIME
200
MIN OFF-TIME
150
100
Frequency Synchronization
50
The LT3796 switching frequency can be synchronized to an
external clock using the SYNC pin. For proper operation,
the RT resistor should be chosen for a switching frequency
20% lower than the external clock frequency. The SYNC
pin is disabled during the soft-start period. Observation
of the following guidelines about the SYNC waveform will
ensure proper operation of this feature. Driving SYNC
with a 50% duty cycle waveform is always a good choice,
otherwise, maintain the duty cycle between 20% and 60%.
When using both PWM and SYNC features, the PWM signal
rising edge must have the aligned rising edges to achieve
the optimized high PWM dimming ratio. If the SYNC pin
is not used, it should be connected to GND.
Duty Cycle Considerations
Switching duty cycle is a key variable defining converter
operation, therefore, its limits must be considered when
programming the switching frequency for a particular
application. The fixed minimum on-time and minimum
off-time (see Figure 8) and the switching frequency define
the minimum and maximum duty cycle of the switch,
0
–50 –25
0
25
50
75
100 125 150
TEMPERATURE (°C)
37961 F08
Figure 8. Typical Minimum On- and Off-Time
vs Temperature
When calculating the operating limits, the typical values
for on/off-time in the data sheet should be increased by
at least 100ns to allow margin for PWM control latitude,
GATE rise/fall times and SW node rise/fall times.
Setting Input Current Limit
The LT3796/LT3796-1 have a standalone current sense
amplifier. It can be used to limit the input current. As
shown in Figure 9, the input current signal is converted
to voltage output at CSOUT pin. When the CSOUT voltage
exceeds FB2 regulation voltage, the GATE is pulled low,
and the converter stops switching. The input current limit
is calculated as follows:
IIN = 1.25 •
RIN1
ROUT • RSNS
3796fb
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For more information www.linear.com/3796
LT3796/LT3796-1
Applications Information
For buck applications, filter components, RIN2(OPT) and
COPT, are recommended to be placed close to LT3796/
LT3796-1 to suppress the substantial transient signal or
noise at across CSN and CSP pins. For boost and buckboost applications, RIN2(OPT) and COPT are not required.
+VSNS–
RSNS
TJ = TA + [VIN • (IQ + fSW • QG) •θJA]
where TA is the ambient temperature, IQ is the VIN operating
current of the part (2.5mA typical) and θJA is the package
thermal impedance (30°C/W for the TSSOP package). For
example, an application with TA(MAX) = 85°C, VIN(MAX) =
60V, fSW = 400kHz, and having a N-channel MOSFET with
QG = 20nC, the maximum IC junction temperature will be
approximately:
IIN
VIN
TO LOAD
RIN2(OPT)
RIN1
COPT
CSN
CSP
–
VS
TJ = 85°C + [60V • (2.5mA + 400kHz • 20nC) • 30°C/W]
VS
≈ 104°C
+
LT3796/LT3796-1
The exposed pad on the bottom of the package must be
soldered to a ground plane. This ground should then be
connected to an internal copper ground plane with thermal
vias placed directly under the package to spread out the
heat dissipated by the IC.
CSOUT FB2
37961 F03
CFILT
ROUT
Figure 9. Setting Input Current Limit
Thermal Considerations
The LT3796/LT3796-1 are rated to a maximum input voltage of 100V. Careful attention must be paid to the internal
power dissipation of the IC at higher input voltages to
ensure that a junction temperature of 150°C is not exceeded. This junction limit is especially important when
operating at high ambient temperatures. The majority of
the power dissipation in the IC comes from the supply
current needed to drive the gate capacitance of the external
power N-channel MOSFET. This gate drive current can be
calculated as:
IGATE = fSW • QG
A low QG power MOSFET should always be used when
operating at high input voltages, and the switching frequency should also be chosen carefully to ensure that the
IC does not exceed a safe junction temperature. The internal
junction temperature, TJ of the IC can be estimated by:
It is best if the copper plane is extended on either the top
or bottom layer of the PCB to have the maximum exposure
to air. Internal ground layers do not dissipate thermals as
much as top and bottom layer copper does. See recommended layout as an example.
Input Capacitor Selection
The input capacitor supplies the transient input current for
the power inductor of the converter and must be placed
and sized according to the transient current requirements.
The switching frequency, output current and tolerable input
voltage ripple are key inputs to estimating the capacitor
value. An X7R type ceramic capacitor is usually the best
choice since it has the least variation with temperature
and DC bias. Typically, boost and SEPIC converters
3796fb
For more information www.linear.com/3796
19
LT3796/LT3796-1
Applications Information
require a lower value capacitor than a buck mode converter.
Assuming that a 100mV input voltage ripple is acceptable,
the required capacitor value for a boost converter can be
estimated as follows (TSW = 1/fOSC):
V
1µF
CIN (µF) =ILED(A) • LED • TSW (µs) •
VIN
A • µs • 2.8
Therefore, a 2.2µF capacitor is an appropriate selection
for a 400kHz boost regulator with 12V input, 48V output
and 500mA load.
With the same VIN voltage ripple of less than 100mV, the
input capacitor for a buck converter can be estimated as
follows:
CIN(µF)=ILED(A)•
VLED (VIN – V LED)
10µF
•
T
(µs)•
SW
A • µs
VIN2
A 10µF input capacitor is an appropriate selection for a
400kHz buck mode converter with 24V input, 12V output
and 1A load.
In the buck mode configuration, the input capacitor has
large pulsed currents due to the current returned through
the Schottky diode when the switch is off. It is important
to place the capacitor as close as possible to the Schottky
diode and to the GND return of the switch (i.e., the sense
resistor). It is also important to consider the ripple current
rating of the capacitor. For best reliability, this capacitor
should have low ESR and ESL and have an adequate ripple
current rating. The RMS input current for a buck mode
LED driver is:
IIN(RMS) = ILED • √(1–D)D
D=
V LED
VIN
where D is the switch duty cycle.
Table 3. Recommended Ceramic Capacitor Manufacturers
MANUFACTURER
WEB
TDK
www.tdk.com
Kemet
www.kemet.com
Murata
www.murata.com
Taiyo Yuden
www.t-yuden.com
AVX
www.avx.com
Output Capacitor Selection
The selection of the output capacitor depends on the load
and converter configuration, i.e., step-up or step-down
and the operating frequency. For LED applications, the
equivalent resistance of the LED is typically low and the
output filter capacitor should be sized to attenuate the
current ripple. Use of an X7R type ceramic capacitor is
recommended.
To achieve the same LED ripple current, the required filter
capacitor is larger in the boost and buck-boost mode applications than that in the buck mode applications. Lower
operating frequencies will require proportionately higher
capacitor values.
Power MOSFET Selection
For applications operating at high input or output voltages, the power N-channel MOSFET switch is typically
chosen for drain voltage VDS rating and low gate charge
QG. Consideration of switch on-resistance, RDS(ON), is
usually secondary because switching losses dominate
power loss. The INTVCC regulator on the LT3796/LT3796-1
has a fixed current limit to protect the IC from excessive
power dissipation at high VIN, so the MOSFET should be
chosen so that the product of QG at 7.7V and switching
frequency does not exceed the INTVCC current limit. For
driving LEDs be careful to choose a switch with a VDS
rating that exceeds the threshold set by the FB pin in case
of an open load fault. Several MOSFET vendors are listed
3796fb
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LT3796/LT3796-1
Applications Information
in Table 4. The MOSFETs used in the application circuits
in this data sheet have been found to work well with the
LT3796/LT3796-1. Consult factory applications for other
recommended MOSFETs.
Table 4. MOSFET Manufacturers
VENDOR
WEB
Vishay Siliconix
www.vishay.com
Fairchild
www.fairchildsemi.com
International Rectifier
www.irf.com
Infineon
www.infineon.com
High Side PMOS Disconnect Switch Selection
A high side PMOS disconnect switch with a minimum VTH
of –1V to –2V is recommended in most LT3796/LT3796-1
applications to optimize or maximize the PWM dimming
ratio and protect the LED string from excessive heating
during fault conditions as well. The PMOS disconnect
switch is typically selected for drain-source voltage VDS,
and continuous drain current ID. For proper operations,
VDS rating must exceed the open LED regulation voltage
set by the FB1 pin, and ID rating should be above ILED.
Schottky Rectifier Selection
The power Schottky diode conducts current during the
interval when the switch is turned off. Select a diode rated
for the maximum SW voltage. If using the PWM feature for
dimming, it is important to consider diode leakage, which
increases with the temperature, from the output during the
PWM low interval. Therefore, choose the Schottky diode
with sufficiently low leakage current. Table 5 has some
recommended component vendors.
Table 5. Schottky Rectifier Manufacturers
VENDOR
WEB
On Semiconductor
www.onsemi.com
Diodes, Inc
www.diodes.com
Central Semiconductor
www.centralsemi.com
Rohm Semiconductor
www.rohm.com
Sense Resistor Selection
The resistor, RSENSE, between the source of the external
N-channel MOSFET and GND should be selected to provide
adequate switch current to drive the application without
exceeding the 113mV (typical) current limit threshold on
the SENSE pin of LT3796/LT3796-1. For buck mode applications, select a resistor that gives a switch current at
least 30% greater than the required LED current. For buck
mode, select a resistor according to:
RSENSE(BUCK) ≤
0.07V
ILED
For buck-boost mode, select a resistor according to:
RSENSE(BUCK − BOOST ) ≤
VIN • 0.07V
(VIN +VLED)ILED
For boost, select a resistor according to:
RSENSE(BOOST ) ≤
VIN • 0.07V
VLED • ILED
The placement of RSENSE should be close to the source
of the NMOS FET and GND of the LT3796/LT3796-1. The
SENSE input to LT3796/LT3796-1 should be a Kelvin connection to the positive terminal of RSENSE.
70mV is used in the equations above to give some margin
below the 113mV (typical) sense current limit threshold.
Inductor Selection
The inductor used with the LT3796/LT3796-1 should have
a saturation current rating appropriate to the maximum
switch current selected with the RSENSE resistor. Choose
an inductor value based on operating frequency, input and
output voltage to provide a current mode signal on SENSE
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21
LT3796/LT3796-1
Applications Information
of approximately 20mV magnitude. The following equations
are useful to estimate the inductor value (TSW = 1/fOSC):
LBUCK =
TSW •RSENSE • VLED (V IN – VLED )
V IN • 0.02V
LBUCK, BOOST =
TSW •RSENSE • VLED • V IN
(VLED +V IN) • 0.02V
Soft-Start Capacitor Selection
For many applications, it is important to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and output
voltage overshoot. The soft-start interval is set by the
soft-start capacitor selection according to the equation:
T •R
• V (V – V )
LBOOST = SW SENSE IN LED IN
VLED • 0.02V
Table 6 provides some recommended inductor vendors.
Table 6. Inductor Manufacturers
VENDOR
WEB
Sumida
www.sumida.com
Würth Elektronik
www.we-online.com
Coiltronics
www.cooperet.com
Vishay
www.vishay.com
Coilcraft
www.coilcraft.com
TSS = CSS •
2V
28µA
A typical value for the soft-start capacitor is 0.1µF. The
soft-start pin reduces the oscillator frequency and the
maximum current in the switch. Soft-start also operates
as fault protection, which forces the converter into hiccup
or latchoff mode. Detailed information is provided in the
Fault Protection: Hiccup Mode and Latchoff Mode section.
Fault Protection: Hiccup Mode and Latchoff Mode
Loop Compensation
The LT3796/LT3796-1 use an internal transconductance
error amplifier whose VC output compensates the control loop. The external inductor, output capacitor and the
compensation resistor and capacitor determine the loop
stability. The inductor and output capacitor are chosen
based on performance, size and cost. The compensation
resistor and capacitor at VC are selected to optimize control
loop response and stability. For typical LED applications,
a 22nF compensation capacitor at VC is adequate, and
a series resistor should always be used to increase the
slew rate on the VC pin to maintain tighter regulation of
LED current during fast transients on the input supply to
the converter.
If an LED overcurrent condition, INTVCC undervoltage, or
thermal limit happens, an open-drain pull-down on FAULT
asserts. The TG pin is pulled high to disconnect the LED
array from the power path, and the GATE pin is driven low.
If the soft-start pin is charging and still below 1.7V, then
it will continue to do so with a 28µA source. Once above
1.7V, the pull-up source is disabled and a 2.8µA pull-down
is activated. While the SS pin is discharging, the GATE is
forced low. When SS pin is discharged below 0.2V, a new
cycle is initiated. This is referred as hiccup mode operation.
If the fault still exists when SS crosses below 0.2V, then
a full SS charge/discharge cycle has to complete before
switching is enabled and the FAULT flag is deasserted.
If a resistor is placed between VREF pin and SS pin to hold
SS pin higher than 0.2V during a fault, then the LT3796/
LT3796-1 will enter latchoff mode with GATE pin low, TG
pin high and FAULT pin low. To exit latchoff mode, the EN/
UVLO pin must be toggled low to high.
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LT3796/LT3796-1
Applications Information
Board Layout
The high speed operation of the LT3796/LT3796-1 demands
careful attention to board layout and component placement.
The exposed pad of the package is the GND terminal of
the IC and is also important for thermal management of
the IC. It is crucial to achieve a good electrical and thermal
contact between the exposed pad and the ground plane
of the board. To reduce electromagnetic interference
(EMI), it is important to minimize the area of the high
dV/dt switching node between the inductor, switch drain
and anode of the Schottky rectifier. Use a ground plane
under the switching node to eliminate interplane coupling
to sensitive signals. The lengths of the high dI/dt traces:
1) from the switch node through the switch and sense
resistor to GND, and 2) from the switch node through
the Schottky rectifier and filter capacitor to GND should
be minimized. The ground points of these two switching current traces should come to a common point then
connect to the ground plane under the LT3796/LT3796-1.
Likewise, the ground terminal of the bypass capacitor for
the INTVCC regulator should be placed near the GND of
the switching path. Typically, this requirement results in
the external switch being closest to the IC, along with the
INTVCC bypass capacitor. The ground for the compensation network and other DC control signals should be star
connected to the underside of the IC. Do not extensively
route high impedance signals such as FB1, FB2, RT and
VC, as they may pick up switching noise. Since there is a
small variable DC input bias current to the ISN and ISP
inputs, resistance in series with these pins should be
minimized to avoid creating an offset in the current sense
threshold. Likewise, minimize resistance in series with the
SENSE input to avoid changes (most likely reduction) to
the switch current limit threshold.
Figure 10 is a suggested two sided layout for a boost
converter. Note that the 4-layer layout is recommended
for best performance. Please contact the factory for the
reference layout design.
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23
LT3796/LT3796-1
Applications Information
X
VIN VIA
VIN
RSNS1
X
VIAS TO GROUND PLANE
X ROUTING ON THE 2nd LAYER
C3
VIA FROM ISP
R6
VIA FROM ISN
X 1
VIA FROM TG
X
VIA FROM
OUT
R7
ISMON
R8
CC
RC
R2
X
VIA FROM VIN
R1
VREF
C6
C4
27
X 3
26
C1
R5
L1
4
25 X
5
24
6
23 X
7
22
8
21
9
20
10
19
11
C1
28
LT3796
X 2
12
RT
C1
VIA FROM VIN
R3
R4
VIA FROM VIN
C5 INTVCC VIA
X
X
1
18
29
2
17
SYNC
13
16
PWM
14
15
GATE VIA
3
8
7
M1
6
X 4
R9 R10
X
VIA FROM INTVCC
RSNS
5
D1
VIA FROM
GATE
C2
C2
C2
X
OUT VIA
C2
TG VIA
D2
LED+
5
4
6
3
7
8
M2
Q1
X
2
RLED
1
37961 F10
ISN VIA X X ISP VIA
COMPONENT DESIGNATIONS REFER TO BOOST LED DRIVER WITH OUTPUT SHORT CIRCUIT PROTECTION AND LED CURRENT MONITOR
Figure 10. Boost Converter Suggested Layout
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For more information www.linear.com/3796
LT3796/LT3796-1
Typical Applications
Boost LED Driver with Output Short Circuit Protection and LED Current Monitor
VIN
9V TO 60V
100V (TRANSIENT)
C1
2.2µF
×3
R1
1M
OPTIONAL INPUT
CURRENT REPORTING
R3
499k
VS
GATE
R9
100k
RSNS
15mΩ
LT3796
PWM
FB1
SYNC
SYNC
ISP
ISMON
FAULT
INTVCC
VMODE
VREF
R11 OPTIONAL
FOR FAULT LATCHOFF
R11 402k (OPT)
RLED
620mΩ
M2
TG
VMODE
SS
FB2
RC
10k
C6
0.1µF
D2
C5
4.7µF
RT
VC
INTVCC
85V LED
RT
31.6k
250kHz
CC
10nF
37961 TA02a
Fault (Short LED) Protection without R11: Hiccup Mode
Fault (Short LED) Protection with R11: Latchoff Mode
SS
2V/DIV
SS
2V/DIV
LED+
50V/DIV
LED+
50V/DIV
FAULT
10V/DIV
FAULT
10V/DIV
IM2
1A/DIV
IM2
1A/DIV
50ms/DIV
Q1
ISN
C4
0.1µF
FAULT
M1: INFINEON BCS160N10NS3-G
M2: VISHAY SILICONIX Si7113DN
L1: COILTRONICS DR127-220
D1: DIODES INC PDS5100
D2: VISHAY ES1C
Q1: ZETEX FMMT589
LED: CREE XLAMP XR-E
UP TO
400mA
GND
PWM
LED CURRENT REPORTING
R10
100k
R8
13.7k
M1
SENSE
CSOUT
INTVCC
CSN
CSP
CTRL
R6
40.2k
C2
2.2µF
×4
100V
R7
1M
EN/UVLO
R4
97.6k
CSOUT
C3
10nF
D1
R5
2k
VIN
R2
118k
L1 22µH
RSNS1 50mΩ
IIN
37961 TA02b
50ms/DIV
37961 TA02c
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25
LT3796/LT3796-1
Typical Applications
Buck Mode LED Driver with Open LED Flag and LED Current Reporting
VIN
24V TO 80V
RLED 100mΩ
LED+
M2
2.5A
R3
49.9k
R1
1M
VS
VIN
R2
61.9k
ISN
CSP
VREF
CSN
L1
33µH
R6
59k
FB1
FB2
LED CURRENT REPORTING
C5
0.1µF
SENSE
INTVCC
R8
100k
M1
GATE
ISMON
C2
4.7µF
×2
25V
R5 1M
CSOUT
LT3796
PWM
18V
LED
TG
EN/UVLO
CTRL
PWM
ISP
R4
49.9k
D1
C1
2.2µF
×3
100V
RSNS
15mΩ
R9
100k
FAULT
GND
FAULT
VMODE
VMODE
INTVCC
VC
RT
RC
10k
CC
4.7nF
M1: VISHAY SILICONIX Si7454DP
M2: VISHAY SILICONIX Si7113DN
D1: DIODES INC PDS3100
L1: COILTRONICS HC9-330
LED: CREE XLAMP XM-L
SYNC
C3
4.7µF
SS
RT
19.6k
400kHz
INTVCC
C4
0.1µF
37961 TA03a
Efficiency vs VIN
100
EFFICIENCY (%)
95
90
85
80
75
70
20
30
40
50
60
70
80
VIN (V)
37961 TA03b
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For more information www.linear.com/3796
LT3796/LT3796-1
Typical Applications
SEPIC LED Driver Using FB2 for Input Overvoltage Protection
C1
2.2µF
×3
100V
R1
953k
VIN
VREF
OPTIONAL INPUT
CURRENT REPORTING
CSOUT
PWM
M1
C2
10µF
×3
35V
R10
909k
R11
40.2k
SENSE
RSNS
15mΩ
LT3796
FB2
R7
40.2k
CSN
GATE
CTRL
C3
0.1µF
CSP
L1B
EN/UVLO
R5
100k
R3
20k
VS
D1
•
R6
2k
R4
511k
R2
75k
L1A 22µH
RSNS1 50mΩ
•
IIN
VIN
8V TO 60V
C6
2.2µF
100V
GND
CSOUT
FB1
PWM
ISP
UP TO
1A
RLED
250mΩ
ISN
ISMON
LED CURRENT REPORTING
TG
C7
0.1µF
INTVCC
R8
100k
M2
R9
100k
FAULT
22V
LED
FAULT
VMODE
VMODE
INTVCC
VC
M1: VISHAY SILICONIX Si7456DP
M2: VISHAY Si7415DN
L1: COILTRONICS DRQ127-220
D1: DIODES INC PDS5100
LED: CREE XLAMP XR-E
RT
SYNC
INTVCC
C5
4.7µF
SS
RT
19.6k
400kHz
RC
4.99k
CC
10nF
C4
0.1µF
37961 TA04a
Efficiency vs VIN
100
EFFICIENCY (%)
95
90
85
80
75
70
0
10
20
30
40
50
60
VIN (V)
37961 TA04b
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27
LT3796/LT3796-1
Typical Applications
SEPIC Sealed Lead Acid (SLA) Battery Charger
RSNS1 50mΩ
IIN
D2
15V
C1
4.7µF
50V
R1
10k
R2
806k
R6
2k
R4
357k
VIN
R3
20k
CSN
VS CSP
R11
10k
NTC
+
BAT
RSNS
15mΩ
LT3796
FB2
GND
FB1
CSOUT
CSOUT
C3
10nF
R12
30.1k
VCHARGE = 14.6V
VFLOAT = 13.5V
AT 25°C
SENSE
VREF
CTRL
OPTIONAL INPUT
CURRENT REPORTING
BAT
R13
93.1k
M1
GATE
OUT
RSNS2
C2 250mΩ
10µF
L1B
EN/UVLO
R5
100k
D1
•
M2
L1A 33µH
•
VIN
8V TO 40V
100V (TRANSIENT)
C6
2.2µF
100V
R7
40.2k
VREF
OUTPUT CURRENT
REPORTING
PWM
OUT
ISN
BAT
C4
0.1µF
R9
113k
R10
10.2k
M3
ISMON
C7
0.1µF
VMODE
SS
SYNC
VMODE
R8
49.9k
TG
INTVCC
VC
M1: VISHAY SILICONIX Si7456DP
M2: VISHAY SUD19P06-60-E3
M3: ZETEX ZXM61N03F
L1: COILCRAFT MSD1260-333
D1: ON SEMI MBRS260T3G
D2: CENTRAL SEMI CMDZ15L
R11: MURATA NCP18XH103F03RB
ISP
RT
FAULT
C5
4.7µF
RT
19.6k
400kHz
RC
499Ω
INTVCC
R14
49.9k
FAULT
CC
10nF
37961 TA05a
VCHARGE, VFLOAT vs Temperature
17.5
17.0
VCHARGE, VFLOAT (V)
16.5
16.0
15.5
VCHARGE
15.0
14.5
14.0
VFLOAT
13.5
13.0
12.5
–40 –30–20 –10 0 10 20 30 40 50 60 70 80
TEMPERATURE (°C)
37961 TA05b
3796fb
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For more information www.linear.com/3796
LT3796/LT3796-1
Typical Applications
28VIN to 28V SuperCap Charger with Input Current Limit and Charge Done Flag
RSNS1 150mΩ
1.33A MAX
R1
20k
VIN
VS
L1B
CSP
CSN
EN/UVLO
OUTPUT CURRENT REPORTING
ISMON
VREF
RSNS
33mΩ
LT3796
GND
CSOUT
FB1
FB2
ISP
R6
100k
INTVCC
C6
4.7µF
FAULT
CHGDONE
1.67A
MAX
SUPERCAP
TG
FAULT
R9
24.9k
ISN
INTVCC
R7
100k
C2
4.7µF
×2
50V
R8
536k
RSNS2
150mΩ
SS
C4
0.1µF
VOUT = 0V TO 28V
SENSE
SYNC
R2
124k
M1
GATE
PWM
INPUT CURRENT
REPORTING AND LIMIT
CSOUT
C3
0.1µF
D1
•
C1
10µF
C7
0.1µF
C6
2.2µF ×2
L1A 33µH
•
VIN
28V
VMODE
CTRL VREF
VC
RT
RC
499Ω
VOUT
L1: COILCRAFT MSD1260-333
D1: ON SEMI MBRS260T3G
M1: VISHAY SILICONIX Si7850
Q1: ZETEX FMMT591A
R3
499k
C5
0.1µF
R4
30.1k
R10
499k
CC
22nF
Q1
R5
1M
RT
19.6k
400kHz
37961 TA06a
Input and Output Current vs Output Voltage
1800
IOUT
INPUT/OUTPUT CURRENT (mA)
1600
1400
1200
IIN
1000
800
600
400
200
0
0
5
10
15
20
25
30
VOUT (V)
37961 TA06b
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29
LT3796/LT3796-1
Typical Applications
SEPIC Converter with RWIRE Compensation and Output Current Limit
C2
10µF
L1A 22µH
OUT
RSNS1
250mΩ
D1
•
VIN
12V
1:1
•
C1
10µF
M1
C3
10µF
L1B
+
RWIRE
C4
100µF
25V
VLOAD
12V, 1A CURRENT LIMIT
RSNS
33mΩ
VIN
C8
0.1µF
GATE
GND
ISP
ISMON
ISN
PWM
VREF
SENSE
EN/UVLO
LT3796
SYNC
R3
154k
SS
VS
CTRL
VREF
INTVCC
R7
100k
R2
38.3k
CSN
FB2
C5
0.1µF
R1
38.3k
C7
1µF
OUT
CSP
R6
100k
R4
287k
CSOUT
FAULT
FAULT
VMODE
FB1
VMODE
TG
VC
RT
RT
19.6k
400kHz
R5
12.4k
INTVCC
RC
24.9k
INTVCC
CC
10nF
L1: WÜRTH 744871220
D1: ZETEX ZLLS2000TA
M1: VISHAY SILICONIX Si4840DY
C6
4.7µF
37961 TA08a
Line Impedance Compensation
13.0
RWIRE = 0.5Ω
Load Step Response
VOUT
800mA
IOUT
500mA/DIV
12.5
VOUT/VLOAD (V)
VLOAD
12.0
11.5
VOUT
500mV/DIV
(AC)
11.0
500µs/DIV
10.5
10.0
200mA
0
200
400
600
800
1000
37961 TA08c
1200
ILOAD (mA)
37961 TA08b
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For more information www.linear.com/3796
LT3796/LT3796-1
Typical Applications
Solar Panel Driven SLA Battery Charger with Maximum Power Point Tracking
WÜRTH SOLAR PANEL
VOC = 37.5V
VMPP = 28V
BAT
RSNS1
250mΩ
•
M2
D1
D2
15V
1:1
C1
4.7µF
50V
•
R4
301k
INTVCC
C2
10µF
L1B
R1
10k
R10
30.1k
R9
10k
NTC
VCHARGE = 14.6V
VFLOAT = 13.5V
AT 25°C
+
BAT
R5
137k
R2
475k
VIN
VS
CSN
CSP
R3
20k
SENSE
CTRL
CSOUT
C3
0.1µF
M1
GATE
EN/UVLO
RSNS
15mΩ
LT3796
CSOUT
R6
100k
R11
93.1k
GND
FB1
FB2
PWM
VREF
ISP
OUT
ISN
BAT
R8
113k
C6
0.1µF
R12
10.2k
M3
ISMON
SS
C4
0.1µF
VMODE
VMODE
SYNC
TG
M1: VISHAY SILICONIX Si7456DP
M2: VISHAY SUD19P06-60-E3
M3: ZETEX ZXM61N03F
L1: COILCRAFT MSD1260-333
D1: ON SEMI MBRS260T3G
D2: CENTRAL SEMI CMDZ15L
R9: MURATA NCP18XH103F03RB
R7
49.9k
INTVCC
VC
RT
RC
499Ω
CC
22nF
FAULT
C5
4.7µF
RT
19.6k
400kHz
INTVCC
R12
49.9k
FAULT
37961 TA09a
ICHARGE vs VIN
1.2
1.0
0.8
ICHARGE (A)
VIN
OUT
C6
2.2µF 100V
L1A 33µH
0.6
0.4
0.2
0
20
25
30
35
40
VIN (V)
37961 TA09b
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31
LT3796/LT3796-1
Typical Applications
Boost LED Driver for Twin LEDs with Detection and Protection for Faulty LED
VIN
8V TO 20V
L1
22µH
D1
C1
2.2µF
×3
RSNS
15mΩ
R1
499k
EN/UVLO
R2
97.6k
LED STRING 1
CURRENT REPORTING
FB1
VS
C2
0.1µF
ISMON
LT3796-1
FAULT
INTVCC
FAULT
VMODE
M2
TG
TGEN
INTVCC
C5
4.7µF
VMODE
VC
SS
SS
C3
0.1µF
Q1
R10
10k
CC
22nF
R11
10k
D4
M3
SS
Q2
D3
9 LEDs
STRING 1
9 LEDs
STRING 2
D2
RT
RC
1k
INTVCC
R9
20k
ISN
CTRL
R5
100k
RLED2
500mΩ
RLED1
500mΩ
VREF
R4
100k
R8 10k
ISP
FB2
PWM
INTVCC
CSP
CSN
CSOUT
R3
40.2k
R6
1M
R7
22.6k
VIN GATE SENSE GND
LED STRING 2
CURRENT REPORTING
C6
2.2µF
×4
100V
M1
RT
31.6k
250kHz
37961 TA10a
M1: VISHAY SILICONIX Si7460DP
M2: VISHAY SILICONIX Si7415DN
D1: DIODES INC PDS3100
D2, D3, D4: NXP PMEG6010CEJ
Q1, Q2: ZETEX FMMT589
L1: WÜRTH 744 355 122 1
LED: CREE XLAMP XR-L
Short One LED from String 1
ILED2
500mA/DIV
ILED1
500mA/DIV
Short One LED from String 2
500mA
ILED2
500mA/DIV
500mA
500mA
500mA
ILED1
500mA/DIV
ISMON
1V/DIV
ISMON
1V/DIV
CSOUT
1V/DIV
CSOUT
1V/DIV
20ms/DIV
625mA
37961 TA10b
1V
1.25V
1ms/DIV
37961 TA10c
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For more information www.linear.com/3796
LT3796/LT3796-1
Typical Applications
SEPIC LED Driver with 100:1 Analog Dimming
C1
2.2µF
×3
M1: INFINEON BSC16ON1ONS3-G
M2: VISHAY SILICONIX Si7461DP
M3: ZETEX ZXM6IN02F
L1: COILTRONICS DR Q 127-220
D1: DIODES INC PDS5100
D2: NXP PMEG6010CEJ
LED: CREE XLAMP XR-E
M1
3
R4
113k
2
R2
97.6k
C3
0.1µF
8
1
LTC1541
OP AMP
–
C2
0.1µF
5
6
+
LTC1541
COMP
RLED1
270mΩ
FB2
ISN
VREF
INTVCC
CTRL
FAULT
R11
200k
R10
7.87k
7
M3
M2
TG
PWM
C4
0.1µF
R9 30.1k
C5
0.1µF
RLED2
3.32Ω
CSOUT
4
VREF
R14 6.65k
CSP
ISP
R6 10k
C8
4.7µF
C6
0.1µF
1.2V INTERNAL
REFERENCE
R16
100k
22V LED
VMODE
RT
VC
TGEN SS
INTVCC
R15
100k
FAULT
VMODE
–
RC
1k
CC
22nF
RT
19.6k
400kHz
37961 TA11a
ILED vs VCTRL_IN
1200
1000
800
ILED (mA)
CTRL_IN
VS
LT3796-1
R12
1M
R13
23.7k
VIN GATE SENSE GND
EN/UVLO
FB1
ISMON
C7
2.2µF
×4
50V
CSN
R8 100k
R7
100k
RSNS
15mΩ
R1
499k
+
R17 10k
•
L1B
LED CURRENT
REPORTING
R5 1k
R3 INTVCC
200k
D2
•
VIN
8V TO 20V
VREF
C3
INTVCC
2.2µF ×2 50V D1
L1A
22µH
600
400
200
0
0
2
4
6
8
VCTRL_IN (V)
37961 TA11b
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33
LT3796/LT3796-1
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
FE Package
28-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev J)
Exposed Pad Variation EB
9.60 – 9.80*
(.378 – .386)
4.75
(.187)
4.75
(.187)
28 27 26 2524 23 22 21 20 1918 17 16 15
6.60 ±0.10
4.50 ±0.10
2.74
(.108)
SEE NOTE 4
0.45 ±0.05
EXPOSED
PAD HEAT SINK
ON BOTTOM OF
PACKAGE
6.40
2.74
(.252)
(.108)
BSC
1.05 ±0.10
0.65 BSC
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50*
(.169 – .177)
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN MILLIMETERS
(INCHES)
3. DRAWING NOT TO SCALE
1 2 3 4 5 6 7 8 9 10 11 12 13 14
0.25
REF
1.20
(.047)
MAX
0° – 8°
0.65
(.0256)
BSC
0.195 – 0.30
(.0077 – .0118)
TYP
0.05 – 0.15
(.002 – .006)
FE28 (EB) TSSOP REV J 1012
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
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For more information www.linear.com/3796
LT3796/LT3796-1
Revision History
REV
DATE
DESCRIPTION
A
1/13
Added LT3796-1 option
PAGE NUMBER
B
3/14
Clarified Schematic
1 to 36
33
3796fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/3796
35
LT3796/LT3796-1
Typical Application
Buck-Boost Mode LED Driver with Open LED Clamp and Output Voltage Limit
L1 68µH
R4
715k
C1
2.2µF
×2
R5
20k
R6
200k
VIN
R2
187k
CSN
PWM
INTVCC
R10
100k
C4
0.1µF
VS
RSNS
33mΩ
LT3796
FB2
PWM
ISP
100
R7
1M
PWM = VREF
95
R8
13.3k
GND
FB1
Efficiency vs VIN
M1
SENSE
CTRL
RLED
1Ω
ISMON
ISN
R9
100k
FAULT
VIN
GATE
CSOUT
R3
249k
CSP
EN/UVLO
VREF
C3
4.7µF
×2
C2
1µF
R1
1M
LED CURRENT REPORTING
D1
M2
TG
EFFICIENCY (%)
VIN
9V TO 55V
75V (TRANSIENT)
90
85
80
75
FAULT
VMODE
VMODE
VC
M1: FAIRCHILD SEMICONDUCTOR
FDM3622
M2: ZETEX ZXMP6A13F
L1: WÜRTH 744066680
D1: IRF 10BQ100
LED: CREE XLAMP XR-E
INTVCC
SYNC SS
RT
RT
19.6k
400kHz
RC
4.99k
C6
0.1µF
70
INTVCC
C5
4.7µF
25V LED
250mA
10
20
30
40
50
60
VIN (V)
37961 TA07b
VIN
CC
10nF
0
37961 TA07a
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LT3755/LT3755-1 High Side 60V, 1MHz LED Controller with
LT3755-2
True Color 3,000:1 PWM Dimming
VIN: 4.5V to 40V, VOUT Range: 5V to 60V, True Color PWM, Analog = 3000:1, ISD < 1µA,
3mm × 3mm QFN-16, MSOP-16E Packages
LT3756/LT3756-1 High Side 100V, 1MHz LED Controller with VIN: 6V to 100V, VOUT Range: 5V to 100V, True Color PWM, Analog = 3000:1, ISD < 1µA,
3mm × 3mm QFN-16, MSOP-16E Packages
LT3756-2
True Color 3,000:1 PWM Dimming
LT3743
Synchronous Step-Down 20A LED Driver
with Three-State LED Current Control
VIN: 5.5V to 36V, VOUT Range: 5.5V to 35V, True Color PWM, Analog = 3000:1, ISD < 1µA,
4mm × 5mm QFN-28, TSSOP-28E Packages
LT3791
60V, Synchronous Buck-Boost LED Driver
Controller
VIN: 4.7V to 60V, VOUT Range: 1.2V to 60V, True Color PWM, Analog, ISD < 1µA,
TSSOP-38E Package
LT3791-1
60V, Synchronous Buck-Boost Controller
VIN: 4.7V to 60V, VOUT Range: 1.2V to 60V, ISD < 1µA, TSSOP-38E Package
LT3517
1.3A, 2.5MHz High Current LED Driver
with 3,000:1 Dimming
VIN: 3V to 30V, True Color PWM, Analog = 3000:1, ISD < 1µA, 4mm × 4mm QFN-16
Package
LT3518
2.3A, 2.5MHz High Current LED Driver
with 3,000:1 Dimming
VIN: 3V to 30V, True Color PWM, Analog = 3000:1, ISD < 1µA, 4mm × 4mm QFN-16
Package
LT3474/LT3474-1 36V, 1A (ILED), 2MHz, Step-Down LED
Driver
VIN: 4V to 36V, VOUT Range = 13.5V, True Color PWM = 400:1, ISD < 1µA, TSSOP-16E
Package
LT3475/LT3475-1 Dual 1.5A(ILED), 36V, 2MHz, Step-Down
LED Driver
VIN: 4V to 36V, VOUT Range = 13.5V, True Color PWM, Analog = 3000:1, ISD < 1µA,
TSSOP-20E Package
3796fb
36
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/3796
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/3796
LT 0314 REV B • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2012