TLE 8088 EM Engine management IC for Small Engines Data Sheet Rev 1.0, 2012-10-01 Automotive Power TLE 8088 EM Table of Contents Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 3.1 3.2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 4.1 4.2 4.3 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5.1 5.2 5.3 Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power On Reset and Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Watchdog Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 6.1 6.2 Power Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Low-Side Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7 7.1 K-Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 K-Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8 8.1 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Data Sheet 2 7 7 8 8 Rev 1.0, 2012-10-01 Engine management IC for Small Engines 1 TLE8088EM Overview Features • • • • • • • • • Supply 5 V (±2%), 250mA – Over-temperature and Over-current Protection Watchdog and Reset Function K-Line Transceiver 1 low side driver for inductive loads with maximum operation current of 2.6A including over-temperature, over-current protection and open load/short to GND in off diagnosis 1 low side driver for resistive loads with maximum operation current of 3A including over-temperature and over-current protection Small Package PG-SSOP-24 Exposed Pad Temperature Range: -40°C to 150°C Green Product (RoHS compliant) AEC Qualified PG-SSOP-24 Description TLE8088EM is an engine management IC based on Infineon Smart Power Technology (SPT). It is protected by embedded protection functions and integrates a Power Supply, K-line and power stages to drive different loads in an Engine Management System. It is designed to provide a compact and cost optimized solution for Engine Management and Powertrain Systems. It is specially suitable for one cylinder motorcycle engine management system. Type Package Marking TLE8088EM PG-SSOP-24 TLE8088EM Data Sheet 3 Rev 1.0, 2012-10-01 Engine management IC TLE 8088 EM Block Diagram 2 Block Diagram Vs V5DD NRO WDI 5V voltage regulator Watchdog & Reset WDE RX K Line transceiver TX KIO ST IN1 LS-Driver 1 OUT1 IN2 LS-Driver 2 OUT2 AGND Figure 1 Data Sheet GND Block Diagram 4 Rev 1.0, 2012-10-01 Engine management IC TLE 8088 EM Pin Configuration 3 Pin Configuration 3.1 Pin Assignment n.c. 1 1 24 24 n.c. GND 2 2 23 23 GND KIO 3 3 22 22 RX OUT1 4 4 21 21 TX OUT2 5 5 20 20 IN1 VS 6 6 19 19 IN2 AGND 7 7 18 18 ST WDE 8 8 17 17 WDI V5DD 9 9 16 16 NRO n.c. 10 10 15 15 n.c. n.c. 11 11 14 14 n.c. n.c. 12 12 13 13 n.c. PG-SSOP -24.vsd Figure 2 Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol Function 1 n.c. Not connected 2 GND Power Ground 3 KIO K-Line bus connection 4 OUT1 Output channel 1 5 OUT2 Output channel 2 6 VS Battery voltage: 100nF ceramic capacitor directly connected at the IC to ground 7 AGND Analog ground: should be connected to the system logic ground 8 WDE Watchdog enable: active high, internal pull up 9 V5DD 5V supply output: connected to external blocking capacitor. 10 n.c. Not connected 11 n.c. Not connected 12 n.c. Not connected 13 n.c. Not connected 14 n.c. Not connected 15 n.c. Not connected 16 NRO Reset output: open drain, active low 17 WDI Watchdog input: trigger input for watchdog pulses 18 ST Status signal: output diagnostic signal 19 IN2 Control Input Channel 2: internal pull down Data Sheet 5 Rev 1.0, 2012-10-01 TLE 8088 EM Pin Configuration Pin Symbol Function 20 IN1 Control Input Channel 1: internal pull down 21 TX Logic level input for data to be transmitted on the K-Line bus KIO 22 RX Logic output of data received from the K-Line bus KIO. 23 GND Power Ground 24 n.c. Not connected Exposed pad should be connected to GND and to the ground plane of the ECU Data Sheet 6 Rev 1.0, 2012-10-01 TLE 8088 EM General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings 1) Tj = -40 °C to +150 °C; All voltages with respect to ground. Positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. VS VOUT1 VOUT2, KIO -0.3 40 V -0.3 30 V IN1=0V -0.3 35 V IN2=0V TX=V5DD Vx -0.3 5.5 V 2) Tj Tstg -40 150 °C – -55 150 °C – Voltages 4.1.1 Continuous Voltage on pin Vs 4.1.2 Continuous Voltage on pin OUT1 4.1.3 Continuous Voltage on pin OUT2, KIO 4.1.4 IN1, IN2, V5DD, RxD, TxD, ST, NRO, WDI, WDE Temperatures 4.1.5 Junction Temperature 4.1.6 Storage Temperature ESD Susceptibility 4.1.7 ESD Resistivity to GND, Vs, K-LINE, OUT1,2 VESD -4 4 kV HBM3) 4.1.8 ESD Resistivity to GND, other pins -2 2 kV HBM3) 4.1.9 Electro Static Discharge Voltage “Charged Device Model - CDM” VESD VESD -500 500 V All Pins CDM4) 4.1.10 Electro Static Discharge Voltage “Charged Device Model - CDM” VESD -750 750 V Pin 1, 12, 13, 24 (corner pins) CDM4) 1) 2) 3) 4) Not subject to production test, specified by design For outputs no short circuit is allowed ESD susceptibility, HBM according to EIA/JESD 22-A114B (1.5KOhm, 100pF) ESD susceptibility, Charged Device Model “CDM” EIA/JESD22-C101-C Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 7 Rev 1.0, 2012-10-01 Engine management IC TLE 8088 EM General Product Characteristics 4.2 Pos. Functional Range Parameter 4.2.1 Supply Voltage 4.2.2 Junction Temperature Symbol VS Tj Limit Values Unit Conditions Min. Max. 6 18 V – -40 150 °C – Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. 4.3 Thermal Resistance Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. 4.3.1 Junction to Case RthJC – 6.3 9 K/W Measured to exposed pad 1) 4.3.2 Junction to Ambient RthJA – 29 – K/W 1) 2) 1) Not subject to production test, specified by design. 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. . Data Sheet 8 Rev 1.0, 2012-10-01 TLE 8088 EM Voltage Regulator 5 Voltage Regulator 5.1 Voltage Regulator The TLE8088EM integrates a voltage regulator for load currents up to 250mA. The voltage applied to pin VS is regulated at pin V5DD to 5.0 V with a precision of ±2%. The sophisticated design allows to achieve stable operation even with ceramic output capacitors down to 470nF. The voltage regulator features under-voltage reset, power on reset and watchdog. It is protected against over-current, short circuit and over temperature conditions. The low-side switch function and the K-line transceiver are independent of the reset and watchdog signals. VS Vref I VS + - V5DD IV5DD e.g. µC Figure 3 5V Supply 5.2 Power On Reset and Reset Output Reset output is an open drain output. When the level of VV5DD reaches the reset threshold VRT, the signal at NRO remains low for the power-on reset delay time TRD. The reset function and timing is illustrated in Figure 4. The reset reaction time tRR avoids wrong triggering caused by short “glitches” on the V5DD-line. In case of V5DD power down (VV5DD < VRT for t > tRR) a logic low signal is generated at the pin NRO to reset an external micro controller. The level of the reset threshold for increasing VV5DD is for the hysteresis (VRH) higher than the level for decreasing VV5DD. The reset and watchdog signals are for external use and do not affect the state of the channels and K-line transceiver. The correct functionality of the devices is ensured by an independent voltage monitoring circuitry. Data Sheet 9 Rev 1.0, 2012-10-01 TLE 8088 EM Voltage Regulator Vs t VV5DD < tRR VRT V NRO tRR tRR TRD t T RD VNRO_H V NRO_L t Figure 4 Reset Function and Timing Diagram 5.3 Watchdog Operation After power on, the reset output signal at the NRO pin is kept LOW for the power-on reset delay time TRD of typ. 15ms. With the LOW to HIGH transition of the signal at NRO the micro controller reset is released. The TLE8088EM integrates a watchdog function. If WDE is connected to low, the watchdog function is disabled. If the WDE is connected to 5V or left open, the watchdog function is enabled. A pull up current source is integrated in the WDE pin. After the activation of the watchdog function, the timing of the signal on WDI from the micro-controller must correspond the WD-Period TWD,p specified in the electrical characteristics. A Re-Trigger of the WD-Period is done with a HIGH-to-LOW transition at the WDI-pin within the time TWD,p. A HIGH to LOW transition of the watchdog trigger signal on pin WDI is taken as a trigger. To avoid wrong triggering due to parasitic glitches two HIGH samples followed by two LOW samples (sample period tsam typ. 64μs ) are decoded as a valid trigger, see Figure 6. A reset is generated (NRO goes LOW) for the time TWR if there is no trigger pulse during the Watchdog Period as shown in Figure 5. Data Sheet 10 Rev 1.0, 2012-10-01 TLE 8088 EM Voltage Regulator Vs V5DD t VRT t VNRO TWR TRD Normal operation t rr t Trigger Window t sam t WDI 1. Correct Trigger TWD,p No Trigger causing reset t Figure 5 Watchdog Timing Diagram TWD,p time-out WDI Valid trigger WD period restart No trigger WD time-out No trigger WD time-out No trigger WD time-out tsam Figure 6 Data Sheet Watchdog valid trigger 11 Rev 1.0, 2012-10-01 TLE 8088 EM Voltage Regulator Electrical Characteristics: Voltage Regulator VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions Output V5DD 5.3.1 Output Voltage VV5DD 4.90 5.00 5.10 V 0mA < IV5DD < 150mA 6V < Vs < 18V 5.3.2 Output Voltage VV5DD 4.90 5.00 5.10 V 0mA < IV5DD < 250mA 6V < Vs < 18V 1) 5.3.3 Output Current Limitation IV5DD 250 – 650 mA 5.3.4 Load Regulation ΔVV5DD,Lo – – 20 mV 5.3.4a Load Regulation ΔVV5DD,Lo – – 50 mV VV5DD = 0V, 6V < Vs < 18V 1 mA < IV5DD < 150mA 1 mA < IV5DD < 250mA 1) 5.3.5 Line Regulation ΔVV5DD,Li – – 10 mV 5.3.6 Power Supply Rejection Ratio PSRR – 60 – dB 5.3.7 Output Capacitor CQ 470 – – nF – 10 Ω Low Drop Voltage ESR(CQ) – VV5DD 4.80 – – V 4.40 – – V 5.3.8 5.3.9 IV5DD = 1 mA; 10 V < Vs < 18V fr = 100 Hz; Vr = 0.5 Vpp 1) 1) IV5DD = 1mA VS =5V IV5DD = 150mA VS =5V; after device ramp-up (VS >9V) 5.3.9a 4.15 – – V IV5DD = 250mA VS =5V; after device ramp-up (VS >9V) 1) Current Consumption 5.3.10 Quiescent Current Iq – – 4 mA IV5DD = 0A; CH1,CH2 off, K-Line off WDE 5.3.11 Low Level Input Voltage 5.3.12 High Level Input Voltage 5.3.13 Hysteresis WDE 5.3.14 Input Pull Up Current VIN,L VIN,H VIN,HYS IIN_PU_L IIN_PU_H – – 1.00 V – 2.00 – – V – 50 – 250 mV 1) -20 -50 -100 µA -2.40 – – µA VIN =0V VIN =4.4V VIN,L VIN,H VIN,HYS – – 1.00 V 2.00 – – V 50 – 250 mV Watchdog Input WDI 5.3.15 Low Level Input Voltage 5.3.16 High Level Input Voltage 5.3.17 Input Voltage Hysteresis Data Sheet 12 1) Rev 1.0, 2012-10-01 TLE 8088 EM Voltage Regulator Electrical Characteristics: Voltage Regulator (cont’d) VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. 5.3.18 Parameter Input Pull Down Current 5.3.19 Watchdog Sampling Time 5.3.20 Watchdog Period 5.3.21 Watchdog Reset Time Symbol Limit Values Unit Conditions VIN =5V VIN =0.6V Min. Typ. Max. IIN_PD_H IIN_PD_L tsam TWD,p TWR 20 50 100 µA 2.40 – – µA 40 64 130 µs 50 60 70 ms 120 240 360 µs Reset Output NRO 5.3.22 Output Voltage Reset Switching Threshold VRT 4.00 4.25 4.50 V VV5DD decreasing 5.3.23 Reset Hysteresis – 150 mV Low Level Output Voltage – – 1.10 V 5.3.25 Leakage Current – – 1 µA 5.3.26 Power-on Reset Delay Time 10 15 20 ms 5.3.27 Reset Reaction Time VRH VNRO,L INRO,LK TRD tRR 10 5.3.24 1 4 8 µs – TOT TOTH 150 – 200 °C 1) – 20 – °C 1) INRO=1mA VRT = 5V Over Temperature Protection 5.3.28 Over-temperature 5.3.29 Over-temperature Hysteresis 1) Not subject to production test, specified by design. Data Sheet 13 Rev 1.0, 2012-10-01 TLE 8088 EM Power Drivers 6 Power Drivers 6.1 Low-Side Drivers The power stages are built by N-channel power MOSFET transistors. The channels are universal multi channel switches but mostly suitable to be used in Engine Management Systems. Within an Engine Management System, the best fit of the channels to the typical loads is: • • Channel 1 for injector, valves or similar sized solenoids with a maximum operation current requirement of 2.6A Channel 2 for malfunction indication lamps or other resistive loads with a maximum current requirement of 3A Vbat Vbat ID OUT V L, RL DS GND GND Channel 1 Figure 7 R V VDS DScl ID OUT Channel 2 Low-side Switches Channel 1 has open load detection in off state. If an open load condition persists for a time longer than the filter time td, an open load will be detected and the ST pin set to low. On the rising edge of the IN1 signal the ST pin will be released after the time tST,clear , see Figure 9. In over-current situation channel 1 will be switched off and kept latched. Additionally the ST signal will be set to low after the settling time tST,set,OC. On the falling edge of the IN1 signal the ST pin will be released after the time tST,clear , see Figure 10. Therefore channel 1 can be switched on again by toggling the IN1 pin. During an over-temperature event the ST signal is set to low and will turn back to high if the failure condition is disappeared (see Table 1). Table 1 Truth Table for Diagnostics of CH1 Open Load Over Current Over Temperature ST Status 0 0 0 1 Normal operation 1 x x 0 Failure detected x 1 x 0 Failure detected and latched Channel 1 is switched off x x 1 0 Failure detected and channel 1 is switched off Failure Situation ST 0 = Situation doesn’t exist 1 = Normal operation 1 = Situation exists 0 = Failure detected X = 0 or 1 In over-current situation the channel 2 will be switched off, and after typ. 4ms the channel will be switched on again. Channel 2 is also over-temperature protected. In over-temperature situation channel 2 will be switched off and will restart if the junction temperature falls by thermal shutdown hysteresis TOTH. Data Sheet 14 Rev 1.0, 2012-10-01 TLE 8088 EM Power Drivers 6.2 Electrical Characteristics Electrical Characteristics VS = 13.5 V, Tj = -40 °C to +150 °C: All voltages with respect to ground. Positive current flowing into pin (unless otherwise specified). Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions Output Channel Resistance 6.2.1 On State Resistance CH1 RDSon – 0.60 0.70 Ω IDnom=1.3A; Tj =150°C 6.2.2 On State Resistance CH2 RDSon – 1.10 1.20 Ω IDnom=0.3A; Tj=150°C Input Characteristics 6.2.3 Parallel Input Pin Low level IN1,IN2 VIN,L – – 1.00 V – 6.2.4 Parallel Input Pin High level IN1,IN2 VIN,H 2.00 – – V – 6.2.5 Parallel Input Pin Hysteresis IN1,IN2 VIN,HYS 50 – 250 mV 1) 6.2.6 Parallel Input Pin Input Pull Down IIN_PD_H Current IN1, IN2 I 20 50 100 µA 2.40 – – µA VIN=5V VIN=0.6V VDScl 30 35 40 V IOUT1=0.02A Output Leakage Current in Off Mode, CH1 IDoff – – 3 µA VDS=13.5V; Tj=150°C Output Leakage Current in Off Mode, CH2 IDoff – Turn-on Delay Time CH1 tdON – IN_PD_L Clamping Voltage 6.2.7 Output Clamping Voltage CH1 Leakage Currents 6.2.8 6.2.9 1) 2) – 3 µA VDS=13.5V; Tj=150°C 1) Timing 6.2.10 0.25 1 µs Vs = 13.5V, IDS1 = 1.3A, resistive load 1) 3) 6.2.11 Turn-on Delay Time CH2 tdON 0.15 1.2 µs Vs = 13.5V, IDS2 = 0.3A, resistive load 1) 6.2.12 Turn-off Delay Time CH1 tdOFF – 0.65 1.5 µs Vs = 13,5V, IDS1= 1.3A, resistive load 1) 6.2.13 Turn-off Delay Time CH2 tdOFF – 0.35 1.5 µs Vs = 13.5V, IDS2 = 0.3A, resistive load 1) 6.2.14 Turn-on Time CH1 tsON – 0.45 1.2 µs Vs = 13.5V, IDS1 = 1.3A, resistive load 1) Data Sheet 15 Rev 1.0, 2012-10-01 TLE 8088 EM Power Drivers Electrical Characteristics (cont’d) VS = 13.5 V, Tj = -40 °C to +150 °C: All voltages with respect to ground. Positive current flowing into pin (unless otherwise specified). Pos. 6.2.15 Parameter Turn-on Time CH2 Symbol tsON Limit Values Min. Typ. Max. – 0.20 1 Unit Conditions µs Vs = 13.5V, IDS2 = 0.3A, resistive load 1) 6.2.16 Turn-off Time CH1 tsOFF – 0.40 1.2 µs Vs = 13.5V, IDS1 = 1.3A, resistive load 1) 6.2.17 Turn-off Time CH2 tsOFF – 0.20 1 µs Vs = 13.5V, IDS2 = 0.3A, resistive load 1) Over Current Protection 6.2.18 Output Current Switch Off Threshold CH1 IDS_OC 2.6 – 5 A 6V < VS < 18V 6.2.19 Output Current Switch off Threshold CH2 IDS_OC 3.0 – 6.5 A 6V < VS < 18V 6.2.20 Off Time of CH2 in Current Switch toff Off 3 – 8 ms – 6.2.21 Current Switch off Filter Time CH1, CH2 0.5 – 3 µs – tCL_f Open Load Diagnosis for CH 1 in OFF state 6.2.22 Open Load Detection Threshold Voltage for CH 1 VDSol 2.00 2.80 3.20 V – 6.2.23 Output pull-down Diagnosis Current IDpd 50 100 150 μA VDS = 13.5 V 6.2.24 Open Load Diagnosis Delay Time td 100 – 200 µs – – – 0.4 V V5DD – – – V INRO=100μA INRO=–100μA Status Signal 6.2.25 Low level output voltage 6.2.26 High level output voltage VOUT_L VOUT_H 0.4 6.2.27 Status settling time after Over Current tST,set,OC – – 20 µs 1) 6.2.28 Status Clear Time tST,clear – – 20 µs 1) TOT TOTH 150 – 200 °C 1) – 20 – °C 1) Over Temperature Protection 6.2.29 Over temperature 6.2.30 Over temperature hysteresis 1) Not subject to production test, specified by design. 2) in OFF mode open load diagnosis pull down current active 3) Definition see Figure 8 Data Sheet 16 Rev 1.0, 2012-10-01 TLE 8088 EM Power Drivers VINx 50% VOUTx t VBATT 80% 20% t tdON Figure 8 tsON t dOFF tsOFF Timing IN1 Open Load VDSol VDS ST t td Figure 9 t ST,clear Open Load Detection IN1 IDS_OC Over Current Switch-off I DS tCL_f ST t t ST,set,OC Figure 10 Data Sheet t ST,clear Over Current Detection 17 Rev 1.0, 2012-10-01 TLE 8088 EM K-Line 7 K-Line 7.1 K-Line The K-Line module is a serial link bus interface device designed to provide bi-directional half-duplex communication interfacing. It is designed to interface between the vehicles via the special ISO K-line and meets the ISO norm 9141 specification. The device's K line bus driver's output is protected against bus shorts. K-Line module transforms 5.0V micro-controller logic signals to battery level logic signals and vice versa. The over current limitation limits the current to a specified limit. In case of over-temperature on OUT1 the low-side switch and the output stage KIO will be switched off and can only be re-activated if the temperature has decreased below the minimum hysteresis value. . VS RX KIO V5DD TX Driver & Protection Figure 11 Data Sheet K-Line 18 Rev 1.0, 2012-10-01 TLE 8088 EM K-Line Electrical Characteristics: K-Line Table 2 Electrical Characteristics: K-Line VS = 13.5 V, Tj = -40 °C to +150 °C: All voltages with respect to ground. Positive current flowing into pin (unless otherwise specified). Pos. Parameter Symbol Limit Values Unit Conditions min. typ. max. – – 0.4 V V5DD- – – V IRX=100μA IRX=-100μA – 1.00 V – V – Output RX 7.1.1 Low Level Output Voltage 7.1.2 High Level Output Voltage VRX,L VRX,H 0.4 Input TX 7.1.3 Input Pin Low level 7.1.4 Input Pin High level 7.1.5 Input Pin Hysteresis 7.1.6 Input Pin Pull Up Current VTX,L VTX,H VTX,HYS IIN_PU 3.20 – 280 500 700 mV 1) -70 – -150 µA VTX=0 TX=low, RKIO=480Ω KIO input / Output 7.1.7 Low Level Output Voltage VKIO,L – – 1.4 V 7.1.8 Current Limitation 40 – 140 mA 7.1.9 Output Pull-Down current IKIO(lim) IKIO,PD 5 – 15 µA TX=high VIN_L VIN_H VIN_Hys – – 0.4*Vs V – 0.6*Vs – – V – 0.02*Vs – 0.175* V – fRKIO fTKIO tdrR – – 500 kHz CKIO=0pF – – 100 kHz – 0.05 – 0.5 µs CRX,load=1.6pF 2) 7.1.16 Off Delay / Rise time TX->KIO tdrT 0.05 – 0.5 µs CKIO,load=1.6pF 1) 2) 7.1.17 On Delay / Fall time KIO->RX tdfR 0.05 – 0.5 µs CRX,load=1.6pF 2) 7.1.18 On Delay / Fall time TX->KIO tdfT 0.05 – 0.5 µs CKIO,load=1.6pF 2) KIO Input Comparator 7.1.10 Input Low Voltage 7.1.11 Input High Voltage 7.1.12 Input Threshold Hysteresis Vs Transfer characteristics KIO->RX and TX->KIO CRX=25pF; RKIO=540Ω; CKIO<=1.3nF; Vs=13.5V 7.1.13 Transmission Frequency KIO->RX 7.1.14 Transmission Frequency TX->KIO 7.1.15 Off Delay / Rise Time KIO->RX 1) Not subject to production test, specified by design. 2) For definition see Figure 12 Data Sheet 19 Rev 1.0, 2012-10-01 TLE 8088 EM K-Line . VTX 50% VKIO tdrT t t dfT 70% 50% 30% t V RX 70% 30% tdrR Figure 12 Data Sheet tdfR t Transfer characteristics 20 Rev 1.0, 2012-10-01 Engine management IC TLE 8088 EM Application Information 8 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. ECU VBAT VBAT LOAD resistive LOAD inductive 510Ω 100µF 1 2 3 4 5 6 7 to µC to Loads 2.2nF 8 9 10 11 4.7nF 4.7nF 470nF 12 100nF Close to IC pin nc (1) GND KIO OUT2 OUT1 VS AGND WDE V5DD nc (1) (1) nc nc (1) TLE 8088 nc (1) GND RX TX IN1 IN2 ST WDI NRO nc (1) (1) nc nc (1) 24 23 22 21 20 19 18 to µC 17 16 15 14 13 (1) Pins marked as not connected (nc) are internally not bonded. Related pads can be used for facilitating the PCB routing. Figure 13 Application Diagram Note: This is a very simplified example of an application circuit. The function must be verified in the real application. 8.1 • Further Application Information For further information you may contact http://www.infineon.com/ Data Sheet 21 Rev 1.0, 2012-10-01 TLE 8088 EM Package Outlines 0.2 M 0.1 C D 0.08 C Seating Plane C A-B D 24x 6 ±0.2 0.2 M D 12 B 8.65 ±0.1 Index Marking 0.1 C A-B 2x 1 12 24 13 2.65 ±0.25 Bottom View 13 1 0.64 ±0.25 D A 24 3.9 ±0.11) 8˚ MAX. 2x 0.19 +0.06 0.35 x 45˚ 1.7 MAX. C 0.65 0.25 ±0.05 2) Stand Off (1.47) Package Outlines 0.1+0 -0.1 9 6.4 ±0.25 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion of 0.13 max. Figure 14 PG-SSOP-24 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations, the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 22 Dimensions in mm Rev 1.0, 2012-10-01 TLE 8088 EM Revision History 10 Revision History Revision Date Changes 1.0 2012-10-01 Data Sheet Release Data Sheet 23 Rev 1.0, 2012-10-01 Edition 2012-10-01 Published by Infineon Technologies AG 81726 Munich, Germany © 2012 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.