HA5023/883 TM Dual 125MHz Video Current Feedback Amplifier January 1995 Features Description • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. The HA5023/883 is a dual version of the popular Intersil HA-5020/883 except that it does not have an enable function. It features wide bandwidth and high slew rate, and is optimized for video applications and gains between 1 and 10. It is a current feedback amplifier and thus yields less bandwidth degradation at high closed loop gains than voltage feedback amplifiers. • Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . 125MHz • Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475V/µs • Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03% The low differential gain and phase, 0.1dB gain flatness, and ability to drive two back terminated 75Ω cables, make this amplifier ideal for demanding video applications. • Differential Phase . . . . . . . . . . . . . . . . . . . . . . 0.03 Deg. • Supply Current (per Amplifier) . . . . . . . . . . . . . . . 7.5mA • Crosstalk Rejection at 10MHz. . . . . . . . . . . . . . . . -60dB The current feedback design allows the user to take advantage of the amplifier’s bandwidth dependency on the feedback resistor. By reducing RF , the bandwidth can be increased to compensate for decreases at higher closed loop gains or heavy output loads. • ESD Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000V • Guaranteed Specifications at ±5V Supplies Applications • Video Gain Block Ordering Information • Video Distribution Amplifier/RGB Amplifier • Flash A/D Driver PART NUMBER • Current to Voltage Converter HA5023MJ/883 • Radar and Imaging Systems TEMPERATURE RANGE -55oC to +125oC PACKAGE 8 Lead CerDIP • Medical Imaging Pinout HA5023/883 (CERDIP) TOP VIEW -IN1 2 +IN1 3 V- 4 - + 1 + - OUT1 8 V+ 7 OUT2 6 -IN2 5 +IN2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved 1 Spec Number 511108-883 FN3730.1 Specifications HA5023/883 Absolute Maximum Ratings Thermal Information Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V Voltage at Either Input Terminal . . . . . . . . . . . . . . . . . . . . . . V+ to VOutput Current . . . . . . . . . . . . . . . . . . . Fully Short Circuit Protected Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . < 2000V Storage Temperature Range . . . . . . . . . . . . . . -65oC ≤ TA ≤ +150oC Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300oC Thermal Resistance θJA θJC CerDIP Package . . . . . . . . . . . . . . . . . 115oC/W 28oC/W Maximum Package Power Dissipation at +75oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.87W Package Power Dissipation Derating Factor above +75oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.7mW/oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Operating Conditions Operating Supply Voltage (±VS) . . . . . . . . . . . . . . . . . . . . ±5V to ±15V Operating Temperature Range. . . . . . . . . . . . .-55oC ≤ TA ≤ +125oC VINCM ≤ 1/2(V+ - V-) RL Š≥ 50Ω RF = 1kΩ TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RSOURCE = 0Ω, R L = 400Ω, VOUT = 0V, Unless Otherwise Specified. PARAMETERS Input Offset Voltage Common Mode Rejection Ratio Power Supply Rejection Ratio SYMBOL VIO CMRR PSRR Delta Input Offset Voltage Between Channels ∆VIO Non-Inverting Input (+IN) Current IBSP +IN Current Common Mode Sensitivity ∆Inverting Input (-IN) Current Between Channels Inverting Input (-IN) Current -IN Current Common Mode Sensitivity CONDITIONS TEMPERATURE MIN MAX UNITS 1 +25oC -3 3 mV VCM = 0V -5 5 mV 1 +25oC 53 - dB 2 +125oC 38 - dB ∆VCM = ±2.25V V+ = 2.75V, V- = -7.25V V+ = 7.25V, V- = -2.75V 3 -55oC 38 - dB ∆VSUP = ±1.5V V+ = 6.5V, V- = -5V V+ = 3.5V, V- = -5V 1 +25oC 60 - dB 55 - dB - 3.5 mV - 3.5 mV -8 8 µA -20 20 µA ∆VCM = ±2.5V V+ = 2.5V, V- = -7.5V V+ = 7.5V, V- = -2.5V 2, 3 VCM = 0 1 VCM = 0V 1 -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC - 0.15 µA/V 2 +125oC - 2.0 µA/V ∆VCM = ±2.25V V+ = 2.75V, V- = -7.25V V+ = 7.25V, V- = -2.75V 3 -55oC - 2.0 µA/V VCM = 0 1 +25oC -15 15 µA -30 30 µA -12 12 µA -30 30 µA VCM = 0V 1 2, 3 CMS IBN +125oC, 1 ∆VCM = ±2.5V V+ = 2.5V, V- = -7.5V V+ = 7.5V, V- = -2.5V 2, 3 IBSN o +125 C, -55 C 2, 3 ∆IBSN o 2, 3 2,3 CMS IBP LIMITS GROUP A SUBGROUPS ∆VCM = ±2.5V V+ = 2.5V, V- = -7.5V V+ = 7.5V, V- = -2.5V ∆VCM = ±2.25V V+ = 2.75V, V- = -7.25V V+ = 7.25V, V- = -2.75V +125oC, -55oC +25oC +125oC, -55oC o 1 +25 C - 0.4 µA/V 2 +125oC - 5 µA/V 3 -55oC - 5 µA/V Spec Number 2 511108-883 Specifications HA5023/883 TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RSOURCE = 0Ω, R L = 400Ω, VOUT = 0V, Unless Otherwise Specified. PARAMETERS SYMBOL -IN Current Power Supply Sensitivity PSSIBN +IN Current Power Supply Sensitivity PSSIBP Output Voltage Swing +ISC MIN MAX UNITS 1 +25oC - 0.2 µA/V - 0.5 µA/V - 0.1 µA/V - 0.3 µA/V 2.5 - V 2.5 - V - -2.5 V - -2.5 V 50 - mA 50 - mA - -40 mA - -40 mA 20 - mA 16.6 - mA - -20 mA 2, 3 ∆VSUP = ±1.5V V+ = 6.5V, V- = -5V V+ = 3.5V, V- = -5V AV = +1 RL = 150Ω 1 2, 3 VIN = -3V 1 VIN = -3V 2, 3 VIN = +3V 1 VIN = +3V 2, 3 VIN = ±2.5V VOUT = 0V 1 2, 3 VIN = ±2.5V VOUT = 0V -ISC Output Current TEMPERATURE ∆VSUP = ±1.5V V+ = 6.5V, V- = -5V V+ = 3.5V, V- = -5V AV = +1 RL = 150Ω VOP VON Short Circuit Output Current CONDITIONS +IOUT 1 2, 3 Note 1 1 2, 3 -IOUT Quiescent Power Supply Current Note 1 1 C, -55 C +25oC o o +125 C, -55 C o +25 C +125oC, -55oC o +25 C o o +125 C, -55 C oC +25 +125oC, -55oC o +25 C +125oC, -55oC +25oC o o 1 - 10 mA/Op Amp - 10 mA/Op Amp -10 - mA/Op Amp 1 RL = 400Ω VOUT = ±2.5V o mA +125oC, -55oC o +25 C +125oC, -55oC -10 - mA/Op Amp oC 1 - MΩ o +25 2, 3 +125 C 0.5 - MΩ 3 -55oC 0.5 - MΩ 1 oC 1 - MΩ o VOUT = ±2.25V -AZOL1 +125o -16.6 1 RL = 400Ω VOUT = ±2.5V +25oC - RL = 400Ω +A ZOL1 C, -55 C +25oC 2, 3 Transimpedance o +125 C, -55 C 2, 3 IEE +125o 2, 3 RL = 400Ω ICC LIMITS GROUP A SUBGROUPS +25 2, 3 +125 C 0.5 - MΩ 3 -55oC 0.5 - MΩ VOUT = ±2.25V NOTE: 1. Guaranteed from V OUT Test with RL = 150Ω, by: IOUT = VOUT /150Ω. TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Table 2 Intentionally Left Blank. Spec Number 3 511108-883 Specifications HA5023/883 TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Device Characterized at: VSUPPLY = ±5V, AV = +2, RF = 681Ω, RL = 400Ω, Unless Otherwise Specified. LIMITS PARAMETERS SYMBOL -3dB Bandwidth Gain Flatness Slew Rate MIN MAX UNITS 1 +125oC, -55oC 62 - MHz BW(+2) AV = +2, VOUT = 100mV RMS 1 +125oC, -55oC 62 - MHz GF5 AV = +2, f ≤5MHz VOUT = 100mV RMS 1 +125oC, -55oC - ±0.045 dB GF10 AV = +2, f ≤10MHz VOUT = 100mV RMS 1 +125oC, -55oC - ±0.085 dB GF20 AV = +2, f ≤20MHz VOUT = 100mV RMS 1 +125oC, -55oC - ±0.65 dB +SR(+1) AV = +1, RF = 1K VOUT = -2V to +2V 1, 4 +125oC, -55oC 250 - V/µs -SR(+1) AV = +1, RF = 1K VOUT = +2V to -2V 1, 4 +125oC, -55oC 240 - V/µs +SR(+2) AV = +2, VOUT = -2V to +2V 1, 4 +125oC, -55oC 400 - V/µs 1, 4 +125oC, -55oC 360 - V/µs 1, 2 +125oC, -55oC - 6.5 ns TF +OS -OS Propagation Delay TEMPERATURE AV = +1, RF = 1K VOUT = 100mV RMS TR Overshoot NOTES BW(+1) -SR(+2) Rise and Fall Time CONDITIONS AV = +2, VOUT = +2V to -2V AV = +2, VOUT = -0.5V to +0.5V AV = +2, VOUT = +0.5V to -0.5V AV = +2, VOUT = -0.5V to +0.5V AV = +2, VOUT = +0.5V to -0.5V o o 1, 2 +125 C, -55 C - 6.5 ns 1, 3 +125oC, -55oC - 35 % 1, 3 +125oC, -55oC - 27 % o o +TP AV = +2, RF = 681Ω VOUT = 0V to 1V 1, 2 +125 C, -55 C - 9.5 ns -TP AV = +2, RF = 681Ω VOUT = 1V to 0V 1, 2 +125oC, -55oC - 9.0 ns NOTES: 1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot-to-lot and within lot variation. 2. Measured between 10% and 90% points. 3. For 200ps input transition times. Overshoot decreases as input transition times increase, especially for A V = +1. Please refer to Performance Curves. 4. Measured between 25% and 75% points. TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STD-883 TEST REQUIREMENTS SUBGROUPS (SEE TABLE 1) Interim Electrical Parameters (Pre Burn-In) 1 Final Electrical Test Parameters 1 (Note 1), 2, 3, 4 Group A Test Requirements 1, 2, 3, 4 Groups C and D Endpoints 1 NOTE: 1. PDA applies to Subgroup 1 only. Spec Number 4 511108-883 HA5023/883 Test Circuits and Waveforms V+ + ICC 10 0.1 510 VIN K1 NC K2 = POSITION 1: VX VIO = 100 VX x100 K2 = POSITION 2: VX -IBIAS = 50K +IBIAS = 0.1 0.1 0.1 1K 0.1 100 6, 2 + - 470pF 200pF 1K 2 K2 8 - 5, 3 1 510 1K 7 DUT + 400 4 K5 100K (0.01%) VZ 100K VZ + 0.1 + VOUT 100 10 NOTE: All Resistors = ±1% (Ω) All Capacitors = ±10% (µF) Unless Otherwise Noted Chip Components Recommended 0.1 IEE HA-5177 K6 V- FIGURE 1. TEST CIRCUIT (Applies to Table 1) + - DUT 50 HP4195 NETWORK ANALYZER 50 FIGURE 2. TEST CIRCUIT FOR TRANSIMPEDANCE MEASUREMENTS VIN + VIN DUT VOUT - 50Ω + 50Ω RL 100Ω RI 681Ω DUT VOUT - RL 400Ω RF , 681 RF , 1K FIGURE 4. LARGE SIGNAL PULSE RESPONSE CIRCUIT FIGURE 3. SMALL SIGNAL PULSE RESPONSE CIRCUIT FIGURE 5. SMALL SIGNAL RESPONSE Vertical Scale: VIN = 100mV/Div., VOUT = 100mV/Div. Horizontal Scale: 20ns/Div. FIGURE 6. LARGE SIGNAL RESPONSE Vertical Scale: VIN = 1V/Div., VOUT = 1V/Div. Horizontal Scale: 50ns/Div. Spec Number 5 511108-883 HA5023/883 Burn-In Circuit HA5023MJ/883 CERAMIC DIP R3 D3 1 R2 2 R1 3 D4 D2 7 + + 4 V- V+ 8 C2 C1 D1 R6 6 5 R5 R4 NOTES: R1 = R2 = R4 = R5 = 1kΩ, ±5% (Per Socket) R3 = R6 = 10kΩ, ±5% (Per Socket) C1 = C2 = 0.01µF (Per Socket) or 0.1µF (Per Row) Minimum D1 = D2 = 1N4002 or Equivalent (Per Board) D3 = D4 = 1N4002 or Equivalent (Per Socket) V+ = +5.5V ± 0.5V V- = -5.5V ± 0.5V Spec Number 6 511108-883 HA5023/883 Die Characteristics DIE DIMENSIONS: 65 x 100 x 19 mils ± 1 mils 1650 x 2540 x 483µm ± 25.4µm METALLIZATION: Type: Metal 1: AlCu (1%), Metal 2: AlCu (1%) Thickness: Metal 1: 8kÅ ± 0.4kÅ, Metal 2: 16kÅ ± 0.8kÅ WORST CASE CURRENT DENSITY: 1.9 x 105 A/cm2 at 15mA SUBSTRATE POTENTIAL (Powered Up): VGLASSIVATION: Type: Nitride Thickness: 4kÅ ± 0.4kÅ TRANSISTOR COUNT: 124 PROCESS: Bipolar Dielectric Isolation Metallization Mask Layout NC OUT HA5023/883 V+ -IN1 +IN1 NC OUT2 NC -IN +IN V- Spec Number 7 511108-883 HA5023/883 Ceramic Dual-In-Line Frit Seal Packages (CerDIP) BASE METAL E M (b) -BC A-B S INCHES (c) b1 M SECTION A-A D S D BASE PLANE -C- SEATING PLANE Q A L S1 α eA A A b2 b ccc M MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A) 8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE -D- -A- bbb S F8.3A LEAD FINISH c1 C A-B S e D S eA/2 c aaa M C A - B S D S SYMBOL MIN MAX MIN MAX NOTES A - 0.200 - 5.08 - b 0.014 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 D - 0.405 - 10.29 5 E 0.220 0.310 5.59 7.87 5 e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC - 3.81 BSC - eA/2 NOTES: L 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. MILLIMETERS 0.150 BSC 0.125 0.200 3.18 5.08 - Q 0.015 0.060 0.38 1.52 6 S1 0.005 - 0.13 - 7 α 90o 105o 90o 105o - aaa - 0.015 - 0.38 - bbb - 0.030 - 0.76 - 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. ccc - 0.010 - 0.25 - M - 0.0015 - 0.038 2, 3 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. N 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 8 8 8 Rev. 0 4/94 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH. Spec Number 8 511108-883 HA5023 TM DESIGN INFORMATION Dual 125MHz Video Current Feedback Amplifier January 1995 The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified. +5 +5 NORMALIZED GAIN (dB) +4 +3 AV = 2, R F = 681Ω +2 AV = 1, RF = 1kΩ AV = 5, RF = 1kΩ +1 0 -1 -2 -3 +3 AV = -1 +2 +1 AV = -2 0 -1 -2 AV = -10 -3 AV = 10, RF = 383Ω -4 -5 VOUT = 0.2VP-P CL = 10pF RF = 750Ω +4 NORMALIZED GAIN (dB) VOUT = 0.2VP-P CL = 10pF AV = -5 -4 2 10 FREQUENCY (MHz) 100 -5 200 FIGURE 1. NON-INVERTING FREQENCY RESPONSE 2 10 FREQUENCY (MHz) 100 200 FIGURE 2. INVERTING FREQUENCY RESPONSE +135 -45 -90 +90 AV = -1, R F = 750Ω -135 +45 AV = +10, RF = 383Ω -100 0 -225 -45 -270 -90 AV = -10, RF = 750Ω -315 -135 VOUT = 0.2VP-P CL = 10pF -360 2 130 120 100 -3dB BANDWIDTH 10 5 -180 10 FREQUENCY (MHz) VOUT = 0.2VP-P CL = 10pF AV = +1 GAIN PEAKING (dB) +180 -3dB BANDWIDTH (MHz) AV = +1, RF = 1kΩ INVERTING PHASE (DEGREES) NONINVERTING PHASE (DEGREES) 140 0 GAIN PEAKING 200 500 FIGURE 3. PHASE RESPONSE AS A FUNCTION OF FREQUENCY 700 900 1100 1300 FEEDBACK RESISTOR (Ω) 0 1500 FIGURE 4. BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE 9 HA5023 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified. (Continued) 130 -3dB BANDWIDTH 90 10 5 GAIN PEAKING 350 500 -3dB BANDWIDTH 110 6 100 4 90 80 0 1100 650 800 950 FEEDBACK RESISTOR (Ω) 0 200 400 600 800 2 0 1000 FIGURE 6. BANDWIDTH AND GAIN PEAKING vs LOAD RESISTANCE 80 16 VOUT = 0.2VP-P CL = 10pF AV = +10 VOUT = 0.1VP-P CL = 10pF VSUPPLY = ±5V, AV = +2 OVERSHOOT (%) 60 40 20 0 VOUT = 0.2VP-P CL = 10pF AV = +1 GAIN PEAKING LOAD RESISTOR (Ω) FIGURE 5. BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE -3dB BANDWIDTH (MHz) 120 GAIN PEAKING (dB) 95 -3dB BANDWIDTH (MHz) VOUT = 0.2VP-P CL = 10pF AV = +2 GAIN PEAKING (dB) -3dB BANDWIDTH (MHz) 100 12 VSUPPLY = ±15V, AV = +2 6 VSUPPLY = ±5V, AV = +1 VSUPPLY = ±15V, AV = +1 200 350 500 650 FEEDBACK RESISTOR (Ω) 800 0 0 950 FIGURE 7. BANDWIDTH vs FEEDBACK RESISTANCE 200 400 600 LOAD RESISTANCE (Ω) 800 FIGURE 8. SMALL SIGNAL OVERSHOOT vs LOAD RESISTANCE 10 1000 HA5023 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified. (Continued) 0.10 0.08 FREQUENCY = 3.58MHz 0.08 DIFFERENTIAL PHASE (DEGREES) DIFFERENTIAL GAIN (%) FREQUENCY = 3.58MHz RL = 75Ω 0.06 RL = 150Ω 0.04 0.02 RL = 1kΩ 0.00 3 5 7 9 11 SUPPLY VOLTAGE (V) 13 0.02 RL = 1kΩ VOUT = 2.0VP-P CL = 30pF REJECTION RATIO (dB) HD2 HD3 -80 1 FREQUENCY (MHz) -40 CMRR -50 -60 NEGATIVE PSRR -70 POSITIVE PSRR 0.01 0.1 FREQUENCY (MHz) 1 10 30 RLOAD = 100Ω VOUT = 1.0VP-P 7.5 7.0 6.5 0 +25 +50 TEMPERATURE (oC) -30 12 PROPAGATION DELAY (ns) PROPAGATION DELAY (ns) 15 FIGURE 12. REJECTION RATIOS vs FREQUENCY RL = 100Ω VOUT = 1.0VP-P AV = +1 -25 13 -20 0.001 10 FIGURE 11. DISTORTION vs FREQUENCY -50 7 9 11 SUPPLY VOLTAGE (V) AV = +1 -80 HD3 6.0 5 -10 3RD ORDER IMD 8.0 3 0 -60 -90 0.3 RL = 75Ω FIGURE 10. DIFFERENTIAL PHASE vs SUPPLY VOLTAGE HD2 DISTORTION (dBc) RL = 150Ω 0.00 -50 -70 0.04 15 FIGURE 9. DIFFERENTIAL GAIN vs SUPPLY VOLTAGE -40 0.06 +75 +100 10 AV = +10, RF = 383Ω 8 AV = +2, RF = 681Ω 6 AV = +1, RF =1kΩ 4 +125 FIGURE 13. PROPAGATION DELAY vs TEMPERATURE 3 5 7 9 11 SUPPLY VOLTAGE (V) 13 15 FIGURE 14. PROPAGATION DELAY vs SUPPLY VOLTAGE 11 HA5023 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified. (Continued) +0.8 500 VOUT = 20VP-P +0.4 + SLEW RATE 350 - SLEW RATE 300 250 200 150 -0.4 AV= +5, RF = 1kΩ -0.6 AV = +1, RF = 1kΩ -0.8 -50 -25 0 +25 +50 +75 TEMPERATURE (oC) +100 -1.2 +125 FIGURE 15. SLEW RATE vs TEMPERATURE +0.2 AV = -1 0 -0.2 -0.4 -0.6 AV = -5 -0.8 -1.0 15 20 FREQUENCY (MHz) 30 1000 -INPUT NOISE CURRENT 80 800 600 60 +INPUT NOISE CURRENT 400 40 +INPUT NOISE VOLTAGE 200 20 10 15 20 25 0 0.01 30 0.1 1 10 0 100 FREQUENCY (kHz) FREQUENCY (MHz) FIGURE 17. INVERTING GAIN FLATNESS vs FREQUENCY FIGURE 18. INPUT NOISE CHARACTERISTICS 1.5 BIAS CURRENT (µA) 2 VIO (mV) 1.0 0.5 0.0 -60 25 AV = -2 AV = -10 5 10 AV = 10, RF = 383Ω VOLTAGE NOISE (nV/√Hz) +0.4 5 100 VOUT = 0.2VP-P CL = 10pF RF = 750Ω +0.6 AV = 10, RF =383Ω FIGURE 16. NON-INVERTING GAIN FLATNESS vs FREQUENCY +0.8 NORMALIZED GAIN (dB) A V= +2, R F = 681Ω 0 -0.2 -1.0 100 -1.2 +0.2 CURRENT NOISE (pA/√Hz) 400 VOUT = 0.2VP-P CL = 10pF +0.6 NORMALIZED GAIN (dB) SLEW RATE (V/µs) 450 -40 -20 0 +20 +40 +60 0 -2 -4 -60 +80 +100 +120 +140 TEMPERATURE ( oC) -40 -20 0 +20 +40 +60 +80 +100 +120 +140 TEMPERATURE (o C) FIGURE 19. INPUT OFFSET VOLTAGE vs TEMPERATURE FIGURE 20. +INPUT BIAS CURRENT vs TEMPERATURE 12 HA5023 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified. (Continued) 4000 TRANSIMPEDANCE (kΩ) BIAS CURRENT (µA) 22 20 18 16 -60 -40 -20 0 +20 +40 +60 3000 2000 1000 -60 +80 +100 +120 +140 -40 -20 0 TEMPERATURE (oC) FIGURE 21. -INPUT BIAS CURRENT vs TEMPERATURE 20 72 +55oC REJECTION RATIO (dB) ICC (mA) +60 +80 +100 +120 +140 74 +125 oC 15 10 3 4 5 6 7 +PSRR 70 68 -PSRRN 66 64 62 CMRR 60 +25o C 8 9 10 11 12 13 14 58 -100 15 -50 0 +50 +100 +150 +200 +250 TEMPERATURE ( oC) SUPPLY VOLTAGE (V) FIGURE 23. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 24. REJECTION RATIO vs TEMPERATURE 4.0 +10V +5V 30 OUTPUT SWING (V) 40 SUPPLY CURRENT (mA) +40 FIGURE 22. TRANSIMPEDANCE vs TEMPERATURE 25 5 +20 TEMPERATURE (oC) +15V 20 3.8 10 0 0 1 2 3 4 5 6 7 8 3.6 -60 9 10 11 12 13 14 15 -40 -20 0 +20 +40 +60 +80 +100 +120 +140 TEMPERATURE (oC) DISABLE INPUT VOLTAGE (V) FIGURE 25. SUPPLY CURRENT vs DISABLE INPUT VOLTAGE FIGURE 26. OUTPUT SWING vs TEMPERATURE 13 HA5023 Typical Performance Curves VSUPPLY = ±5V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = 25oC, Unless Otherwise Specified. (Continued) 30 1.2 VCC = ±15V 1.1 VIO (mV) VOUT (VP-P) 20 VCC = ±10V 1.0 10 0.9 VCC = ±4.5V 0.8 0 0.01 0.10 1.00 10.00 -60 -40 -20 FIGURE 27. OUTPUT SWING vs LOAD RESISTANCE +20 +40 +60 +80 +100 +120 +140 FIGURE 28. INPUT OFFSET VOLTAGE CHANGE BETWEEN CHANNELS vs TEMPERATURE -30 1.5 AV = +1 VOUT = 2VP-P -40 1.0 SEPARATION (dBc) ∆BIAS CURRENT (µA) 0 TEMPERATURE (o C) LOAD RESISTANCE (kΩ) 0.5 -50 -60 -70 0.0 -60 -40 -20 -80 0.1 0 +20 +40 +60 +80 +100 +120 +140 TEMPERATURE (oC) FIGURE 29. INPUT BIAS CURRENT CHANGE BETWEEN CHANNELS vs TEMPERATURE 1 FREQUENCY (MHz) 10 FIGURE 30. CHANNEL SEPARATION vs FREQUENCY 14 30 RL = 100Ω 1 -20 -30 -40 -50 -60 -70 0.1 0.01 180 0.001 135 90 45 0 -45 -80 -90 0.1 1 FREQUENCY (MHz) 10 0.001 20 FIGURE 31. DISABLE FEEDTHROUGH vs FREQUENCY 0.1 0.01 180 0.001 135 90 45 0 -45 PHASE ANGLE (DEGREES) RL = 400Ω 1 -90 0.001 0.01 0.1 1 10 100 0.01 0.1 1 10 FREQUENCY (MHz) -135 100 FIGURE 32. TRANSIMPEDANCE vs FREQUENCY 10 TRANSIMPEDANCE (MΩ) PHASE ANGLE (DEGREES) TRANSIMPEDANCE (MΩ) -10 FEEDTHROUGH (dB) 10 DISABLE = 0V VIN = 5VP-P RF = 750Ω 0 -135 FREQUENCY (MHz) FIGURE 33. TRANSIMPEDENCE vs FREQUENCY 15 HA5023 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied. Application Information mended that the ground plane be removed under traces connected to -IN, and that connections to -IN be kept as short as possible to minimize the capacitance from this node to ground. Optimum Feedback Resistor The plots of inverting and non-inverting frequency response, see Figure 1 and Figure 2 in the typical performance section, illustrate the performance of the HA5023 in various closed loop gain configurations. Although the bandwidth dependency on closed loop gain isn’t as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier’s unique relationship between bandwidth and RF . All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF , in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier’s bandwidth is inversely proportional to R F . The HA5023 design is optimized for a 1000Ω RF at a gain of +1. Decreasing RF in a unity gain application decreases stability, resulting in excessive peaking and overshoot. At higher gains the amplifier is more stable, so RF can be decreased in a trade-off of stability for bandwidth. Driving Capacitive Loads Capacitive loads will degrade the amplifier’s phase margin resulting in frequency response peaking and possible oscillations. In most cases the oscillation can be avoided by placing an isolation resistor (R) in series with the output as shown in Figure 34. VIN RF (Ω) BANDWIDTH (MHz) -1 750 100 +1 1000 125 +2 681 95 +5 1000 52 +10 383 65 -10 750 22 VOUT - RT CL RF RI FIGURE 34. PLACEMENT OF THE OUTPUT ISOLATION RESISTOR, R The table below lists recommended R F values for various gains, and the expected bandwidth. GAIN (ACL ) R + The selection criteria for the isolation resistor is highly dependent on the load, but 27Ω has been determined to be a good starting value. Power Dissipation Considerations Due to the high supply current inherent in dual amplifiers, care must be taken to insure that the maximum junction temperature (TJ , see Absolute Maximum Ratings) is not exceeded. Figure 35 shows the maximum ambient temperature versus supply voltage for the available package styles. It is recommended that thermal calculations, which take into account output power, be performed by the designer. PC Board Layout MAX. AMBIENT TEMPERATURE (oC) 165 The frequency response of this amplifier depends greatly on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended. If leaded components are used the leads must be kept short especially for the power supply decoupling components and those components connected to the inverting input. Attention must be given to decoupling the power supplies. A large value (10µF) tantalum or electrolytic capacitor in parallel with a small value (0.1µF) chip capacitor works well in most cases. A ground plane is strongly recommended to control noise. Care must also be taken to minimize the capacitance to ground seen by the amplifier’s inverting input (-IN). The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. It is recom- 155 CERDIP 145 135 125 5 7 9 11 13 15 SUPPLY VOLTAGE (V) FIGURE 35. MAXIMUM OPERATING AMBIENT TEMPERATURE vs SUPPLY VOLTAGE 16 Specifications HA5023 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied. Electrical Specifications V+ = +5V, V- = -5V, RF = 1kΩ, AV = +1, RL = 400Ω, C L ≤10pF, Unless Otherwise Specified HA5023I (NOTE 16) TEST LEVEL TEMPERATURE MIN TYP MAX UNITS A +25oC - 0.8 3 mV A Full - - 5 mV Delta VIO Between Channels A Full - 1.2 3.5 mV Average Input Offset Voltage Drift B Full - 5 - µV/oC VIO Common Mode Rejection Ratio (Note 3) A +25oC 53 - - dB A Full PARAMETER INPUT CHARACTERISTICS Input Offset Voltage (VIO) VIO Power Supply Rejection Ratio (Note 4) Input Common Mode Range (Note 3) Non-Inverting Input (+IN) Current +IN Common Mode Rejection (Note 3) (+IBCMR = 1 ) +RIN +IN Power Supply Rejection (Note 4) 50 - - dB A o +25 C 60 - - dB A Full 55 - - dB A Full ±2.5 - - V A o +25 C - 3 8 µA A Full - - 20 µA - - 0.15 µA/V A +25 A Full - - 0.5 µA/V A +25oC - - 0.1 µA/V - - 0.3 µA/V A Inverting Input (-IN) Current Delta - IN BIAS Current Between Channels -IN Common Mode Rejection (Note 3) -IN Power Supply Rejection (Note 4) Input Noise Voltage (f = 1kHz) +Input Noise Current (f = 1kHz) -Input Noise Current (f = 1kHz) oC Full o o A +25 C, +85 C - 4 12 µA A -40oC A +25oC, - 10 30 µA +85oC - 6 15 µA o A -40 C - 10 30 µA A +25oC - - 0.4 µA/V A Full - - 1.0 µA/V A o +25 C - - 0.2 µA/V A Full - - 0.5 µA/V B +25o C - 4.5 - nV/√Hz B o +25 C - 2.5 - pA/√Hz B +25oC - 25.0 - pA/√Hz A +25oC 1.0 - - MΩ A Full 0.85 - - MΩ A o +25 C 70 - - dB A Full 65 - - dB A +25oC 50 - - dB A Full 45 - - dB TRANSFER CHARACTERISTICS Transimpedence (Note 14) Open Loop DC Voltage Gain, RL = 400Ω, VOUT = ±2.5V Open Loop DC Voltage Gain, RL = 100Ω, VOUT = ±2.5V OUTPUT CHARACTERISTICS 17 Specifications HA5023 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied. Electrical Specifications V+ = +5V, V- = -5V, RF = 1kΩ, AV = +1, RL = 400Ω, C L ≤10pF, Unless Otherwise Specified (ContinHA5023I (NOTE 16) TEST LEVEL TEMPERATURE MIN TYP MAX UNITS A +25oC ±2.5 ±3.0 - V A Full ±2.5 ±3.0 - V Output Current (Note 13) B Full ±16.6 ±20.0 - mA Output Current (Short Circuit, Note 10) A Full ±40 ±60 - mA Supply Voltage Range A +25oC 5 - 15 V Quiescent Supply Current A Full - 7.5 10 mA/Op Amp Slew Rate (Note 5) B +25oC 275 350 - V/µs Full Power Bandwidth (Note 6) B +25oC 22 28 - MHz Rise Time (Note 7) B +25oC - 6 - ns Fall Time (Note 7) B +25oC - 6 - ns Propagation Delay (Note 7) B +25oC - 6 - ns Overshoot B +25oC - 4.5 - % -3dB Bandwidth (Note 8) B +25oC - 125 - MHz Settling Time to 1%, 2V Output Step B +25oC - 50 - ns Settling Time to 0.25%, 2V Output Step B +25oC - 75 - ns Slew Rate (Note 5) B +25oC - 475 - V/µs Full Power Bandwidth (Note 6) B +25oC - 26 - MHz Rise Time (Note 7) B +25oC - 6 - ns Fall Time (Note 7) B +25oC - 6 - ns Propagation Delay (Note 7) B +25oC - 6 - ns Overshoot B +25oC - 12 - % -3dB Bandwidth (Note 8) B +25oC - 95 - MHz Settling Time to 1%, 2V Output Step B +25oC - 50 - ns Settling Time to 0.25%, 2V Output Step B +25oC - 100 - ns 5MHz B +25oC - 0.02 - dB 20MHz B +25oC - 0.07 - dB Slew Rate (Note 5) B +25oC 350 475 - V/µs Full Power Bandwidth (Note 6) B +25oC 28 38 - MHz Rise Time (Note 7) B +25oC - 8 - ns Fall Time (Note 7) B +25oC - 9 - ns Propagation Delay (Note 7) B +25oC - 9 - ns PARAMETER Output Voltage Swing (Note 13) POWER SUPPLY CHARACTERISTICS AC CHARACTERISTICS (AV = +1) AC CHARACTERISTICS (AV = +2, R F = 681Ω) Gain Flatness AC CHARACTERISTICS (AV = +10, RF = 383Ω) 18 Specifications HA5023 Electrical Specifications V+ = +5V, V- = -5V, RF = 1kΩ, AV = +1, RL = 400Ω, C L ≤10pF, Unless Otherwise Specified (Contin- PARAMETER Overshoot -3dB Bandwidth (Note 8) Settling Time to 1%, 2V Output Step Settling Time to 0.1%, 2V Output Step HA5023I (NOTE 16) TEST LEVEL TEMPERATURE MIN TYP MAX UNITS B +25oC - 1.8 - % B +25o C - 65 - MHz B o +25 C - 75 - ns B +25oC - 130 - ns B +25oC - 0.03 - % B +25oC - 0.03 - Degrees VIDEO CHARACTERISTICS Differential Gain (Notes 11, 13) Differential Phase (Notes 11, 13) NOTES: 1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional operation under any of these conditions is not necessarily implied. 2. Output is protected for short circuits to ground. Brief short circuits to ground will not degrade reliability, however, continuous (100% duty cycle) output current should not exceed 15mA for maximum reliability. 3. V CM = ±2.5V. At -40oC Product is tested at VCM = ±2.25V because Short Test Duration does not allow self heating. 4. ±3.5V ≤ VS ≤ ±6.5V 5. VOUT switches from -2V to +2V, or from +2V to -2V. Specification is from the 25% to 75% points. Slew Rate 6. FPBW = ----------------------------- ; V = 2V PEAK 2πV PEAK 7. RL = 100Ω, VOUT = 1V. Measured from 10% to 90% points for rise/fall times; from 50% points of input and output for propagation delay. 8. RL = 400Ω, VOUT = 100mV. 9. A. Production Tested; B. Guaranteed Limit or Typical based on characterization; C. Design Typical for information only. 10. V IN = ±2.5V, VOUT = 0V. 11. Measured with a VM700A video tester using an NTC-7 composite VITS. 12. Maximum power dissipation, including output load, must be designed to maintain junction temperature below +175oC for die, and below +150oC for plastic packages. See Applications Information section for safe operating area information. 13. RL = 150Ω . 14. V OUT = ±2.5V. At -40oC Product is tested at VOUT = ±2.25V because Short Test Duration does not allow self heating. 15. ESD protection is for human body model tested per MIL-STD - 883, Method 3015.7. 16. A. Production Tested; B. Guaranteed limit or Typical based on characterization; C. Design Typical for information only. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 19