54AC11030, 74AC11030 8-INPUT POSITIVE-NAND GATES SCAS001A – JUNE 1987 – REVISED APRIL 1993 • • • • • 54AC11030 . . . J PACKAGE 74AC11030 . . . D OR N PACKAGE (TOP VIEW) Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs C B A GND Y NC NC D NC C NC B Y = A • B • C • D • E • F • G • H or Y=A+B+C+D+E+F+G+H FUNCTION TABLE INPUTS A THRU H OUTPUT Y D E F G H 12 4 11 5 10 6 9 7 8 All inputs H L One or more inputs L H 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 G NC H NC NC NC – No internal connection logic symbol† C 3 D E F VCC NC G H A GND NC Y NC The 54AC11030 is characterized for operation over the full military temperature range of – 55°C to 125°C. The 74AC11030 is characterized for operation from – 40°C to 85°C. B 13 E F NC V CC NC These devices contain a single 8-input NAND gate and perform the following Boolean functions in positive logic: 3 14 2 54AC11030 . . . FK PACKAGE (TOP VIEW) description A 1 logic diagram (positive logic) & A 2 B 1 C 14 5 13 D Y 12 E F 9 G 8 H 3 2 1 14 13 5 Y 12 9 8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. EPIC is a trademark of Texas Instruments Incorporated. Copyright 1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–1 54AC11030, 74AC11030 8-INPUT POSITIVE-NAND GATES SCAS001A – JUNE 1987 – REVISED APRIL 1993 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mA Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. recommended operating conditions 54AC11030 VCC Supply voltage VIH High-level input voltage VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V NOM MAX MIN NOM MAX 3 5 5.5 3 5 5.5 2.1 2.1 3.15 3.15 3.85 3.85 VIL Low-level input voltage VI VO Input voltage 0 Output voltage 0 IOH High-level output current IOL Low-level output current ∆t /∆v Input transition rise or fall rate TA Operating free-air temperature 2–2 74AC11030 MIN VCC = 4.5 V VCC = 5.5 V 0.9 0.9 1.35 1.65 VCC = 3 V VCC = 4.5 V V 1.65 0 0 VCC VCC –4 –4 – 24 – 24 VCC = 5.5 V VCC = 3 V – 24 – 24 12 12 VCC = 4.5 V VCC = 5.5 V 24 24 POST OFFICE BOX 655303 V V 1.35 VCC VCC UNIT 24 V V mA mA 24 0 10 0 10 ns/ V – 55 125 – 40 85 °C • DALLAS, TEXAS 75265 54AC11030, 74AC11030 8-INPUT POSITIVE-NAND GATES SCAS001A – JUNE 1987 – REVISED APRIL 1993 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOH = – 50 µA IOH = – 24 mA A IOH = – 50 mA† IOH = – 75 mA† 54AC11030 MIN 74AC11030 MAX 2.9 2.9 4.5 V 4.4 4.4 4.4 5.5 V 5.4 5.4 5.4 3V 2.58 2.4 2.48 4.5 V 3.94 3.7 3.8 5.5 V 4.94 4.7 4.8 3.85 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 5.5 V 0.1 0.1 0.1 3V 0.36 0.5 0.44 4.5 V 0.36 0.5 0.44 5.5 V 0.36 0.5 0.44 IOL = 50 mA† IOL = 75 mA† 5.5 V II ICC VI = VCC or GND VI = VCC or GND, 5.5 V Ci VI = VCC or GND UNIT V 3V IOL = 12 mA V 1.65 5.5 V IO = 0 MAX 3.85 5.5 V IOL = 24 mA MIN 2.9 5.5 V IOL = 50 µA VOL TA = 25°C TYP MAX 3V IOH = – 4 mA VOH MIN 1.65 ± 0.1 ±1 ±1 µA 4 80 40 µA 5.5 V 5V 3.5 pF † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL Any Y MIN TA = 25°C TYP MAX 54AC11030 74AC11030 MIN MAX MIN MAX 1.5 6.9 9.1 1.5 10.6 1.5 9.9 1.5 6.4 8.8 1.5 10.6 1.5 9.8 UNIT ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL Any Y TA = 25°C MIN TYP MAX 54AC11030 74AC11030 MIN MAX MIN MAX 1.5 4.8 6.7 1.5 7.7 1.5 7.2 1.5 4.8 6.7 1.5 8 1.5 7.4 UNIT ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance per gate POST OFFICE BOX 655303 CL = 50 pF, • DALLAS, TEXAS 75265 f = 1 MHz TYP UNIT 42 pF 2–3 54AC11030, 74AC11030 8-INPUT POSITIVE-NAND GATES SCAS001A – JUNE 1987 – REVISED APRIL 1993 PARAMETER MEASUREMENT INFORMATION Input (see Note B) From Output Under Test CL = 50 pF (see Note A) VCC 50% 50% 0V tPLH tPHL 500 Ω 50% VCC Output VOH 50% VCC VOL VOLTAGE WAVEFORMS LOAD CIRCUIT NOTES: A. CL includes probe and jig capacitance. B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 2–4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. 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