ISL7119EH ELDRS Test Report

Application Note 1872
Total Dose Testing of the ISL7119EH Dual Voltage
Comparator
Introduction
This report summarizes the results of a low and high dose rate
total dose test of the ISL7119EH dual voltage comparator. The
test was conducted in order to determine the sensitivity of the
part to the total dose environment and to low dose rate
irradiation in particular.
The base ISL7119 is available in two versions. The ISL7119RH
is acceptance tested on a wafer by wafer basis at high dose
rate (50–300rad(Si)/s) to a total dose of 300krad(Si). The
ISL7119EH is acceptance tested on a wafer by wafer basis at
low dose rate (<0.01rad(Si)/s) to a total dose of 50krad(Si) and
at high dose rate (50–300rad(Si)/s) to a total dose of
300krad(Si). Both parts use the same die and package and
differ only in their total dose acceptance testing.
Reference Documents
interfacing with a variety of logic devices and has the added
ability to drive loads at output currents up to 25mA. The
ISL7119RH and ISL7119EH are fabricated on the Intersil
dielectrically isolated Radiation Hardened Silicon Gate (RSG)
process, which provides immunity to single event latchup (SEL)
and highly reliable performance in the natural space
environment. Specifications for radiation hardened
MIL-PRF-38535 (QML) devices are controlled by the Defense
Logistics Agency Land and Maritime (DLA). Detailed electrical
specifications for the ISL7119RH and ISL7119EH are
contained in SMD 5962-07215, which must be quoted when
ordering. A listing of key specifications follows.
• Electrically screened to DLA SMD 5962-07215
• QML qualified per MIL-PRF-38535 requirements
• Radiation environment
• MIL-PRF-38535 (QML)
- Maximum high dose rate total dose . . . . . . . . 300krad(Si)
- Latch-up free under any conditions
• Input offset voltage (VIO). . . . . . . . . . . . . . . . . . . . . 8mV (max)
• ISL7119EH data sheet
• Input bias current (IBIAS). . . . . . . . . . . . . . . . . . 1000nA (max)
• DLA Standard Microcircuit Drawing (SMD) 5962-07215
• Input offset current (IIO) . . . . . . . . . . . . . . . . . . . 150nA (max)
• MIL-STD-883G test method 1019.7
• Saturation voltage @ ISINK = 3.2mA (VSAT) . . . . 0.65V (max)
Part Description
• Saturation voltage @ ISINK = 25mA (VSAT) . . . . . . 1.8V (max)
The ISL7119RH and ISL7119EH are dual radiation hardened
high speed voltage comparators fabricated on a single
monolithic chip. The part is designed to operate over a wide
dual supply voltage range as well as a single 5V logic supply
and ground. The open collector output stage facilitates
• Response time (tPD) . . . . . . . . . . . . . . . . . . . . . . . 160ns (max)
• ICC (both channels) . . . . . . . . . . . . . . . . . . . . . . . 12mA (max)
• IEE (both channels) . . . . . . . . . . . . . . . . . . . . . . . . . 5mA (max)
+VS
+IN 1
OUT 1
-IN 1
GND 1
-VS
FIGURE 1. ISL7119EH SCHEMATIC DIAGRAM (ONE CHANNEL)
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Application Note 1872
The ISL7119EH is implemented in Intersil's dielectrically isolated
radiation hardened silicon gate BiCMOS technology (RSG). Active
devices include 30V CMOS and complementary bipolar
transistors. The process in production is under MIL PRF 38535
certification and is used for a range of space qualified products.
Figure 1 shows a simplified schematic diagram of one channel of
the device.
Characterization Equipment and Procedures
Test Description
The experimental matrix consisted of three cells: ten samples
irradiated at low dose rate with all pins grounded, ten samples
irradiated at low dose rate under bias and twenty samples
irradiated at high dose rate under bias. All data was obtained
from routine wafer acceptance testing, which is performed on a
wafer by wafer basis at low and high dose rate for the –EH part,
and the sample sizes were representative of five production
wafers of the ISL7119EH.
Irradiation Facilities
Low dose rate testing was done at Intersil's low dose rate
irradiation facility located in Palm Bay, FL. This facility was built
expressly for supporting production (LDR assurance testing) of
Intersil products. A description of the Intersil LDR facility can be
found on the Intersil web site. The facility uses a 60Co source and
maintains a 10mrad(Si)/s flux by device positioning relative to
the source. Devices are packaged in PbAl boxes to shield them
against low energy secondary gamma radiation, as required by
MIL STD 883. High dose rate testing was performed using a
Gammacell 220 60Co irradiator located in the Palm Bay, Florida
Intersil facility. The high dose rate irradiations were done at 55
rad(Si)/s per MIL-STD-883 Method 1019.7.
Test Fixturing
Figure 2 shows the configuration used for biased irradiation in
conformance with Standard Microcircuit Drawing (SMD)
5962-07215. This configuration was used for both low and high
dose rate biased irradiation. The unbiased low dose rate
irradiation was carried out with all pins grounded.
V3
V2
10kΩ
5%
All electrical testing was performed outside the irradiator using
the production automated test equipment (ATE) with datalogging
of all parameters at each downpoint. All electrical testing was
performed at room temperature.
Experimental Matrix
Samples of the ISL7119EH were drawn from production run
DMJ8HEH, mask series 53584B01, and were packaged in the
standard hermetic 10-pin ceramic flatpack (CFP) production
package, code KCB. The date code was X1113ABBC. Samples
were processed through the standard burn-in cycle before
irradiation and were screened to the SMD 5962-07215 limits
at room, low and high temperature before the test. No
post-irradiation anneals were performed.
Down Points
Downpoints were zero and 300krad(Si) for the high dose rate test
and zero, 50, 100 and 150krad(Si) for the low dose rate test.
1
10
+VS
GND
2
9
V4
V4
3
8
4
7
5
6
V30
-VS
+VS = +15V ±1.5V
-VS = -15V ±1.5V
+V30 = +30V ±3V
SUPPLY SEQUENCE
1. +VS
2. -VS
3. V30
NOTE: Use voltage divider to supply V4 to circuit.
V1
GND
V30
V3
10kΩ
5%
+VS
27kΩ
5%
V4
10kΩ
5%
GND
FIGURE 2. IRRADIATION BIAS CONFIGURATION FOR THE ISL7119EH PER STANDARD MICROCIRCUIT DRAWING (SMD) 5962-07215, AS USED
FOR BOTH LOW AND HIGH DOSE RATE IRRADIATION REPORTED IN THIS DOCUMENT
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Results
Test Results
Variable Data
The low and high dose rate tests of the ISL7119EH are complete
and showed no reject devices after irradiation to 150krad(Si) at
low dose rate and 300krad(Si) at high dose rate, screening to the
SMD post-irradiation limits.
The plots in Figures 3 through 16 show data at all downpoints.
The plots show the median of key parameters as a function of
total dose for each of the three irradiation conditions. We chose
to plot the median (as opposed to for example mean and
standard deviation) because of the relatively small sample sizes
involved. All parts showed good stability over irradiation, with no
observed low dose rate sensitivity. Table 1, below, summarizes
the key parameters plotted in Figures 3 through 16. Most of the
plots explore possible channel sensitivity by showing data for
both channels on the same set of axes. No systemic channel
sensitivity was noted.
TABLE 1. SMD PARAMETERS, LIMITS AND FIGURE NUMBER
PRE/POST RADIATION LIMITS +25ºC
SMD ELECTRICAL PARAMETER
SYMBOL
MIN
MAX
UNIT
FIGURE
NUMBER
Positive Supply Current
ICC
12
mA
3
Negative Supply Current
IEE
-5
mA
4
Output Saturation Voltage
VSAT
0.65
V
5
Output Leakage Current
ICEX
20
µA
6
Input Offset Voltage
VIO
8
mV
7
dB
8
Common Mode Rejection Ration
CMRR
Positive Input Bias Current
IBIAS+
1
µA
9
Negative Input Bias Current
IBIAS-
1
µA
10
IIO
150
nA
11
dB
12
Input Offset Current
74
Open Loop Voltage Gain
AVOL
Response Time, Low to High (30V Supply)
tPLH
185
ns
13
Response Time, High to Low (30V Supply)
tPHL
185
ns
14
Response Time, Low to High (5V Supply)
tPLH
160
ns
15
Response Time, High to Low (5V Supply)
tPHL
160
ns
16
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Parameter Results
POSITIVE SUPPLY CURRENT BOTH CHANNELS (mA)
14
SPEC LIMIT
12
10
LOW DOSE RATE,
GROUND
LOW DOSE RATE,
BIASED
8
6
HIGH DOSE RATE,
BIASED
4
2
0
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 3. ISL7119EH positive power supply current, both channels, ±15V supply, as a function of total dose irradiation at low (biased and
grounded) and high (biased only) dose rate. The low dose rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size
for the high dose rate cell was 20; sample size for the biased and unbiased low dose rate cells was 10. The SMD limit for this
parameter is 12.0mA maximum post-irradiation.
0
NEGATIVE SUPPLY CURRENT BOTH CHANNELS (mA)
LOW DOSE RATE,
GROUND
-1
LOW DOSE RATE,
BIASED
-2
HIGH DOSE RATE,
BIASED
-3
-4
-5
-6
SPEC LIMIT
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 4. ISL7119EH negative power supply current, both channels, ±15V supply, as a function of total dose irradiation at low (biased and
grounded) and high (biased only) dose rate. The low dose rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size
for the high dose rate cell was 20; sample size for the biased and unbiased low dose rate cells was 10. The SMD limit for this
parameter is -5.0mA maximum post-irradiation.
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Parameter Results (Continued)
OUTPUT SATURATION VOLTAGE +3.5V/-1.0V SUPPLIES (V)
0.7
SPEC LIMIT
0.6
LOW DOSE RATE
BIASED, CH 2
LOW DOSE RATE
BIASED, CH 1
HIGH DOSE RATE
BIASED, CH 1
0.5
0.4
HIGH DOSE RATE
BIASED, CH 2
LOW DOSE RATE
GROUND, CH 1
LOW DOSE RATE
GROUND, CH 2
0.3
0.2
0.1
0
SPEC LIMIT
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 5. ISL7119EH output saturation voltage, +3.5V and -1.0V supplies, channels 1 and 2, as a function of total dose irradiation at low
(biased and grounded) and high (biased only) dose rate. The low dose rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s.
Sample size for the high dose rate cell was 20; sample size for the biased and unbiased low dose rate cells was 10. The SMD limit for
this parameter is 0.65V maximum post-irradiation.
25
SPEC LIMIT
OUTPUT LEAKAGE CURRENT (µA)
20
15
HIGH DOSE RATE, BIASED, CH 1
LOW DOSE RATE, GROUND, CH 1
LOW DOSE RATE, BIASED, CH 1
HIGH DOSE RATE, BIASED, CH2
LOW DOSE RATE, GROUND, CH2
LOW DOSE RATE, BIASED, CH 2
10
5
0
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 6. ISL7119EH output leakage current, channels 1 and 2, as a function of total dose irradiation at low and high dose rate. The low dose
rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size for the high dose rate cell was 20; sample size for the
biased and unbiased low dose rate cells was 10. The SMD limit for this parameter is 20.0µA post-irradiation.
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Parameter Results (Continued)
INPUT OFFSET VOLTAGE ±15V SUPPLIES, 12V CM (mV)
10
SPEC LIMIT
8
6
4
LOW DOSE RATE
GROUND, CH 1
LOW DOSE RATE
GROUND, CH 2
LOW DOSE RATE
BIASED, CH 2
HIGH DOSE RATE
BIASED, CH 2
2
0
HIGH DOSE RATE
BIASED, CH 1
-2
LOW DOSE RATE
BIASED, CH 1
-4
-6
-8
-10
SPEC LIMIT
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 7. ISL7119EH input offset voltage at 12V common mode voltage and 30V supply, channels 1 and 2, as a function of total dose
irradiation at low and high dose rate. The low dose rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size for the
high dose rate cell was 20; sample size for the biased and unbiased low dose rate cells was 10. The post-irradiation SMD limit for this
parameter is +/- 8.0mV post-irradiation.
140
LOW DOSE RATE
BIASED, CH 1
HIGH DOSE RATE
BIASED, CH 2
COMMON MODE REJECTION RATIO (dB)
120
100
HIGH DOSE RATE
BIASED, CH 1
LOW DOSE RATE
GROUND, CH 1
LOW DOSE RATE
GROUND, CH 2
80
LOW DOSE RATE
BIASED, CH 2
SPEC LIMIT
60
40
20
0
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 8. ISL7119EH common mode rejection ratio, channels 1 and 2, as a function of total dose irradiation at low and high dose rate. The low
dose rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size for the high dose rate cell was 20; sample size for
the biased and unbiased low dose rate cells was 10. The post-irradiation SMD limit for this parameter is 74.0dB minimum.
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Parameter Results (Continued)
1200
LOW DOSE RATE
BIASED, CH 2
POSITIVE INPUT BIAS CURRENT (nA)
1000
LOW DOSE RATE
GROUND, CH 2
SPEC LIMIT
LOW DOSE RATE
GROUND, CH 1
800
HIGH DOSE RATE
BIASED, CH 2
LOW DOSE RATE
BIASED, CH 1
600
400
HIGH DOSE RATE
BIASED, CH 1
200
0
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 9. ISL7119EH positive input bias current, channels 1 and 2, as a function of total dose irradiation at low and high dose rate. The low
dose rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size for the high dose rate cell was 20; sample size for
the biased and unbiased low dose rate cells was 10. The post-irradiation SMD limit for this parameter is 1000.0nA maximum.
1200
NEGATIVE INPUT BIAS CURRENT (nA)
LOW DOSE RATE
BIASED, CH 1
SPEC LIMIT
1000
LOW DOSE RATE
GROUND, CH 2
LOW DOSE RATE
GROUND, CH 1
800
600
HIGH DOSE RATE
BIASED, CH 1
LOW DOSE RATE
BIASED, CH 2
400
HIGH DOSE RATE
BIASED, CH 2
200
0
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 10. ISL7119EH negative input bias current, channels 1 and 2, as a function of total dose irradiation at low and high dose rate. The low
dose rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size for the high dose rate cell was 20; sample size for
the biased and unbiased low dose rate cells was 10. The post-irradiation SMD limit for this parameter is 1000.0nA maximum.
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Parameter Results (Continued)
400
LOW DOSE RATE
BIASED, CH 2
300
INPUT OFFSET CURRENT (nA)
LOW DOSE RATE
BIASED, CH 1
LOW DOSE RATE
GROUND, CH 2
200
SPEC LIMIT
LOW DOSE RATE
GROUND, CH 1
100
0
HIGH DOSE RATE
BIASED, CH 2
HIGH DOSE RATE
BIASED, CH 1
-100
SPEC LIMIT
-200
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 11. ISL7119EH input offset current, channels 1 and 2, as a function of total dose irradiation at low and high dose rate. The low dose rate
was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size for the high dose rate cell was 20; sample size for the biased
and unbiased low dose rate cells was 10. The post-irradiation SMD limits for this parameter are -150.0nA to 150.0nA.
OPEN LOOP VOLTAGE GAIN, 15V SUPPLIES (dB)
140
120
100
SPEC LIMIT
80
60
HIGH DOSE RATE, BIASED, CH 1
40
HIGH DOSE RATE, BIASED, CH2
LOW DOSE RATE, GROUND, CH2
LOW DOSE RATE, BIASED, CH 2
LOW DOSE RATE, GROUND, CH 1
LOW DOSE RATE, BIASED, CH 1
20
0
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 12. ISL7119EH open loop voltage gain, channels 1 and 2, as a function of total dose irradiation at low and high dose rate. The low dose
rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size for the high dose rate cell was 20; sample size for the
biased and unbiased low dose rate cells was 10. The post-irradiation SMD limit for this parameter is 74.0dB minimum.
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Parameter Results (Continued)
200
RESPONSE TIME, LOW TO HIGH, +5/0V SUPPLIES (ns)
SPEC LIMIT
180
160
140
HIGH DOSE RATE, BIASED, CH 1
LOW DOSE RATE, GROUND, CH 1
LOW DOSE RATE, BIASED, CH 1
HIGH DOSE RATE, BIASED, CH2
LOW DOSE RATE, GROUND, CH2
LOW DOSE RATE, BIASED, CH 2
120
100
80
60
40
20
0
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 13. ISL7119EH response time, low to high at +5.0V/0V supplies, channels 1 and 2, as a function of total dose irradiation at low and high
dose rate. The low dose rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size for the high dose rate cell was
20; sample size for the biased and unbiased low dose rate cells was 10. The post-irradiation SMD limit for this parameter is 185.0ns
maximum.
200
RESPONSE TIME, HIGH TO LOW, +5/0V SUPPLIES (ns)
SPEC LIMIT
180
160
LOW DOSE RATE
BIASED, CH 2
140
LOW DOSE RATE
GROUND, CH 2
LOW DOSE RATE
BIASED, CH 1
120
LOW DOSE RATE
GROUND, CH 1
100
80
HIGH DOSE RATE
BIASED, CH 2
60
HIGH DOSE RATE
BIASED, CH 1
40
20
0
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 14. ISL7119EH response time, high to low at +5.0V/0V supplies, channels 1 and 2, as a function of total dose irradiation at low and high
dose rate. The low dose rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size for the high dose rate cell was
20; sample size for the biased and unbiased low dose rate cells was 10. The post-irradiation SMD limit for this parameter is 185.0ns
maximum.
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Parameter Results (Continued)
RESPONSE TIME, LOW TO HIGH, ±15V SUPPLIES (ns)
180
SPEC LIMIT
160
140
120
100
HIGH DOSE RATE, BIASED, CH 1
LOW DOSE RATE, GROUND, CH 1
LOW DOSE RATE, BIASED, CH 1
HIGH DOSE RATE, BIASED, CH2
LOW DOSE RATE, GROUND, CH2
LOW DOSE RATE, BIASED, CH 2
80
60
40
20
0
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 15. ISL7119EH response time, low to high at +15.0V/-15.0V supplies, channels 1 and 2, as a function of total dose irradiation at
low and high dose rate. The low dose rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size for the high
dose rate cell was 20; sample size for the biased and unbiased low dose rate cells was 10. The post-irradiation SMD limit for
this parameter is 160.0ns maximum.
RESPONSE TIME, HIGH TO LOW, ±15V SUPPLIES (ns)
180
SPEC LIMIT
160
140
HIGH DOSE RATE, BIASED, CH 1
LOW DOSE RATE, GROUND, CH 1
LOW DOSE RATE, BIASED, CH 1
HIGH DOSE RATE, BIASED, CH2
LOW DOSE RATE, GROUND, CH2
LOW DOSE RATE, BIASED, CH 2
120
100
80
60
40
20
0
0
50
100
150
200
250
300
TOTAL DOSE (krad(Si))
FIGURE 16. ISL7119EH response time, high to low at +15.0V/-15.0V supplies, channels 1 and 2, as a function of total dose irradiation at low and
high dose rate. The low dose rate was 0.01rad(Si)/s and the high dose rate was 55rad(Si)/s. Sample size for the high dose rate cell
was 20; sample size for the biased and unbiased low dose rate cells was 10. The post-irradiation SMD limit for this parameter is
160.0ns maximum.
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Discussion
Conclusion
ATE characterization of the samples at all downpoints is plotted
in Figures 3 through 16 and generally showed good stability over
total dose irradiation.
This document reports the results of a total dose test of the
ISL7119EH dual voltage comparator. Samples were tested under
biased and unbiased conditions to a maximum total dose of
150krad(Si) at high and low dose rate.
Positive and negative power supply current (Figures 3 and 4)
showed good stability, with some change in the positive supply
current but with post-irradiation values well within the SMD
limits. The output saturation voltage (Figure 5) also showed good
stability and remained well within the SMD limits. The output
leakage current (Figure 6) showed no significant change.
The input offset voltage (Figure 7) showed moderate change for
low dose rate (biased) irradiation, but remained well within the
SMD limits. The common mode rejection ratio (Figure 8) showed
no significant change.
The part displayed low dose rate sensitivity in both the positive
and negative input bias current (Figures 9 and 10) parameters.
This response is consistent with gain degradation in the NPN
input differential pair and has been previously reported in the
literature. The input bias current increase was monotonic as a
function of dose, with the grounded low dose irradiation
worst-case as expected. The input bias current was still within the
SMD specification of 1.0µA after 100krad(Si) at low dose rate
but was out of specification after 150krad(Si). Accordingly, the
part is considered low dose rate sensitive.
The part displayed low dose rate sensitivity in both the positive
and negative input bias current (Figures 9 and 10) parameters
and in the input offset current parameter (Figure 11). This
response is consistent with gain degradation in the NPN input
differential pair. Accordingly, the part is considered low dose rate
sensitive. All samples passed the 1000nA and 150nA
(respectively) SMD limits after 50krad(Si) at low dose rate, which
is the standard low dose acceptance test used at Intersil and is
also the SMD low dose rate specification for the part.
We did not observe any differences between the response to
biased and unbiased irradiation, and the part is not considered
bias sensitive. Similarly no channel sensitivity was noted.
The input offset current (Figure 11) is linked to the input bias
current and accordingly showed low dose rate sensitivity as well.
It was still within the SMD specification of 150nA after
50krad(Si) at low dose rate but was out of specification after
100krad(Si).
The open-loop gain (Figure 12) and the low to high/high to low
transition times (Figures 13 through 16) are large signal
parameters and remained very stable at all downpoints.
The ISL7119EH is a dual comparator. Like most IC
implementations of multiple channel devices, the individual
layout design of each channel is very nearly identical, and great
care is taken to eliminate channel to channel variations due to
interconnect parasitics. Accordingly the data showed little
variation between channels, as expected.
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the document is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
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