TSM85N10 B15

TSM85N10
Taiwan Semiconductor
N-Channel Power MOSFET
100V, 81A, 10mΩ
FEATURES
KEY PERFORMANCE PARAMETERS
●
Advanced Trench Technology
●
100% avalanche tested
APPLICATION
●
Synchronous Rectification in SMPS
●
High Speed Power Switching
PARAMETER
VALUE
UNIT
VDS
100
V
RDS(on) (max)
10
mΩ
Qg
154
nC
TO-220
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
PARAMETER
SYMBOL
Limit
UNIT
Drain-Source Voltage
VDS
100
V
Gate-Source Voltage
VGS
±25
V
Continuous Drain Current
(Note 1)
TC = 25°C
81
TC = 70°C
65
TA = 25°C
ID
TA = 70°C
Pulsed Drain Current
(Note 2)
7
IDM
Total Power Dissipation
8.7
320
TC = 25°C
210
TC = 70°C
130
TA = 25°C
PDTOT
TA = 70°C
2.4
1.5
A
A
A
W
W
Single Pulsed Avalanche Energy
(Note 3)
EAS, EAR
620
mJ
Single Pulsed Avalanche Current
(Note 3)
IAS, IAR
64
A
TJ, TSTG
- 55 to +150
°C
SYMBOL
Limit
UNIT
Junction to Case Thermal Resistance
RӨJC
0.6
°C/W
Junction to Ambient Thermal Resistance
RӨJA
52.5
°C/W
Operating Junction and Storage Temperature Range
THERMAL PERFORMANCE
PARAMETER
Notes: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined
at the solder mounting surface of the drain pins. RӨJA is guaranteed by design while RӨCA is determined by the user’s board
design. RӨJA shown below for single device operation on FR-4 PCB in still air.
Document Number: DS_P0000148
1
Version: B15
TSM85N10
Taiwan Semiconductor
ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted)
PARAMETER
Static
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNIT
(Note 4)
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250µA
BVDSS
100
--
--
V
Gate Threshold Voltage
VDS = VGS, ID = 250µA
VGS(TH)
2
3
4
V
Gate Body Leakage
VGS = ±20V, VDS = 0V
IGSS
--
--
±100
nA
Zero Gate Voltage Drain Current
VDS = 80V, VGS = 0V
IDSS
--
--
1
µA
Drain-Source On-State Resistance
VGS = 10V, ID = 40A
RDS(ON)
--
9
10
mΩ
Qg
--
154
--
Qgs
--
4
--
Qgd
--
45
--
Ciss
--
3900
--
Coss
--
300
--
Crss
--
170
--
Rg
--
1.2
--
td(on)
--
38
--
tr
--
65
--
td(off)
--
218
--
tf
--
72
--
VSD
--
0.8
1.2
V
Dynamic
(Note 5)
Total Gate Charge
VDS = 30V, ID = 40A,
Gate-Source Charge
VGS = 10V
Gate-Drain Charge
Input Capacitance
VDS = 30V, VGS = 0V,
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Switching
f = 1.0MHz
F = 1MHz, open drain
nC
pF
Ω
(Note 6)
Turn-On Delay Time
VDS = 30V,
Turn-On Rise Time
RGEN = 6Ω,
Turn-Off Delay Time
ID = 1A, VGS = 10V
Turn-Off Fall Time
Source-Drain Diode
ns
(Note 4)
Forward Voltage
IS = 20A, VGS = 0V
Reverse Recovery Time
IS = 40A , TJ = 25 C
trr
--
62
--
ns
Reverse Recovery Charge
dIF/dt = 100A/µs
Qrr
--
130
--
nC
o
Notes:
1.
Current limited by package
2.
Pulse width limited by the maximum junction temperature
3.
L = 0.3mH, IAS = 64A, VDD = 50V, RG = 25Ω, Starting TJ = 25 C
4.
Pulse test: PW ≤ 300µs, duty cycle ≤ 2%
5.
For DESIGN AID ONLY, not subject to production testing.
6.
Switching time is essentially independent of operating temperature.
o
Document Number: DS_P0000148
2
Version: B15
TSM85N10
Taiwan Semiconductor
ORDERING INFORMATION
PART NO.
TSM85N10CZ C0G
PACKAGE
PACKING
TO-220
50pcs / Tube
Note:
1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC
2. Halogen-free according to IEC 61249-2-21 definition
Document Number: DS_P0000148
3
Version: B15
TSM85N10
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TC = 25°C unless otherwise noted)
Output Characteristics
Transfer Characteristics
On-Resistance vs. Gate-Source Voltage
Gate Charge
On-Resistance vs. Junction Temperature
Capacitance
Document Number: DS_P0000148
4
Version: B15
TSM85N10
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TC = 25°C unless otherwise noted)
Normalized Thermal Transient Impedance
Threshold Voltage vs. Temperature
Maximum Safe Operating Area
Document Number: DS_P0000148
5
Version: B15
TSM85N10
Taiwan Semiconductor
PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters)
TO-220
MARKING DIAGRAM
Y = Year Code
M = Month Code for Halogen Free Product
O =Jan P =Feb Q =Mar R =Apr
V =Aug
S =May T =Jun U =Jul
W =Sep X =Oct
Y =Nov Z =Dec
L = Lot Code (1~9, A~Z)
Document Number: DS_P0000148
6
Version: B15
TSM85N10
Taiwan Semiconductor
Notice
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,
assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, to
any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of
sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty,
relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose,
merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify TSC for any damages resulting from such improper use or sale.
Document Number: DS_P0000148
7
Version: B15