Datasheet - Taiwan Semiconductor

TSM680P06D
Taiwan Semiconductor
Dual P-Channel MOSFET
-60V, -12A, 68mΩ
FEATURES
KEY PERFORMANCE PARAMETERS
●
Fast switching
●
Low thermal resistance package
●
Low profile package
●
Pb-free plating
●
RoHS compliant
●
Halogen-free package
PARAMETER
VALUE
UNIT
VDS
-60
V
RDS(on) (max)
VGS = -10V
68
VGS = -4.5V
110
mΩ
Qg
16.4
nC
APPLICATION
●
Power Supply
●
Motor control
PDFN56 Dual
Dual P-Channel MOSFET
Notes: Moisture sensitivity level: level 3. Per J-STD-020
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
VDS
-60
V
Gate-Source Voltage
VGS
±20
V
Continuous Drain Current
Pulsed Drain Current
TC = 25°C
(Note 1)
ID
TC = 100°C
(Note 2)
Total Power Dissipation @ TC = 25°C
-12
-8
A
IDM
-48
A
PDTOT
3.5
W
Single Pulsed Avalanche Energy
(Note 3)
EAS
7.2
mJ
Single Pulsed Avalanche Current
(Note 3)
IAS
12
A
TJ, TSTG
- 55 to +150
°C
SYMBOL
LIMIT
UNIT
Junction to Case Thermal Resistance
RӨJC
4.5
°C/W
Junction to Ambient Thermal Resistance
RӨJA
85
°C/W
Operating Junction and Storage Temperature Range
THERMAL PERFORMANCE
PARAMETER
Notes: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined
at the solder mounting surface of the drain pins. R ӨJA is guaranteed by design while RӨCA is determined by the user’s board
design. RӨJA shown below for single device operation on FR-4 PCB in still air
Document Number:DS_P0000162
1
Version: A15
TSM680P06D
Taiwan Semiconductor
ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted)
PARAMETER
Static
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNIT
(Note 4)
Drain-Source Breakdown Voltage
VGS = 0V, ID = -250µA
BVDSS
-60
--
--
V
Gate Threshold Voltage
VDS = VGS, ID = -250µA
VGS(TH)
-1.2
-1.6
-2.5
V
Gate Body Leakage
VGS = ±20V, VDS = 0V
IGSS
--
--
±100
nA
--
--
-1
--
--
-10
--
54
68
--
90
110
gfs
--
8.5
--
Qg
--
16.4
--
Qgs
--
2.8
--
Qgd
--
3.6
--
Ciss
--
870
--
Coss
--
70
--
Crss
--
42
--
td(on)
--
8.3
--
tr
--
42.4
--
td(off)
--
64.6
--
tf
--
16.4
--
IS
--
--
-12
A
ISM
--
--
-48
A
VSD
--
--
-1
V
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
VDS = -60V, VGS = 0V
VDS = -48V, Tc = 125ºC
VGS = -10V, ID = -6A
VGS = -4.5V, ID = -3A
VDS = -10V, ID = -6A
IDSS
RDS(on)
µA
mΩ
S
(Note 5)
Total Gate Charge
VDS = -30V, ID = -6A,
Gate-Source Charge
VGS = -10V
Gate-Drain Charge
Input Capacitance
VDS = -30V, VGS = 0V,
Output Capacitance
Reverse Transfer Capacitance
Switching
f = 1.0MHz
nC
pF
(Note 6)
Turn-On Delay Time
Turn-On Rise Time
VDD = -30V, ID = -1A,
Turn-Off Delay Time
RGEN =6Ω
Turn-Off Fall Time
Source-Drain Diode
ns
(Note 4)
Maximum Continuous Drain-Source
Diode Forward Current
Integral reverse diode
Maximum Pulse Drain-Source
in the MOSFET
Diode Forward Current
Diode-Source Forward Voltage
VGS = 0V, IS = -1A
Notes:
1.
Current limited by package
2.
Pulse width limited by the maximum junction temperature
3.
L = 0.1mH, IAS = -12A, VDD = -25V, RG = 25Ω, Starting TJ = 25 C
4.
Pulse test: PW ≤ 300µs, duty cycle ≤ 2%
5.
For DESIGN AID ONLY, not subject to production testing.
6.
Switching time is essentially independent of operating temperature.
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Document Number:DS_P0000162
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Version: A15
TSM680P06D
Taiwan Semiconductor
ORDERING INFORMATION (EXAMPLE)
PART NO.
PACKAGE
PACKING
TSM680P06DPQ56 RLG
PDFN56
2,500pcs / 13”Reel
Note:
1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC
2. Halogen-free according to IEC 61249-2-21 definition
Document Number:DS_P0000162
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Version: A15
TSM680P06D
Taiwan Semiconductor
CHARACTERISTICS CURVES
(TC = 25°C unless otherwise noted)
Normalized RDS(ON) vs. TJ
Normalized On Resistance
-ID , Continuous Drain Current (A)
Continuous Drain Current vs. T C
TJ , Junction Temperature (℃)
TC , Case Temperature (℃)
Gate Charge Waveform
-VGS , Gate to Source Voltage (V)
Normalized Gate Threshold Voltage
Normalized Vth vs. TJ
Qg , Gate Charge (nC)
TJ , Junction Temperature (℃)
Normalized Transient Impedance
Normalized Thermal Response
-ID , Continuous Drain Current (A)
Maximum Safe Operation Area
-VDS , Drain to Source Voltage (V)
Square Wave Pulse Duration
(s)
Document Number:DS_P0000162
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Version: A15
TSM680P06D
Taiwan Semiconductor
PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters)
PDFN56 Dual
SUGGESTED PAD LAYOUT (Unit: Millimeters)
MARKING DIAGRAM
Y = Year Code
M = Month Code for Halogen Free Product
O =Jan P =Feb Q =Mar R =Apr
`
S =May T =Jun U =Jul
V =Aug
W =Sep X =Oct
Y =Nov Z =Dec
L = Lot Code (1~9, A~Z)
Document Number:DS_P0000162
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Version: A15
TSM680P06D
Taiwan Semiconductor
Notice
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,
assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, to
any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of
sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty,
relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose,
merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify TSC for any damages resulting from such improper use or sale.
Document Number:DS_P0000162
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Version: A15