TSM160N10 Taiwan Semiconductor N-Channel Power MOSFET 100V, 160A, 5.5mΩ FEATURES ● ● ● ● KEY PERFORMANCE PARAMETERS Advanced Trench Technology Low RDS(ON) 5.5mΩ (Max.) Low gate charge typical @ 154nC (Typ.) Low Crss typical @ 260pF (Typ.) PARAMETER VALUE UNIT VDS 100 V RDS(on) (max) 5.5 mΩ Qg 154 nC TO-220 Notes: Moisture sensitivity level: level 3. Per J-STD-020 ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted) PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage VDS 100 V Gate-Source Voltage VGS ±20 V Continuous Drain Current (Note 1) TC = 25°C 160 TC = 70°C 127 TA = 25°C ID TA = 70°C Pulsed Drain Current (Note 2) 11.4 IDM Total Power Dissipation 14.2 620 TC = 25°C 300 TC = 70°C 210 TA = 25°C PDTOT TA = 70°C 2.4 1.68 A A A W W Single Pulsed Avalanche Energy (Note 3) EAS, EAR 400 mJ Single Pulsed Avalanche Current (Note 3) IAS, IAR 40 A TJ, TSTG - 55 to +175 °C Operating Junction and Storage Temperature Range Document Number: DS_P0000029 1 Version: C15 TSM160N10 Taiwan Semiconductor THERMAL PERFORMANCE PARAMETER SYMBOL LIMIT UNIT Junction to Case Thermal Resistance RӨJC 0.5 °C/W Junction to Ambient Thermal Resistance RӨJA 62.5 °C/W Notes: RӨJA is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined at the solder mounting surface of the drain pins. RӨJA is guaranteed by design while RӨCA is determined by the user’s board design. RӨJA shown below for single device operation on FR-4 PCB in still air. ELECTRICAL SPECIFICATIONS (TA = 25°C unless otherwise noted) PARAMETER Static CONDITIONS SYMBOL MIN TYP MAX UNIT (Note 4) Drain-Source Breakdown Voltage VGS = 0V, ID = 250uA BVDSS 100 -- -- V Gate Threshold Voltage VDS = VGS, ID = 250µA VGS(TH) 2 3 4 V Zero Gate Voltage Drain Current VDS = 80V, VGS = 0V IDSS -- -- 1 uA Gate Body Leakage VGS = ±20V, VDS = 0V IGSS -- -- ±100 nA Drain-Source On-State Resistance VGS = 10V, ID = 30A RDS(on) -- 4.5 5.5 mΩ Qg -- 154 -- Qgs -- 35 -- Qgd -- 40 -- Ciss -- 9840 -- Coss -- 750 -- Crss -- 260 -- td(on) -- 25 -- tr -- 40 -- td(off) -- 85 -- tf -- 45 -- VSD - 0.8 1.3 Dynamic (Note 5) Total Gate Charge VDS = 30V, ID = 30A, Gate-Source Charge VGS = 10V Gate-Drain Charge Input Capacitance VDS = 30V, VGS = 0V, Output Capacitance Reverse Transfer Capacitance Switching F = 1.0MHz nC pF (Note 6) Turn-On Delay Time Turn-On Rise Time VGS = 10V, VDS = 30V, Turn-Off Delay Time RG = 3.3Ω Turn-Off Fall Time Source-Drain Diode ns (Note 4) Forward Voltage VGS=0V, IS=30A Reverse Recovery Time IS = 30A , TJ = 25 C trr 120 nS Reverse Recovery Charge dI/dt = 100A/us Qrr 160 nC o V Notes: 1. Current limited by package. 2. Pulse width limited by the maximum junction temperature. 3. L = 0.5mH, IAS = 40A, VDD = 50V, RG = 25Ω, Starting TJ = 25 C 4. Pulse test: PW ≤ 300µs, duty cycle ≤ 2%. 5. For DESIGN AID ONLY, not subject to production testing. 6. Switching time is essentially independent of operating temperature. o Document Number: DS_P0000029 2 Version: C15 TSM160N10 Taiwan Semiconductor ORDERING INFORMATION PART NO. PACKAGE PACKING TSM160N10CZ C0G TO-220 50pcs / Tube Note: 1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC 2. Halogen-free according to IEC 61249-2-21 definition Document Number: DS_P0000029 3 Version: C15 TSM160N10 Taiwan Semiconductor CHARACTERISTICS CURVES (TA = 25°C unless otherwise noted) Output Characteristics Gate Threshold Voltage Gate Source On Resistance Drain-Source On Resistance Drain-Source On-Resistance Source-Drain Diode Forward Voltage Document Number: DS_P0000029 4 Version: C15 TSM160N10 Taiwan Semiconductor CHARACTERISTICS CURVES (TA = 25°C unless otherwise noted) Power Derating Drain Current vs. Junction Temperature Safe Operation Area Transient Thermal Impedance Capacitance Gate Charge Document Number: DS_P0000029 5 Version: C15 TSM160N10 Taiwan Semiconductor PACKAGE OUTLINE DIMENSIONS (Unit: Millimeters) TO-220 Marking Diagram Y = Year Code M = Month Code for Halogen Free Product O =Jan P =Feb Q =Mar R =Apr S =May T =Jun U =Jul V =Aug Y =Nov Z =Dec W =Sep X =Oct L = Lot Code (1~9, A~Z) Document Number: DS_P0000029 6 Version: C15 TSM160N10 Taiwan Semiconductor Notice Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, to any intellectual property rights is granted by this document. Except as provided in TSC’s terms and conditions of sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from such improper use or sale. Document Number: DS_P0000029 7 Version: C15