517AZ

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN8, 2x3 EXTENDED PAD
CASE 517AZ
ISSUE A
1
SCALE 2:1
DATE 23 MAR 2015
PIN ONE
REFERENCE
0.10 C
B
A
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25MM FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L
L
L1
ÇÇ
ÇÇ
ÇÇ
DETAIL A
ALTERNATE
CONSTRUCTIONS
E
EXPOSED Cu
0.10 C TOP VIEW
DETAIL B
A
0.10 C
ÉÉ
ÉÉ
ÇÇ
DIM
A
A1
A3
b
D
D2
E
E2
e
L
L1
ÉÉÉ
ÉÉÉ
ÇÇÇ
A3
MOLD CMPD
A1
DETAIL B
A3
ALTERNATE
CONSTRUCTIONS
0.08 C
NOTE 4
A1
SIDE VIEW
DETAIL A
1
C
SEATING
PLANE
GENERIC
MARKING DIAGRAM*
1
D2
L
XXXXX
AWLYWG
4
XXXXX
A
WL
Y
W
G
E2
8
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.20
0.30
2.00 BSC
1.35
1.45
3.00 BSC
1.25
1.35
0.50 BSC
0.25
0.35
−−−
0.15
5
8X
e
BOTTOM VIEW
b
0.10
M
C A B
0.05
M
C
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
NOTE 3
RECOMMENDED
SOLDERING FOOTPRINT*
1.56
8X
0.68
1.45 3.40
1
8X
0.50
PITCH
0.30
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
STATUS:
98AON42552E
ON SEMICONDUCTOR STANDARD
REFERENCE:
© Semiconductor Components Industries, LLC, 2002
October, DESCRIPTION:
2002 − Rev. 0
http://onsemi.com
UDFN8, 2X3 EXTENDED PAD 1
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
Case Outline Number:
PAGE 1 OFXXX
2
DOCUMENT NUMBER:
98AON42552E
PAGE 2 OF 2
ISSUE
REVISION
DATE
O
RELEASED FOR PRODUCTION FROM POD #UDFN8−046−01 TO ON SEMICONDUCTOR. REQ. BY B. BERGMAN.
23 JUL 2009
A
REDREW PACKAGE DRAWING TO ON SEMICONDUCTOR/JEDEC STANDARD.
REQ. BY B. BECKER.
23 MAR 2015
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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© Semiconductor Components Industries, LLC, 2015
March, 2015 − Rev. A
Case Outline Number:
517AZ