LTC6091
Dual 140V, Rail-to-Rail
Output, Picoamp
Input Current Op Amp
FEATURES
DESCRIPTION
Supply Range: ±4.75V to ±70V (140V)
n0.1Hz to 10Hz Noise: 3.5μV
P-P
n Input Bias Current: 50pA Maximum
n Low Offset Voltage: 1.25mV Maximum
n Low Offset Drift: ±5μV/°C Maximum
n CMRR: 130dB Minimum
n Rail-to-Rail Output Stage
n Output Sink and Source: 50mA
n12MHz Gain-Bandwidth Product
n21V/μs Slew Rate
n11nV/√Hz Noise Density
n Thermal Shutdown
n4mm × 6mm 16-Lead QFN Package
The LTC®6091 is a dual, high voltage precision operational
amplifier. The low noise, low bias current input stage is
ideal for high gain configurations. The LTC6091 has low
input offset voltage, a rail-to-rail output stage, and can be
run from a single 140V or split ±70V supplies.
n
The LTC6091 is internally protected against overtemperture conditions. A thermal warning output, TFLAG, goes
active when the die temperature approaches 150°C. The
output stage can be turned off with the output disable pin
OD. By tying the OD pin to the thermal warning output,
the part will disable the output stage when it is out of the
safe operating area. These pins easily interface to any
logic family.
APPLICATIONS
n
n
n
n
n
The LTC6091 is unity-gain stable with up to a 200pF output
capacitor. A wide input and output common mode range
along with many features makes the LTC6091 useful for
many high voltage applications.
ATE
Piezo Drivers
Photodiode Amplifier
High Voltage Regulators
Optical Networking
L, LT, LTC, LTM, Linear Technology, the Linear logo and Over-The-Top are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
TYPICAL APPLICATION
High Voltage Analog MUX
VOUT vs Time
10
SELECT
CHA/CHB 0
10V/DIV
SELECT
CHA/CHB
10k
+
ODA COMA
1/2 LTC6091
CHAIN
MUX OUT
20V/DIV
–
10k
100k
MUX OUT
10k
+
ODB COMB
CHB
1/2 LTC6091
CHBIN
10k
CHA
CHB
TIME (200µs/DIV)
–
6091 TA01b
100k
6091 TA01a
CHAIN = 10VP-P, 20kHz SINE
CHBIN = 5VP-P, 20kHz TRIANGLE
6091fa
For more information www.linear.com/LTC6091
1
LTC6091
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
COMA
ODA
TOP VIEW
16
15
14 V+A
–INA 1
+INA 2
13 OUTA
V– 3
12 TFLAGA
17
V–
COMB 4
11 ODB
10 V+B
–INB 5
+INB 6
7
8
TFLAGB
9 OUTB
V–
Total Supply Voltage (V+A to V–, or V+B to V–)........150V
COMA............................................................... V– to V+A
COMB................................................................ V– to V+B
Input Voltage
ODA...................................................V– to V+A + 0.3V
ODB...................................................V– to V+B + 0.3V
+INA, –INA..............................V– – 0.3V to V+A + 0.3V
+INB, –INB..............................V– – 0.3V to V+B + 0.3V
ODA to COMA, ODB to COMB...................... –3V to 7V
Input Current
+INA, –INA, +INB, -INB..................................... ±10mA
TFLAGA, TFLAGB Output
TFLAGA...................................V– – 0.3V to V+A + 0.3V
TFLAGB...................................V– – 0.3V to V+B + 0.3V
TFLAGA to COMA......................................... –3V to 7V
TFLAGB to COMB......................................... –3V to 7V
Continuous Output Current
OUTA , OUTB (Note 2)................................. 50mARMS
Operating Junction Temperature Range
(Note 3).............................................. –40°C to 125°C
Specified Junction Temperature Range (Note 4)
LTC6091I..............................................–40°C to 85°C
LTC6091H........................................... –40°C to 125°C
Junction Temperature (Note 5).............................. 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering 10sec)..................... 300°C
UFE PACKAGE
32(16)-LEAD (4mm × 6mm) PLASTIC QFN
θJC = 15°C/W
EXPOSED PAD (PIN 17) IS V–, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC6091IUFE#PBF
LTC6091IUFE#TRPBF
6091
16-Lead Plastic QFN
–40°C to 85°C
LTC6091HUFE#PBF
LTC6091HUFE#TRPBF
6091
16-Lead Plastic QFN
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2
6091fa
For more information www.linear.com/LTC6091
LTC6091
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 70V, V– = –70V, VCM = VOUT = 0V, VOD = open
unless otherwise noted.
SYMBOL
PARAMETER
VOS
Input Offset Voltage
CONDITIONS
MIN
l
∆VOS/∆T
Input Offset Voltage Drift
TA = 25°C, ∆TJ = 70°C
IB
Input Bias Current (Note 6)
Supply Voltage = ±70V
Supply Voltage = ±15V
Supply Voltage = ±15V
IOS
Input Offset Current (Note 6)
–5
I-SUFFIX
TYP
MAX
±330
±330
±1000
±1250
±3
5
3
0.3
l
Supply Voltage = ±15V
0.5
l
en
MIN
–5
H-SUFFIX
TYP
MAX
UNITS
±330
±330
±1000
±1250
μV
µV
±3
5
3
0.3
50
0.5
30
µV/°C
800
pA
pA
pA
120
pA
pA
Input Noise Voltage Density
f = 1kHz
f = 10kHz
14
11
14
11
nV/√Hz
nV/√Hz
Input Noise Voltage
0.1Hz to 10Hz
3.5
3.5
µVP-P
1
1
fA/√Hz
Guaranteed by CMRR
±68
±68
in
Input Noise Current Density
VCM
Input Common Mode Range
l
V– + 3V
V+ – 3V
V– + 3V
V+ – 3V
V
V
CIN
Common Mode Input
Capacitance
9
9
pF
CDIFF
Differential Input Capacitance
5
5
pF
CMRR
Common Mode Rejection
Ratio
PSRR
VOUT
AVOL
ISC
SR
GBW
VCM = –67V to 67V
130
126
>140
130
126
>140
l
dB
dB
112
106
>120
112
106
>120
l
dB
dB
Power Supply Rejection Ratio VS = ±4.75V to ±70V
Output Voltage Swing High
(Referred to V+) (VOH)
No Load
ISOURCE = 1mA
ISOURCE = 10mA
l
l
l
10
50
450
25
140
1000
10
50
450
25
140
1000
mV
mV
mV
Output Voltage Swing Low
(Referred to V–) (VOL)
No Load
ISINK = 1mA
ISINK = 10mA
l
l
l
10
30
250
25
80
600
10
30
250
25
80
600
mV
mV
mV
Large-Signal Voltage Gain
RL = 10k
VOUT from –60V to 60V
l
1000
1000
Output Short-Circuit Current
(Source and Sink)
Supply Voltage = ±70V
Supply Voltage = ±15V
l
50
Slew Rate
AVCL = –4, RL = 10k
l
10
l
5.5
Gain-Bandwidth Product
fTEST = 20kHz, RL = 10k
φM
Phase Margin
RL = 10k, CL = 50pF
FPBW
Full-Power Bandwidth
VOUT = 125VP-P
Settling Time 0.1%
IS
Supply Current (Per Amplifier) No Load
90
Supply Voltage Range
20
VSTEP = 1V, AV = 1,
RL = 10k
9
12
5
40
18
2
2.8
Guaranteed by the
PSRR Test
50
21
l
VS
1000
1000
60
l
tS
>10000
l
9.5
3.9
4.3
140
>10000
90
mA
mA
21
V/μs
V/μs
12
MHz
MHz
60
Deg
40
kHz
kHz
2
µs
2.8
9.5
V/mV
V/mV
3.9
4.3
mA
mA
140
V
6091fa
For more information www.linear.com/LTC6091
3
LTC6091
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 70V, V– = –70V, VCM = VOUT = 0V, VOD = open
unless otherwise noted.
SYMBOL
PARAMETER
ODH
OD Pin Voltage, Referenced to VIH
COM Pin
l
ODL
OD Pin Voltage, Referenced to VIL
COM Pin
l
Amplifier DC Output
Impedance, Disabled
CONDITIONS
MIN
I-SUFFIX
TYP
MAX
COM +
1.8V
MIN
H-SUFFIX
TYP
COM +
1.8V
COM +
0.65V
>10
V–
>10
V+ – 5
UNITS
V
COM +
0.65V
DC, OD = COM
MAX
V–
V
MΩ
V+ – 5
V
COMCM
COM Pin Voltage Range
l
COMV
COM Pin Open-Circuit Voltage
l
17
21
25
17
21
25
V
COMR
COM Pin Resistance
l
500
665
850
500
665
850
kΩ
TEMPF
Die Temperature Where
TFLAG Is Active
TEMPHYS
TFLAG Output Hysteresis
ITFLAG
TFLAG Pull-Down Current
TFLAG Output
Voltage = 0V
l
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Either output (OUTA or OUTB) of the LTC6091 is capable of
producing peak output currents in excess of 50mA. Current density
limitations within the IC require the continuous RMS current supplied by
either output (sourcing or sinking) over the operating lifetime of the part to
be limited to under 50mA (absolute maximum). Proper heat sinking may
be required to keep the junction temperature below the absolute maximum
rating. Refer to the Power Dissipation and Thermal Considerations section
of the data sheet for more information.
Note 3: The LTC6091I is guaranteed functional over the operating junction
temperature range –40°C to 85°C. The LTC6091H is guaranteed functional
over the operating junction temperature range –40°C to 125°C. Specifying
the junction temperature range as an operating condition is applicable for
devices with potentially significant quiescent power dissipation.
4
70
145
145
°C
5
5
°C
200
330
70
200
330
µA
Note 4:The LTC6091I is guaranteed to meet specified performance
from –40°C to 85°C. The LTC6091H is guaranteed to meet specified
performance from –40°C to 125°C.
Note 5: This device includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Operation
above the specified maximum operating junction temperature is not
recommended.
Note 6: Input bias and offset current is production tested with ±15V
supplies. See Typical Performance Characteristics curves of actual typical
performance over full supply range.
6091fa
For more information www.linear.com/LTC6091
LTC6091
TYPICAL PERFORMANCE CHARACTERISTICS
Open-Loop Gain and Phase
vs Frequency
CMRR vs Frequency
100
PHASE
120
80
100
60
40
GAIN
40
20
20
CMRR (dB)
60
1
100
60
–30
10000
10
100
1000
FREQUENCY (kHz)
1
10
100
FREQUENCY (kHz)
30
60
50
40
30
20
20
10
10
0
1000
–4
–3
–2
–1
0
1
2
TCVOS (µV/°C)
6091 G04
500
200
100
0
–200
300
200
100
0
–200
–300
–300
–400
–400
–500
–50
–500
–25
50
25
0
75
TEMPERATURE (°C)
100
125
6091 G07
50
–50
–25
0
25
INPUT COMMON MODE VOLTAGE (V)
5
75
6091 G06
Minimum Supply Voltage
–100
–100
VS = ±70V
125°C
85°C
25°C
–50°C
100
TA = 25°C
5 SAMPLES
400
OFFSET VOLTAGE (µV)
VOLTAGE OFFSET (µV)
300
–10
Offset Voltage
vs Total Supply Voltage
VS = ±70V
VCM = 0V
5 SAMPLES
400
0
–20
–75
4
3
SPECIFIED COMMON MODE
RANGE = ±67V
10
6091 G05
Offset Voltage vs Temperature
1000
Change in Offset Voltage
vs Input Common Mode Voltage
CHANGE IN OFFSET VOLTAGE (µV)
–200
600
–600
200
INPUT OFFSET VOLTAGE (µV)
10
100
FREQUENCY (kHz)
6091 G03
CHANGE IN OFFSET VOLTAGE (µV)
40
1
20
VS = ±70V
VCM = 0V
TA = 25°C
∆TJ = 75°C
70
NUMBER OF UNITS
NUMBER OF UNITS
80
50
500
0
0.1
1000
Offset Voltage Drift Distribution
60
PSRR–
6091 G02
VS = ±70V
VCM = 0V
TA = 25°C
0
–1000
60
20
0
0.1
Offset Voltage Distribution
70
PSRR+
80
40
6091 G01
80
AV = 1V/V
120
20
–20
–20
0.1
VS = ±70V
40
0
0
PSRR vs Frequency
140
80
PHASE (DEG)
GAIN (dB)
80
100
PSSR (dB)
120
30
80
105
130
55
TOTAL SUPPLY VOLTAGE (V)
6091 G08
75
50
25
0
–25
–50
125°C
85°C
25°C
–50°C
–75
–100
5
6
7
9
8
TOTAL SUPPLY VOLTAGE (V)
10
6091 G09
6091fa
For more information www.linear.com/LTC6091
5
LTC6091
TYPICAL PERFORMANCE CHARACTERISTICS
2.9
2.5
VS = ±70V
2.7
VS = ±4.75V
SUPPLY CURRENT (mA)
3.0
SUPPLY CURRENT (mA)
3.0
2.8
2.6
800
TA = 25°C
2.0
1.5
1.0
2.5
0.5
2.4
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
0
125
0
25
50
75
100
SUPPLY VOLTAGE (V)
6091 G10
10
0.1
1
FREQUENCY (kHz)
10
100
10
100
1000
FREQUENCY (kHz)
0
AV = 101V/V
AV = 11V/V
AV = 1V/V
100
1000
FREQUENCY (kHz)
10000
6091 G16
AV = 1V/V
0
–4
10000
VS = ±70V
VS = ±5V
1
10
100
1000
FREQUENCY (kHz)
Output Impedance vs Frequency
with Output Disabled (OD = COM)
1000
100
10
1
0.1
0.01
AV = 1V/V
AV = 11V/V
AV = 101V/V
1
10
100
1000 10000 100000
FREQUENCY (kHz)
6091 G17
10000
6091 G15
OUTPUT IMPEDANCE (kΩ)
OUTPUT IMPEDACNE (Ω)
10
50
75
100
125
25
TOTAL SUPPLY VOLTAGE (V)
–2
50
1000
20
0
6091 G14
40
GAIN (dB)
100
Output Impedance vs Frequency
30
125°C
85°C
25°C
–50°C
2
150
0
100
50
10
200
Small-Signal Frequency
Response
200
Small-Signal Frequency
Response vs Closed-Loop Gain
1
300
4
6091 G13
–10
400
6091 G12
GAIN (dB)
INTEGRATED NOISE (µVRMS)
VOLTAGE NOISE DENSITY (nV/√Hz)
100
0.010
500
0
150
250
1
0.001
600
Integrated Noise vs Frequency
1000
6
125
700
6091 G11
Voltage Noise Density
vs Frequency
–20
Output Disable Supply Current
vs Supply Voltage
Supply Current vs Supply Voltage
OUTPUT DISABLE CURRENT (µA)
Supply Current vs Temperature
CL = 10pF
100
10
1
1
10
100
FREQUENCY (kHz)
1000
6091 G18
6091fa
For more information www.linear.com/LTC6091
LTC6091
TYPICAL PERFORMANCE CHARACTERISTICS
INPUT BIAS CURRENT (|pA|)
1000
1000
125°C
80°C
DIRECTION OF THE CURRENT
IS OUT OF THE PIN
10
50°C
1
25°C
100°C
OD-COM = 0V
10
DIRECTION OF THE CURRENT
IS OUT OF THE PIN
50°C
1
0.1
–15
80
VOUT = 0V
–10
–5
0
10
5
COMMON MODE VOLTAGE (V)
20µs/DIV
15
Falling Edge Settling Time
AV = 1V/V
6091 G21
Rising Edge Settling Time
AV = 1V/V
AV = 1V/V
OUTPUT
INPUT
50mV/DIV
OUTPUT
20mV/DIV
INPUT STEP
0.5V/DIV
OUTPUT
50mV/DIV
6091 G22
INPUT
INPUT STEP
0.5V/DIV
80
OUTPUT
6091 G23
500ns/DIV
500ns/DIV
Output Voltage Swing
vs Frequency
Large-Signal Transient Response
160
AV = –10V/V
VS = ±70V
6091 G24
0.1Hz to 10Hz Voltage Noise
AV = –10V/V
RLOAD = 10kΩ
140
40
OUTPUT
INPUT
OUTPUT
20mV/DIV
1µs/DIV
120
20
VOUT (VP-P)
OUTPUT, INPUT (V)
VOUT
6091 G20
Small-Signal Transient Response
INPUT
–20
100
60
40
–60
20
5µs/DIV
6091 G25
OUTPUT
NOISE
2µV/DIV
80
–40
–80
AV = –10V/V
VIN = –0.5V
OUTPUT
DISABLED
85°C
6091 G19
0
OD-COM
OUTPUT
ENABLED
100
25°C
5°C
0.1
20 40 60
–80 –60 –40 –20 0
COMMON MODE VOLTAGE (V)
60
Output Disable (OD) Response
Time
VS = ±15V
125°C
100°C
100
Input Bias Current vs Common
Mode Voltage and Temperature
(VS = ±15V)
2V/DIV
VS = ±70V
INPUT BIAS CURRENT (|pA|)
10000
Input Bias Current vs Common
Mode Voltage and Temperature
(VS = ±70V)
0
1
10
100
FREQUENCY (kHz)
1000
TIME (1s/DIV)
6091 G27
6091 G26
6091fa
For more information www.linear.com/LTC6091
7
LTC6091
TYPICAL PERFORMANCE CHARACTERISTICS
3.0
OD INPUT CURRENT (µA)
2.5
SUPPLY CURRENT (mA)
75
VS = ±70V
VCOM = 0V
2.0
1.5
1.0
125°C
85°C
25°C
–50°C
0.5
0
0.5
0.8
1.0
1.3
1.5
OD-COM (V)
1.8
Output Voltage Swing High (VOH)
vs Load Current and Temperature
OD Pin Input Current
vs OD Pin Voltage
800
125°C
85°C
25°C
–50°C
VS = ±70V
VCOM = 0V
50
125°C
85°C
25°C
–50°C
700
600
25
VOH (mV)
Supply Current vs OD Pin Voltage
0
500
400
300
200
–25
100
–50
2.0
0
1
2
3
4
OD-COM (V)
5
0
7
6
0
2
6091 G29
4
6
ISOURCE (mA)
8
6091 G30
6091 G28
Output Voltage Swing Low (VOL)
vs Load Current and Temperature
125°C
85°C
25°C
–50°C
450
400
–40
–50
DISTORTION (dBc)
VOL (mV)
300
250
200
150
–70
–90
–100
–110
4
6
ISOURCE (mA)
8
10
2ND
–80
50
2
2.5
–60
100
0
3.0
VS = ±70V
AV = 10
VOUT = 10VP-P
RL = 10k
–30
350
0
Thermal Shutdown Hystersis
Distortion vs Frequency
–20
SUPPLY CURRENT (mA)
500
10
–120
3RD
2.0
1.5
1.0
0.5
10
0
162 164 166 168 170 172 174 176 178
JUNCTION TEMPERATURE (°C)
100
FREQUENCY (kHz)
6091 G32
6091 G33
6091 G31
100
40
CHANGE IN OFFSET VOLTAGE (µV)
OD
COM
TFLAG
–
V = 0V
80
PIN VOLTAGE (V)
Open-Loop Gain
vs Load Resistance
60
40
20
0
0
20
40
60
80 100 120
TOTAL SUPPLY VOLTAGE (V)
140
6091 G34
Open-Loop Gain
40
RLOAD = 10k
RLOAD = 100k
RLOAD = 500k
30
CHANGE IN OFFSET VOLTAGE (µV)
Open-Circuit Voltage of COM,
OD, TFLAG
20
10
0
–10
–20
–30
–40
–75
–50
–25
0
25
50
75
OUTPUT VOLTAGE (V)
20
10
0
–10
–20
–30
–40
–75
–50
–25
0
25
50
75
OUTPUT VOLTAGE (V)
6091 G35
8
VS = ±70V
RLOAD = 10k
TA = 25°C
10 SAMPLES
30
6091 G36
6091fa
For more information www.linear.com/LTC6091
LTC6091
PIN FUNCTIONS
(A Channel/B Channel)
–INA , –INB (Pin 1/Pin 5): Inverting Input Pin. Input common mode range is V– + 3V to V+ – 3V. Do not exceed
absolute maximum voltage range.
+INA, +INB (Pin 2/Pin 6): Noninverting Input Pin. Input
common mode range is V– + 3V to V+ – 3V. Do not exceed
absolute maximum voltage range.
V– (Pin 3, Pin 7, Exposed Pad Pin 17): Negative Supply
Pin. Connect to a single V– only. Both amplifiers share a
common substrate, and are not isolated from each other.
Pins 3, and 7 must be electrically tied to the exposed pad
(Pin 17). The exposed pad connection removes heat from
the device. To achieve a low thermal resistance, connect
the exposed pad to a V– power plane with as much metal
land as possible (see Applications Information).
TFLAGA, TFLAGB (Pin 12/ Pin 8 ): Temperature Flag Pin.
The TFLAG pin is an open-drain output that sinks current
when the die temperature exceeds 145°C.
OUTA, OUTB (Pin 13/Pin 9): Output Pin. If this rail-torail output goes below V– , the ESD protection diode will
forward bias. If OUT goes above V+, then output device
diodes will forward bias. Avoid forward biasing the diodes
on the OUT pin. Excessive current can cause damage.
V+A, V+B (Pin 14/Pin 10): Positive Supply Pin. Each
amplifier has an independent V+ supply. But since both
amplifiers shares a common substrate, they must share
the same V– supply.
ODA, ODB (Pin 15/Pin 11): Output Disable Pin. Active low
input disables the output stage. If left open, an internal
pull-up resistor enables the amplifier. Input voltage levels
are referred to the COM pin.
COMA, COMB (Pin 16/Pin 4): COM Pin is used to interface
OD and TFLAG pins to voltage control circuits. Tie this pin
to the low voltage ground, or let it float.
6091fa
For more information www.linear.com/LTC6091
9
LTC6091
BLOCK DIAGRAM
V+A
16
V+A
2M
COMA
10k
ODA
1.2V +
2M
ESD
2M
10k
15
ESD
+
–
V–
V–
1
V +A
125Ω
–INA
V+A
2
ESD
+INA
V–
DIFFERENTIAL
DRIVE
GENERATOR
125Ω
14
ESD
OUTPUT
ENABLE
OUTA
13
ESD
V–
TO COMA PIN
3
V–
6k
500Ω
INPUT STAGE
6k
TJ > 175°C
DIE
TEMPERATURE TJ > 145°C
SENSOR
TFLAGA
12
ESD
V–
V–
+
V+
V B
4
B
2M
COMB
10k
10k
ODB
1.2V +
2M
ESD
2M
11
ESD
+
–
V–
V–
5
V +B
125Ω
–INB
V+B
6
+INB
ESD
V–
DIFFERENTIAL
DRIVE
GENERATOR
125Ω
10
ESD
OUTPUT
ENABLE
OUTB
9
ESD
V–
TO COMB PIN
7
V–
6k
500Ω
INPUT STAGE
6k
TJ > 175°C
DIE
TEMPERATURE TJ > 145°C
SENSOR
TFLAGB
8
ESD
V–
V–
6091 BD
10
6091fa
For more information www.linear.com/LTC6091
LTC6091
APPLICATIONS INFORMATION
General
the input devices. The current limiting resistors and backto-back diodes are to keep the inputs from being driven
apart. The voltage-current relationship is that of a resistor
in series with a diode until the voltage difference between
the pins reaches 12V. At that point the Zener diodes turn
on. Any additional current into the pins will snap back the
input differential voltage to 9V.
The LTC6091 dual high voltage operational amplifier
is designed in a Linear Technology proprietary CMOS
process enabling a rail-to-rail output stage with a 140V
supply while maintaining precision, low offset, low offset
drift and low noise.
Power Supply
In the event of an ESD strike between an input and V–,
the voltage clamps and ESD device fire providing a current path to V– protecting the input devices. The input
pin protection is designed to protect against momentary
ESD events. A repetitive large fast input swing (>5.5V and
<20ns rise time) will cause repeated stress on the MOSFET
input devices. When in such an application, anti-parallel
diodes (1N4148) should be connected between the inputs
to limit the swing.
The LTC6091 consists of single monolithic die containing
two LTC6090 amplifiers assembled in a single exposedpad QFN package. Since both amplifiers share the same
substrate, V– pins (Pin 3 and Pin 7 ) must be tied together
and to the exposed pad underneath. The V+A (Pin 14) and
V+B (Pin 10) may be supplied independently. The LTC6091
works off single or split supplies. Split supplies can be
balanced or unbalanced. For example, two ±70V supplies
can be used, or a 100V and –40V supply can be used.
The V+ and V– pins should be bypassed with high quality surface mount ceramic capacitors. See Board Layout
section for recommendations. When using split supplies,
supply sequencing does not cause problems.
Output Disable
Each amplifier of the LTC6091 has its own output disable
(OD) pin (Refer to Figure 1). The OD pin is an active low
disable with an internal 2M resistor that will pull up the
OD pin enabling the output stage. The OD pin voltage is
limited by an internal Zener diode tied between COM and
OD. When the OD pin for a particular channel is asserted
low with respect to its COM pin, the output stage for that
Input Protection
As shown in the Block Diagram, the LTC6091 has a
comprehensive protection network to prevent damage to
V+A
LOW
VOLTAGE
CONTROL
15
12
ODA
LTC6091
2M
10k
10k
6k
6k
TFLAGA
COMA
16
500Ω
V+B
LOW
VOLTAGE
CONTROL
11
8
ODB
TFLAGB
2M
20k
V–
10k
6k
COMB
4
6k
500Ω
V–
6091 F01
Figure 1. Low Voltage Interface Example for Output Disable
6091fa
For more information www.linear.com/LTC6091
11
LTC6091
APPLICATIONS INFORMATION
channel is disabled, leaving its bias and input circuits enabled. This results in 580μA (typical) standby current for
the disabled channel. The OD pin can be directly connected
to either an open drain NMOS device (as in Figure 1) or
connected to low voltage logic circuitry.
Since the OD pin is referenced to the COM pin, absolute
maximum ratings should be observed for the COM and
OD pins. When coming out of shutdown the LTC6091 bias
circuits and input stage are already powered up leaving
only the output stage to turn on and drive to the proper
output voltage. Figures 2 and 3 illustrate the part powering
on and coming out of shutdown, respectively.
Thermal Shutdown
Each amplifier of the LTC6091 has its own trimmed temperature sensing circuit which senses die temperature in
close proximity to their respective amplifier’s output stage,
where most of the on-chip power dissipation occurs. When
one of the amplifiers’s sensing circuit senses temperatures
in excess of approximately 145°C, it will assert the TFLAG
pin for that amplifier. The TFLAG pins are open-drain output
pins that sink 200μA (typical) each when asserted. The
temperature sensor itself has approximately 5°C of hysteresis requiring the part to cool to approximately 140°C
before disabling TFLAG.
For simplest operation, float both channel’s COM pins
(COMA and COMB), and connect ODA to TFLAGA, and ODB
to TFLAGB as shown in Figure 4. Both output stages will
be safely disabled should the die temperature reach approximately 145°C. Both COM pins may be tied to ground.
V+
OUT
10V/DIV
V+A
6090 F02
1ms/DIV
15
Figure 2. Starting Up
12
OPTIONAL
(CAN BE LEFT
FLOATING)
AV = –10V/V
VIN = 0.5VP-P
OD-COM
= 0V
OUTPUT
ENABLED
OUTPUT
DISABLED
11
5V/DIV
8
OPTIONAL
(CAN BE LEFT
FLOATING)
VOUT
2M
10k
ODA
6k
TFLAGA
16 COMA
LTC6091
V+B
ODB
TFLAGB
2M
10k
V–
6k
4 COMB
V–
6091 F04
500µs/DIV
6091 F03
Figure 4. Automatic Thermal Output Disable Using
the TFLAG Pins
Figure 3. LTC6091 Output Disable Function
12
6091fa
For more information www.linear.com/LTC6091
LTC6091
APPLICATIONS INFORMATION
Since both amplifiers share a common substrate, thermal
cross coupling from one channel to the other will occur.
Depending on the average die temperature, and temperature sensing accuracy, it is possible, however unlikely,
for heat generated in Channel A’s output stage to assert
Channel B’s TFLAGB or visa-versa. Should this condition
occur, it should be understood that both amplifiers are
operating close to their thermal shutdown limit.
Since the TFLAG pin is referenced to the COM pin, absolute
maximum ratings should be observed for the COM and
TFLAG pins.
For safety, a second overtemperature threshold shuts
down the output stage if internal die temperatures rise
to approximately 175°C. This second overtemperature
indicator has approximately 7°C of hysteresis requiring the
die temperature to cool 7°C. Once the device has cooled
sufficiently, the output stage will enable. Degradation can
occur or reliability may be affected when the junction
temperature of the device exceeds 150°C.
Board Layout
PCB leakage related errors require special layout and
cleaning practices. As little as 1000GΩ of PCB leakage
between Pin 2 (+INA) and Pin 3 (V–) will generate 70pA of
leakage with ±70V power supplies! It becomes important
to clean the PCB after soldering down the part. Solder
flux will accumulate dust and become a leakage hazard.
It is recommended to clean the PCB with a solvent, or
simply use soap and water to remove residue. Baking
the PCB will remove leftover moisture. Depending on the
application, a special low leakage board material may be
considered. Also guarding sensitive traces as shown in
Figures 5 and 6 to the greatest extent possible will also
help to mitigate PCB leakage.
70V
+
–
+
VIN
–
–70V
6091 F05
Because the two amplifiers share a common substrate, a
single bypass capacitor of 0.1μF can be used to bypass
the V– (as close to the pins as possible) to a low impedance ground plane. Additional bypass capacitance may be
required for heavy loads. For the positive supplies, there
are two independent positive supply pins (V+A, V+B): one
for each amplifier. If these two supplies are tied together,
they may be bypassed to a low impedance ground plane
with a single capacitor (typically 0.1μF) as close to the
supply pins as possible. Likewise, when driving heavy
loads, additional bypass capacitance may be required.
Figure 5. Example of a Noninverting Amplifier
Guard Configuration
70V
+
–
+
VIN
6091 F06
–
–70V
Figure 6. Example of an Inverting Amplifier
Guard Configuration
There are other important considerations for high voltage
and high power: trace spacing, humidity and dust. High
voltage electric fields between adjacent conductors attract
dust. Moisture absorbed by dust can contribute to PCB
leakage and electrical breakdown. Vias biased to high voltage should have additional spacing to nearby ground plane.
6091fa
For more information www.linear.com/LTC6091
13
LTC6091
APPLICATIONS INFORMATION
Power Dissipation and Thermal Considerations
In order to avoid damaging the device, the absolute maximum junction temperature of the LTC6091
(TJMAX = 150°C), should not be exceeded. At 5.6mA of
quiescent supply current on ±70V supplies, the LTC6091
will consume approximately 0.8W.
In general, the die’s junction temperature (TJ) can be estimated from the ambient temperature TA, and the power
dissipated in the device PD:
TJ = TA + PD • (θJC + θCA)
θJC is the junction-to-case thermal resistance and is characterized to be approximately 15°C/W. θCA is the case-toambient thermal resistance and depends on circuit board
layout, air flow and proximity to other sources of heat. The
power dissipated in the IC is a function of supply voltage
and the load being driven. Assuming split supplies, and a
resistive load, the worst-case power dissipation PD(MAX)
occurs when the output is driving the load to half of either
supply voltage. PD(MAX) , then is the sum of the quiescent
power plus the power dissipated in the device due to the
load with symmetric supply:
PD(MAX) (per amplifier) = (VS • IS) + (VS/4)2/RLOAD
(IS is the quiescent supply current for a single amplifier)
For example, the resulting peak power dissipation in the
LTC6091 for 2 channels driving 5kΩ to ground with a
±70V supply would be approximately 1.3W.
The exposed pad under the LTC6091 is the primary conduit
for conducting heat out of the package. Junction-to-ambient
thermal resistance is strongly influenced by the number of
thermal vias to which the exposed pad is soldered to, the
size of the thermal plane connected to these thermal vias,
PCB thickness, air-flow, and proximity of other sources of
heat. To minimize the amount of temperature rise within
the package, the exposed pad must be soldered down to
a PCB with multiple thermal vias tied to a thermal plane.
For a 4-layer PCB with the exposed pad of the LTC6091
soldered to a land pattern containing eight 10mil diameter thermal vias which are connected to two 2 inch by
2 inch V– thermal/power planes, the junction-to-ambient
thermal resistance may be as low as 38°C/W in still air. If
the density of the PCB layout makes such large thermal
planes impractical, Table 1 lists the thermal performance
achieved of alternative layout examples. A minimally sized
single layer thermal land under the device as shown in
column D of Table 1 will result in a junction-to-ambient
thermal resistance approaching 115°C/W. Since the
LTC6091 will dissipate 0.8W on ±70V supplies, there will
Table 1. Thermal Resistance vs PCB Thermal Plane Area
EXAMPLE A
TOP LAYER A
EXAMPLE B
TOP LAYER B
EXAMPLE C
TOP LAYER C
EXAMPLE D
TOP LAYER D
BOTTOM LAYER A
BOTTOM LAYER B
BOTTOM LAYER C
BOTTOM LAYER D
θJA = 100°C/W
θJC = 15°C/W
θCA = 85°C/W
θJA = 108°C/W
θJC = 15°C/W
θCA = 93°C/W
θJA = 90°C/W
θJC = 15°C/W
θCA = 75°C/W
θJA = 115°C/W
θJC = 15°C/W
θCA = 100°C/W
6091 TABLE 1
14
6091fa
For more information www.linear.com/LTC6091
LTC6091
APPLICATIONS INFORMATION
be approximately 90°C of junction-to-ambient temperature
rise due to the device operation alone. This will then limit
the specified ambient temperature range of the LTC6091
can operate and/or will limit the load driven to prevent
junction temperatures from exceeding TJMAX (150°C).
Stability with Large Resistor Values
A large feedback resistor along with the intrinsic input
capacitance will create an additional pole that affects
stability and causes peaking in the closed-loop response.
To mitigate the peaking a small feedback capacitor placed
around the feedback resistor, as shown in Figure 7, will
reduce the peaking and overshoot. Figure 8 shows the
closed-loop response with various feedback capacitors.
Additional stray capacitance on the input pins should be
kept to a minimum.
Slew Enhancement
The LTC6091 includes a slew enhancement circuit which
boosts the slew rate to 21V/μs making the part capable of
slewing rail-to-rail across the 140V output range in less
than 7μs. To optimize the slew rate and minimize settling
time, stray capacitance should be kept to a minimum. A
feedback capacitor reduces overshoot and nonlinearities
associated with the slew enhancement circuit. The size of
CF
100k
–
10k
1/2 LTC6091
PARASITIC INPUT
CAPACITANCE
+
6091 F07
Figure 7. LTC6091 with Feedback Capacitance to Reduce Peaking
25
GAIN (dB)
20
15
10
CF = 0pF
CF = 2pF
CF = 4pF
1
10
100
FREQUENCY (kHz)
1000
6091 F08
Figure 8. Compensated Closed-Loop Response Reduces Peaking
6091fa
For more information www.linear.com/LTC6091
15
LTC6091
APPLICATIONS INFORMATION
the feedback capacitor should be tailored to the specific
board, supply voltage and load conditions.
Multiplexer Application
A single LTC6091 may be arranged to act as a 2-channel
high voltage analog multiplexer as shown in Figure 10.
When used in this arrangement, it is possible for the
output to affect the source on the disabled amplifier’s
noninverting input. The inverting and noninverting inputs
are clamped through resistors and back-to-back diodes.
There is a path for current to flow from the multiplexer
output through the disabled amplifier’s feedback resistor,
and through the inputs to the noninverting input’s source.
Slewing is a nonlinear behavior and will affect distortion.
The relationship between slew rate and full-power bandwidth is given in the relationship below.
SR = VPEAK • ω
TOTAL HARMONIC DISTORTION + NOISE (%)
where VPEAK is the peak output voltage and ω is frequency
in radians/sec. The fidelity of a large sine wave output
is limited by the slew rate. The graph in Figure 9 shows
distortion versus frequency for several output levels.
10
VS = ±70V
AV = 5
RL = 10k
CF = 30pF
1
0.1
VOUT = 100VP-P
0.01
0.001
VOUT = 50VP-P
VOUT = 10VP-P
10
100
1000
10000
FREQUENCY (Hz)
100000
6091 F09
Figure 9. Distortion vs Frequency for Large Output Swings
SELECT
CH1
10k
+
OD
COM
1/2 LTC6091
–
10k
100k
CH2
10k
MUX
OUT
+
OD
COM
1/2 LTC6091
–
10k
100k
6091 F10
Figure 10. Multiplexer Application
16
6091fa
For more information www.linear.com/LTC6091
LTC6091
APPLICATIONS INFORMATION
For example, if the enabled amplifier has a –70V output,
and the disabled amplifier has a 5V input, there is 75V
across the two resistors and the input pins. To keep this
current below 1mA the combined resistance of the RIN
and feedback resistor needs to be about 75k or higher.
The output impedance of the disabled amplifier is > 10MΩ
at DC. The AC output impedance is shown in the Typical
Performance Characteristics section.
Minimizing Noise
The LTC6091 circuit shown in Figure 11 includes an output
filter that reduces noise (and signals) starting at about
150kHz. This filtering reduces out-of-band noise to a relatively insignificant level. Loop compensation is included
to provide a well-stabilized overall response. Since the
large-signal bandwidth is dictated largely by the op amp
slew rate to signals below about 100kHz, the net result
is that little is compromised due to the added filtration.
The following table shows the suggested component values
for a range of amplification factors.
GAIN
RG
RF
CF
1
N/A
4.99k
330pF
2
50k
50k
33pF
5
20k
80.6k
22pF
10
11k
100k
18pF
20
5.23k
100k
18pF
50
2.05k
100k
18pF
100
1k
100k
18pF
RG
RF
CF
–
1k
OUTPUT
1nF
6091 F11
1/2 LTC6091
INPUT
+
Figure 11. Modified Gain-Block Application That
Includes Noise-Reducing Filter
6091fa
For more information www.linear.com/LTC6091
17
LTC6091
TYPICAL APPLICATIONS
Gain of 10 with Protected Output Current Doubler
200k
1%
70V
22.1k
1%
12
–
1/2
LTC6091
+
VIN
15
100Ω
1%
11
100Ω
1%
±70V
AT ±20mA
16
–70V
70V
200k
–
8
1/2
LTC6091
+
6091 TA02
4
–70V
Piezo Bimorph Bender Driver
2.2nF
100k
30V
14
1
{±3V} IN
10k
–
15
+
3
10k
17
2SK1057
12
1/2 LTC6091
2
100k
100Ω
16
13
499Ω
100Ω
2SJ161
–30V
18
PHYSIK INSTRUMENTE
PL140.10 (OR SIMILAR)
MAX 4µF/LAYER
fMAX = 500Hz
7.5Ω
6091 TA03
6091fa
For more information www.linear.com/LTC6091
LTC6091
TYPICAL APPLICATIONS
Wide Common Mode Range 10x Gain Instrumentation Amplifier
Typically <1mV Input-Referred Error
70V
14
2
+IN
+
15
12
1
–
22pF
10k*
13
1/2 LTC6091
16
100k
22pF
3
LT5400-2
100k
1
2
7
8
7
3
100k
–70V
24.9k
205k
70V
10
6
–IN
70V
5
+
11
22pF
8
7
100k
100k
9
10k*
9
6
5
8
6
LTC6090
–
4
9
49.9Ω
OUT
–3dB at 45kHz
1
22pF
6091 TA04
4
17
2
5
4
1/2 LTC6091
–
100k
3
+
–70V
* THESE RESISTORS CAN BE 0Ω IF INPUT SIGNAL SOURCE IMPEDANCES ARE <20MΩ.
–70V
90
CMRR (dB)
80
70
60
50
40
1
10
CM FREQUENCY (kHz)
100
6091 TA05
9V to ±65V Isolated Flyback Converter for Amplifier Supply
750311692
1:5:5
8
VIN
9V
•
100k
1
2
22k
3
LT8300
EN/UVLO
VIN
GND
RFB
SW
130k
5
4
4
3
65V
CMMR1U-2
6
•
4.7µF
•
7
5
1µF
130V
CMHZ5266B
CMMR1U-2
+
+
1/2 LTC6091
1/2 LTC6091
–
–
1µF
100V
6090 TA05
–65V
6091fa
For more information www.linear.com/LTC6091
19
LTC6091
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
UFE Package
32(16)-Lead Plastic QFN (4mm × 6mm)
(Reference LTC DWG # 05-08-1966 Rev O)
0.80 ±0.05
0.5 BSC
0.70 ±0.05
0.8 BSC 0.8 BSC
0.8 BSC
4.50 ±0.05
3.10 ±0.05
0.80 ±0.05
1.90 ±0.05
4.10 ±0.05
0.8 BSC 0.8 BSC 0.8 BSC
0.5
BSC
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
5.10 ±0.05
6.50 ±0.05
PIN 1 NOTCH
R = 0.30 OR
0.35 × 45°
CHAMFER
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.75 ±0.05
4.00 ±0.10
15
16
0.40 ±0.10
PIN 1
TOP MARK
(NOTE 6)
14
0.8
BSC
1
0.50 BSC
2
0.8
BSC
4.10 ±0.10
0.8
BSC
0.80
BSC
6.00 ±0.10 0.50 BSC
0.8
BSC
0.80
BSC
0.8
BSC
1.90 ±0.10
0.50 BSC
6
9
0.200 REF
8
0.00 – 0.05
7
(UFE32(16)) QFN 1113 REV O
0.25 ±0.05
0.80 BSC
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
20
6091fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LTC6091
LTC6091
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
05/15
Removed ESD statement to reflect improved ESD Performance
Changed internal TFLAG circuit resistor values
2
10, 11, 12
Updated Thermal Shutdown description
12
Added pin numbers to application circuit
18
6091fa
For more information www.linear.com/LTC6091
21
LTC6091
TYPICAL APPLICATION
Piezo Micropositioner Driver
1nF
200k
120V
100Ω
14
1
+6V
–1V
IN
10k
2
200k
–
15
3
10k
17
100Ω
12
1/2 LTC6091
+
2SK1057
13 330Ω
16
499Ω
+120V
–20V
100Ω
CMAX = 10µF
fMAX = 500Hz
2SJ161
100Ω
–20V
PHYSIK INSTRUMENTE
P-855 (OR SIMILAR)
6091 TA06
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
Single Version of LTC6091
LTC6090
Single 140V Rail-to-Rail Output pA Input Op Amp
LT®1990
250V Input Range G = 1, 10, Micropower, Difference Amplifier Pin Selectable Gain of 1 or 10
LT1991
Precision, 100μA Gain Selectable Amplifier
Pin Configurable as a Difference Amplifier, Inverting and
Noninverting Amplifier
LT6015/LT6016/
LT6017
Single/Dual/Quad 3.2MHz, Low Power, Over-The-Top®
Precision Op Amp
76V Common Mode Input Range, 50V Operating Supply Range,
50μV Voltage Offset
LT3511
Monolithic High Voltage Isolated Flyback Converter
4.5V to 100V Input Voltage Range, No Opto-Coupler Required
LT8300
100VIN Micropower Isolated Flyback Converter with
150V/260mA Switch
6V to 100V Input Voltage Range. VOUT Set with a Single External
Resistor
22 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC6091
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTC6091
6091fa
LT 0515 REV A• PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2014