PANASONIC AN5394FB

ICs for TV
AN5394FB
RGB processor IC for the HDTV (Japan) and wide-screen TV
■ Overview
48
13
12.00±0.20
24
1
12
(1.60)
0.80
Seating plane
(1.00)
0° to 10°
0.50±0.20
+0.10
0.30 −0.05
14.00±0.30
(1.60)
25
37
+0.10
0.15 −0.05
• Wider band for signal processing (Y: 30 MHz/−3 dB,
color difference: 15 MHz/−3 dB)
• Direct input of HD, NTSC and DVD standard YUV signal
• High picture quality due to the built-in various correction circuits of Y signal
• Auto-cut off functions
• Having 2 systems of RGB input, OSD plus character
broadcasting or external RGB input such as VGA is
supported.
• SMD package allows for high density mounting.
36
1.95±0.20
■ Features
Unit: mm
12.00±0.20
0.10±0.10
The AN5394FB is an RGB processor IC which converts the brightness and color difference signals to a primary color signal. It can be connected to each input signal of HDTV (Japan), DVD, NTSC, PAL, VGA, etc. and
facilitates rationalization and high performance of the endproducts.
14.00±0.30
QFP048-P-1212B
■ Applications
• HDTV (Japan), wide-screen television, projection television, plasma display panel (PDP), LCD projector,
video capture board
1
AN5394FB
ICs for TV
IK
25
Blooming DC in
26
RGB out-VCC1
27
RGB out-VCC2
28
Spot killer in
29
Analog VCC 9 V
30
B-CLP
31
G-CLP
32
33
R-CLP
APL det.
34
Black peak det.
18
44
17
I2C block
45
16
RGB (OSD)
46
15
RGB
47
14
OSD block
Pulse block
12
Analog GND2
11
B-in
10
G-in
9
R-in
GND 5 V
8
13
7
48
VP+6H
2
19
43
1
VP in
20
ABL/ACL
block
42
SDA
HP in
41
6
BLK in
21
RGB out
block
B
B-Y
SCL
DI in
22
G
G-Y
5
VCC 5 V
Chroma
block
Matrix
block
NECK in
CLP in
40
R-Y
4
Analog GND1
39 R-Y
B-Y
R
23
Ys
ABL/ACL
38
3
Chroma γ cont.
Y'
Video
block
YM
B-Y in
24
Y
2
R-Y in
37
RGB SW
Y in
35
36
White peak det.
■ Block Diagram
R-S/H
R-out
G-S/H
G-out
B-S/H
B-out
RGB out-GND1
RGB out-GND2
Analog VCC2
OSD-R in
OSD-G in
OSD-B in
ICs for TV
AN5394FB
■ Pin Descriptions
Pin No.
Description
Pin No.
Description
1
VP + 6H
25
IK
2
RGB SW
26
Blooming DC in
3
YM input
27
RGB out-VCC1
4
Ys input
28
RGB out-VCC2
5
Neck in
29
Spot killer in
6
SCL
30
Analog VCC1
7
SDA
31
B-CLP
8
GND 5 V
32
G-CLP
9
R-n
33
R-CLP
10
G-in
34
APL det.
11
B-in
35
Black peak det.
12
Analog GND2
36
White peak det.
13
OSD-B in
37
Yin
14
OSD-G in
38
R−Y in
15
OSD-R in
39
B− Y in
16
Analog VCC2
40
Chroma γ cont.
17
RGB out-GND2
41
ABL/ACL
18
RGB out-GND1
42
Analog GND1
19
B output
43
CLP in
20
B-S/H
44
VCC 5V
21
G output
45
DI in
22
G-S/H
46
BLK in
23
R output
47
HP in
24
R-S/H
48
VP in
■ Absolute Maximum Ratings
Parameter
Supply voltage
Supply current
Power dissipation
*2
Operating ambient temperature
Storage temperature
*1
*1
Symbol
Rating
Unit
VCC1
10.0
V
VCC2
5.6
ICC1
70.0
ICC2
39.2
PD
681
mW
Topr
−25 to +70
°C
Tstg
−55 to +150
°C
mA
Note) *1 : Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C.
*2 : Power dissipation PD indicates the value in the free air at Ta = 70°C. For further details, refer to "■ Technical Information".
3
AN5394FB
ICs for TV
■ Recommended Operating Range
Parameter
Symbol
Range
Unit
VCC1
8.1 to 9.9
V
VCC2
4.5 to 5.5
Supply voltage
■ Electrical Characteristics at VCC1 = 9 V, VCC2 = 5 V, Ta = 25°C
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
(1) DC characteristics
Circuit current 1 *1
ICC1
VCC1 = 9 V, VCC2 = 5 V
No signal input
39
51
63
mA
Circuit current 2 *1
ICC2
VCC1 = 9 V, VCC2 = 5 V
No signal input
24
31
35
mA
Video voltage gain
AYG
Input: Sine wave 0.2 V[p-p]
f = 1 MHz; Contrast: max.
4.4
5.4
6.4
Times
Video voltage gain change
∆AY
Ratio between R,G and B
Drive: typ.
−2.5
0
2.5
dB
Frequency characteristics
fY
Input: Sine wave 0.2 V[p-p]
f = 30 MHz; Contrast: max.
−6
−3
1
dB
Standard output pedestal
DCP
Brightness: typ.
2.6
3.0
3.4
V
Brightness variable range
VBR
Brightness: min. → max.
1.8
2.2
2.6
V
Contrast: min. → max.
25


dB
(2) Y-system
Contrast ratio
A(CON)
APL detection voltage
VAPL
Input: Total white 0.7 V[0-p]
Voltage at APL detection pin 34
0.7
0.93
1.3
V
APL detection ratio
∆APL
Input: Total white 0.7 V[0-p] → 0.35 V[0-p] 0.44
Voltage at APL detection pin 34
0.54
0.64
Times
DC regeneration ratio 1
DC1
Input signal APL 10% → 90%
APL detection pin 34 = 0 V
95
100
105
%
DC regeneration ratio 2
DC2
Input signal APL 10% → 90%
DC regeneration SW/on; Polarity '−'
APL det./R = 75 kΩ
70
80
90
%
DC regeneration ratio 3
DC3
Input signal APL 10% → 90%
DC regeneration SW/on; Polarity '+'
APL det./R = 75 kΩ
110
120
130
%
Output blooming level
VBL
Input: Total white 1.4 V[0-p]
Blooming DC = 3.8 V
Pin 34: 0 V; Brightness: max.
5.7
6.7
7.7
V
Input: Total white 1.4 V[0-p]
Blooming DC = 3.8 V → 4.2 V
Pin 34: 0 V; Brightness: max.
−1.2
− 0.9
− 0.7
V
Output blooming level change
∆VBL
Note) *1: ICC1 is a total of the current at pins 16, 27, 28 and 30. ICC2 is a total of the current at pin 44.
4
ICs for TV
AN5394FB
■ Electrical Characteristics at VCC1 = 9 V, VCC2 = 5 V, Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
(2) Y-system (continued)
White gradation correction 1 *2
Yγ1
Input: Total white 0.7 V[0-p]
Gain: max. Level: typ. → max.
White gradation SW: On
10
16
22
%
White gradation correction 2 *2
Yγ2
Input: Total white 0.7 V[0-p]
−26
−20
−14
%
− 0.1
0
0.1
V
Gain: max. Level: typ. → min.
White gradation SW: On
Black extension
characteristics 1 *3
YBL1
Output amplitude 0 V[p-p]
Level: typ., gain: min. → max.
Black extension
characteristics 2 *3
YBL2
Input: Total white 0.7 V[0-p]
− 0.86 − 0.66 − 0.46
Output amplitude1.0 V[0-p], contrast adj
level: typ., gain: min. → max.
Black extension
characteristics 3 *3
YBL3
Input: Total white 0.7 V[0-p]
Output amplitude1.6 V[0-p], contrast adj
level: typ., gain: min. → max.
− 0.1
0
0.1
V
Black extension
characteristics 4 *4
YBL4
Black detection open → 3 V
Level: typ., gain: typ.
− 0.8
− 0.6
− 0.4
V
Black extension
characteristics 5 *4
YBL5
Black detection open → 3 V
Level: typ., gain: max.
−1.5
−1.1
− 0.7
V
Black extension
characteristics 6 *4
YBL6
Black detection open → 3 V
Level: min. → max., gain: typ.
−1.20 − 0.75 − 0.30
V
White character correction 1 *2
VW1
Input: Total white 0.7 V[0-p]
Blooming DC adjustment
Level: max., gain: min. → typ.
10.0
25.0
40.0
%
White character correction 2 *2
VW2
Input: Total white 0.7 V[0-p]
Blooming DC adjustment
Level: min., gain: min. → max.
−9.3
0
9.3
%
White character correction off *2 WOFF
Y input: Total white 0.7 V[0-p]
C-Y input: 0.2 V[0-p]
Level: min., gain: min. → max.
− 0.2
0
0.2
V
ABL off *5
VABL1
ABL/ACL pin 7.5 V
Level: min., gain: min. → max.
− 0.1
0
0.1
V
ABL start 1*5
VABL2
ABL/ACL pin 3 V
Level: min. → max., gain: max.
0.28
0.39
0.50
V
ABL start 2*5
VABL3
ABL/ACL pin 3 V
Level: min., gain: min. → max.
− 0.84 − 0.64 − 0.44
V
ABL gain 1*5
AABL
ABL/ACL pin 5 V → 3 V
Level: typ., gain: max.
− 0.48 − 0.37 − 0.26
V
Note) *2:
*3:
*4:
*5:
V
Adjust the blooming DC voltage (pin 26).
Black gradation SW: On
Black gradation SW: On, brightness: max.
ABLSW: On, brightness: max.
5
AN5394FB
ICs for TV
■ Electrical Characteristics at VCC1 = 9 V, VCC2 = 5 V, Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
(2) Y-system (continued)
ACL off *6
AACL1
Input: Total white 0.7 V[0-p]
ABL/ACL pin: 7.5 V
Level: min., gain: min. → max.
−5
0
5
%
ACL start 1 *6
AACL2
Input: Total white 0.7 V[0-p]
ABL/ACL pin: 3 V
Level: min. → max., gain: typ.
10
20
30
%
ACL start 2 *6
AACL3
Input: Total white 0.7 V[0-p]
ABL/ACL pin: 3 V
Level: min., gain: min. → typ.
−45
−35
−25
%
ACL gain 1 *6
AACL4
Input: Total white 0.7 V[0-p]
ABL/ACL pin: 5 V → 3 V
Level: typ., gain: typ.
−34
−22
−10
%
Color difference voltage gain *7
GR
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, R−YIN → ROUT
4.64
5.80
6.96
Times
Color difference frequency
characteristics *7
fc
Input: Sine wave 0.2 V[p-p]
f = 10 MHz
−6
−3
+2
dB
(3) Color difference-system
B−Y axis gain adjustment range
NTSC1 *7
GB-Y1
B−Y input: 0.2 V[0-p]
B−Y gain: min., brightness: max.
Input-SW: NTSC-standard
0.34
0.48
0.62
Times
B−Y axis gain adjustment range
NTSC2 *7
GB-Y2
B−Y input: 0.2 V[0-p]
B−Y gain: max., brightness: max.
Input-SW: NTSC-standard
0.84
1.20
1.56
Times
R−Y input: 0.228 V[0-p]
B−Y input: 0.406 V[0-p]
Tint: min. → max.
± 33
± 48
± 68
°
3
6
9
dB
− 50
0
50
mV[p-p]
12
19
26
°
Tint variable range *8
Tc
Color control *7
CCON
Color: typ. → max.
Contrast: typ.
Color residue *7
CMIN
Color: min., B−Y gain: max.
Contrast: max.
R−Y angle adjustment range *8
θR
Note) *6: ACLSW: On
*7: Adjust tint, drive R and B.
*8: Adjust tint, drive R, B and B−Y gains
6
R−Y input: 0.228 V[0-p]
B−Yinput: 0.406 V[0-p]
R−Y axis: min. → max.
ICs for TV
AN5394FB
■ Electrical Characteristics at VCC1 = 9 V, VCC2 = 5 V, Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Color difference-system (continued)
Input matrix ratio 1
(HD/NTSC) R−Y *7
SW1
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, R−YIN → ROUT
1.30
1.62
1.94
Times
Input matrix ratio 2
(DVD/NTSC) R−Y *7
SW2
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, R−YIN → ROUT
1.14
1.42
1.70
Times
Input matrix ratio 3
(HD/NTSC) B−Y *7
SW3
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, B−YIN → BOUT
1.53
1.91
2.29
Times
Input matrix ratio 4
(DVD/NTSC) B−Y *7
SW4
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, B−YIN → BOUT
1.45
1.81
2.17
Times
Output matrix ratio 1
(matrix 1/standard) R−Y *7
SW5
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, R−YIN → ROUT
1.28
1.60
1.92
Times
Output matrix ratio 2
(matrix 2/standard) R−Y *7
SW6
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, R−YIN → ROUT
1.10
1.38
1.65
Times
Output matrix ratio 3
(matrix 1/standard) B−Y *7
SW7
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, B−YIN → BOUT
1.28
1.60
1.92
Times
Output matrix ratio 4
(matrix 2/standard) B−Y *7
SW8
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, B−YIN → BOUT
1.10
1.38
1.65
Times
G−Y matrix ratio
(G−Y/R−Y) HD *7
M1
G−Y matrix: HD
0.23
0.30
0.35
Times
G−Y matrix ratio
(G−Y/R−Y) standard *7
M2
G−Y matrix: Standard
0.38
0.51
0.58
Times
G−Y matrix ratio
(G−Y/R−Y) matrix 1 *7
M3
G−Y matrix: matrix 1
0.26
0.34
0.40
Times
G−Y matrix ratio
(G−Y/R−Y) matrix 2 *7
M4
G−Y matrix: matrix 2
0.26
0.34
0.40
Times
G−Y matrix ratio
(G−Y/B−Y) HD *7
M5
G−Y matrix: HD
0.07
0.10
0.13
Times
G−Y matrix ratio
(G−Y/B−Y) standard *7
M6
G−Y matrix: Standard
0.15
0.19
0.23
Times
G−Y matrix ratio
(G−Y/B−Y) matrix 1 *7
M7
G−Y matrix: matrix 1
0.22
0.28
0.34
Times
G−Y matrix ratio
(G−Y/B−Y) matrix 2 *7
M8
G−Y matrix: matrix 2
0.13
0.17
0.21
Times
Note) *7: Adjust tint, drive R and B.
7
AN5394FB
ICs for TV
■ Electrical Characteristics at VCC1 = 9 V, VCC2 = 5 V, Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Pin 4 > 2.1 V: OSD
Pin 4 < 0.9 V: Main or RGB
0.9
1.4
2.1
V
(4) OSD, RGB input
Ys input threshold voltage *9
YsTH
RGB input threshold voltage *9
RGBTH
Pin 2 > 2.1 V: RGB
Pin 2 < 0.9 V: Main
0.9
1.4
2.1
V
Ym input threshold voltage *9
YmTH
Pin 3 > 2.1 V: Half tone
Pin 3 < 0.9 V: Normal
0.9
1.4
2.1
V
CLP input threshold voltage
CLPTH
Pin 43 (main, OSD, RGB)
0.9
1.4
2.1
V
Clamp-possible pulse width
WM
Pin 43 (main, OSD, RGB)
0.8


µs
OSD gain
GOSD
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, Ys pin: 2.1 V
4.6
5.8
7.0
Times
OSD frequency characteristics
fOSD
Input: Sine wave 0.2 V[p-p]
f = 30 MHz, Ys pin: 2.1 V
−7
−3
1
dB
OSD contrast ratio 1
OSDC1
Contrast: max. → typ.
Ys pin: 2.1 V
−3
−1
1
dB
OSD contrast ratio 2
OSDC2
Contrast: typ. → 01
Ys pin: 2.1 V
−16
−11
−7
dB
RGB gain
GRGB
Input: Sine wave 0.2 V[p-p]
f = 1 MHz, RGB pin: 2.1 V
4.6
5.8
7.0
Times
RGB frequency characteristics
fRGB
Input: Sine wave 0.2 V[p-p]
f = 30 MHz, RGB pin: 2.1 V
−7
−3
1
dB
Contrast: max. → min.
RGB pin: 2.1 V
25


dB
BLK SW: On
RGB contrast ratio
RGBC
(5) Cutoff drive
BLK input threshold voltage *10 BLKTH
0.9
1.4
2.1
V
Neck mute input threshold
voltage *10
NTH
0.9
1.4
2.1
V
DI input threshold voltage
DTH
0.9
1.4
2.1
V
Vp input threshold voltage
VTH
0.9
1.4
2.1
V
Hp input threshold voltage
HTH
0.9
1.4
2.1
V
1.6
2.0
2.4
V
9.0
11.5
14.0
dB
− 0.3
0
0.3
V
∆LRGB
Cutoff R, G, B: min. → max.
Cutoff SW: min. → max.
Drive variable range (R, G, B)
∆GD
Drive R, G, B: min. → max.
R, G, B pedestal potential
difference
∆VP
Cutoff: typ.
Bright: typ.
Cutoff variable range
(R, G, B)*11
Note) *9: SW priority: Ys > Ym, RGB
*10: Priority: Neck > single color adjustment (I2C) > auto cutoff > BLK SW(I2C) > BLK pulse
*11: Drive R, B adjustment
8
ICs for TV
AN5394FB
■ Electrical Characteristics at VCC1 = 9 V, VCC2 = 5 V, Ta = 25°C (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
(5) Cutoff drive (continued)
Output blanking level
IK pulse peak voltage (max.)*
12
IK pulse peak voltage varying
width*12
BLK
BLK SW: On
BLK (pin 46): 2.1 V
1.0
1.4
1.8
V
IKmax
IK input (pin 25)
BLK SW: On
Auto cutoff mode
2.7
3.5
4.3
V
∆IK
IK input (pin 25)
BLK SW: On
Auto cutoff mode
2.5
3.1
3.7
V
− 0.01 0.23
0.31
V
Potential difference for IK pulse IK-PED
vs. pedestal *12
IK input (pin 25)
BLK SW: On
Auto cutoff mode
(6) I2C · DAC
SCL · SDA
Input threshold voltage
VTH
VCC2 = 5 V
1.5

3.0
V
Sink ability at ACK
VACK
I = 3 mA at pull-up 1.6 kΩ


0.4
V
VCC2 = 5 V
100


kHz
Maximum clock frequency
Note) *12: Priority ... NECK > single color adjustment (I2C) > auto cutoff > BLKSW
• Design refernce data
VCC = 9 V, VCC = 5 V, Ta = 25°C
Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
(1) Y-system
Y (main)
Input dynamic range
DYIN1
VCC1 = 9 V
V26 = 1.5 V
Contrast; typ.

1.4

V[p-p]
R, G, B output dynamic range
DOUT
VCC1 = 9 V
For pedestal 3 V

4.4

V[p-p]
APL detection stop
APLS
BLK, DI = 2.1 V

0

V
THBLACK
Delay from BLK, DI

60

ns
S/N
Band width 20 MHz

−56

dB
Black extension inhibition delay
S/N
Y output amplitude
Ambient temp. dependency
Y/∆T
− 20°C to +70°C

±2

%
Y signal delay time
TDY
f = 5 MHz

19

ns
R−Y, B−Y input
dynamic range (HD)
DCIN1
Input−SW: HD
−
±0.7
−
V[p-p]
R−Y, B−Y input
dynamic range (NTSC)
DCIN2
Input−SW: NTSC standard
−
±1.1
−
V[p-p]
(2) Color difference-system
9
AN5394FB
ICs for TV
■ Electrical Characteristics at VCC = 9 V, VCC = 5 V, Ta = 25°C (continued)
The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
(2) Color difference-system (continued)
R−Y, B−Y input
dynamic range (DVD)
R−Y angle adjustment range (2)
DCIN3
Input−SW: DVD standard
−
±0.7
−
V[p-p]
θR2
R−Y input: 0.228 V[0-p]
B−Y input: 0.406 V[0-p]
R−Y axis: min.
−
0
−
°
Color difference contrast ratio
CCONT
Contrast: min. → max.
26
−
−
dB
Tint ambient temp. dependency
TC/T
−20°C to +70°C

±2

°C
Color difference signal delay time
TDC
f = 5 MHz

40

ns
Color difference output amplitude C/∆T
Ambient temp. dependency
−20°C to +70°C

±4

%
Chroma γ control (1)
γCHROMA(1)
Pin 40: Open → 3 V
White gradation SW: On
Gain: max, Level: typ.

2.0

Times
Chroma γ control (2)
γCHROMA(2)
Pin 40: Open → 6 V
White gradation SW: On
Gain: max, Level: typ.

0

Times
(3) Cross-talk
Y cross-talk
Y(main → OSD)
CT1
f = 10 MHz

−75

dB
Y cross-talk
Y(main ↔ RGB)
CT2
f = 10 MHz

−78

dB
Color difference cross-talk
R−Y(main → OSD)
CT3
f = 10 MHz

−67

dB
Color difference cross-talk
B−Y(main → OSD)
CT4
f = 10 MHz

−80

dB
Color difference cross-talk
R−Y(main → RGB)
CT5
f = 10 MHz

−66

dB
Color difference cross-talk
B−Y(main → RGB)
CT6
f = 10 MHz

−85

dB
Cross-talk (OSD → main)
CT7
f = 10 MHz

−54

dB
Cross-talk (OSD → RGB)
CT8
f = 10 MHz

−52

dB
Cross-talk between OSD
CT9
f = 10 MHz

−47

dB
Cross-talk (RGB → main)
CT10
f = 10 MHz

−44

dB
Cross-talk (RGB → OSD)
CT11
f = 10 MHz

−44

dB
Cross-talk between RGB
CT12
f = 10 MHz

−48

dB
OSD signal delay
tdOSD
f = 5 MHz

12

ns
RGB signal delay
tdRGB
f = 5 MHz

15

ns
Ys rise-up delay
trYs

31

ns
Ys fall delay
tfYs

40

ns
(4) OSD, RGB
10
ICs for TV
AN5394FB
■ Electrical Characteristics at VCC = 9 V, VCC = 5 V, Ta = 25°C (continued)
The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
(4) OSD, RGB (continued)
Ym rising delay
trYm

22

ns
Ym falling delay
tfYm

20

ns
RGB rising delay
trRGB

28

ns
RGB falling delay
tfRGB

43

ns
Pedestal change at Ys changeover ∆VP(Ys)
Ys: Low → varying amount of high

−40

mV
Pedestal change at Ym changeover ∆VP(Ym)
Ym: Low → varying amount of high

−40

mV
Pedestal change at RGB changeover ∆VP(RGB)
RGB: Low → varying amount of high

−40

mV
∆VP
(RGB+Ym)
RGB, Ym: Low → varying amount of
high

−50

mV

1.5

V[p-p]

±2

%

1.5

V[p-p]
Pedestal change at
RGB+Ym changeover
OSD input dynamic range
DOSD
OSD output amplitude
ambient temp. dependency
OSD
∆T
RGB input dynamic range
DRGB
RGB output amplitude
ambient temp. dependency
RGB
∆T
−20°C to +70°C

±2

%
R, B-in clamp voltage
variable range
∆VCLP
R-in, B-in−DC adj
min. → max.

200

mV
Blanking delay
tdBLK(1)
From BLK to BLK output

45

ns
Pedestal fluctuation at contrast
variation
∆VP(CONT)
Contrast: min. → max.

0

mV
Pedestal fluctuation
at color variation
∆VP(COLOR)
Contrast: min. → max.

0

mV

0

mV
−20°C to +70°C
(5) Cutoff drive
Pedestal fluctuation at tint variation ∆VP(TNIT)
Output pedestal potential
ambient temp. dependency
∆VP
∆T
−20°C to +70°C

−1.5

mV/°C
Spot killer operation
VSP
Lowering 9V system VCC
Pin 29: C = 10 µF

7.8

V
4 · 5 · 6DAC
DNLE
L1
1LSB = {DAT (max.)
− data(min.)}/(2N−1)
0.1
1.0
1.9
LSB
STep
8-bit DAC DNLE
(excluding 40, 80, CO)
L2
1LSB = {DAT (max.)
− data(min.)}/(2N−1)
0.1
1.0
1.9
LSB
STep
8-bit DAC DNLE
(for 40, 80, CO only)
L3
1LSB = {DAT (max.)
− data(min.)}/(2N−1)
−1.0
1.0
2.0
LSB
STep
7-bit DAC DNLE
(excluding 40)
L4
1LSB = {DAT (max.)
− data(min.)}/(2N−1)
0.1
1.0
1.9
LSB
STep
7-bit DAC DNLE
(for 40 only)
L5
1LSB = {DAT (max.)
− data(min.)}/(2N−1)
−1.0
1.0
2.0
LSB
STep
(6) I2C DAC
11
AN5394FB
ICs for TV
■ Terminal Equivalent Circuits
Pin No.
Equivalent circuit
Description
1
VCC 5 V (pulse VCC /pin 44)
50 kΩ
4V
VP+6H:
VP+6H pin
• Outputs the pulse whose width is pin 48 input
pulse plus 6H.
• Recommended use range: 200 µA to 0 µA
0V
200 Ω
42.5 kΩ
1
2
RGB-in:
RGB switch signal input pin
• Input threshold voltage: 1.4 V
1) 2.1 V < V2
Outputs the signal inputted from Pins 9, 10
and 11.
2) V2 < 0.9 V
Outputs the signal inputted from pins 13,
14, 15 or pins 37, 38, 39.
VCC 5 V (pulse VCC /pin 44)
40 µA
2
200 Ω
40 µA
5V
• Priority of signal switch
Ys > Ym > RGB
• Recommended use range: 0 V to 5 V
0V
3
VCC 5 V (pulse VCC /pin 44)
40 µA
3
200 Ω
40 µA
5V
0V
12
2.25 V
Note) If you switch main input to RGB input in a
high speed within 1H period, WB will be
changed. In this case, adjust R-in DC adj.
and B in DC adj. of the sub-address 16,17.
Ym in:
Half tone switch signal input pin
• Input threshold voltage: 1.4 V
1) 2.1 V < V3
Lowers the amplitude of the signal inputted from pins 9, 10, 11 or pins 37, 38, 39.
2) V3 < 0.9 V
Normal
• Priority of signal switch
Ys > Ym > RGB
• Recommended use range: 0 V to 5 V
2.25 V
ICs for TV
AN5394FB
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
4
VCC 5 V (pulse VCC /pin 44)
40 µA
4
200 Ω
40 µA
5V
Description
Ys in:
OSD switch signal input pin
• Input threshold voltage: 1.4 V
1) 2.1 V < V4
Outputs the OSD signal inputted from pins
13, 14 and 15.
2) V4 < 0.9 V
Outputs the OSD signal either from pins
9, 10, 11 or Pins 37, 38, 39.
• Priority of signal switching
Ys > Ym > RGB
2.25 V
• Recommended use range: 0 V to 5 V
0V
5
VCC 5 V (pulse VCC /pin 44)
5V
16 µA
40 µA
0V
2.25 V
5
200 Ω
500 Ω
5 kΩ
6
SCL:
I2C clock input pin
• Input threshold voltage: 2 V
• Recommended use range: 0 V to 5 V
VCC 5 V (pulse VCC /pin 44)
20 µA
Neck in:
Neck input pin
• Input threshold voltage: 1.4V
Hingh: V19, 20 ≥ 2.1 V
Low: V19, 20 ≤ 0.9 V
• Force the RGB output down to BLK level
when the input = high. At this time, BLKSW
(I2C) and the single color adjustment SW
(I2C) become invalid and the IK clamp pulse
is not outputted.
• Recommended use range: 0 V to 5 V
50 µA
3.25 V
2.75 V
Data
1 kΩ
6
200 Ω
13
AN5394FB
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
7
Description
SDA:
I2C bus input pin
• Input threshold voltage: 2 V
• Recommended use range: 0 V to 5 V
VCC 5 V (pulse VCC /pin 44)
20 µA
50 µA
3.25 V
2.75 V
Data
1 kΩ
200 Ω
7

8
9
10
11
GND:
GND pin
• Pin 8 : Pulse-system GND pin
VCC 9 V (analog VCC2 /pin 16)
1 kΩ
0.7 V[0-p]
1 kΩ
4.5 V
NP, 0.1 µF
Pins 9
10
11
12
14
200 Ω
40 µA

3.75 V
400 µA
RGB in:
RGB signal input pin for analog signal
• A standard input signal is 0.7 V[0-p] from a
black level to a white level.
Pin 9: R signal input pin
Pin 10: G signal input pin
Pin 11: B signal input pin
Drive them at a low impedance.
• Clamp an input signal with pin 43 clamp pulse.
• Recommended use range:Do not apply the DC
voltage from outside.
GND:
GND pin
• Pin 12: GND pin for OSD, RGB input circuit
ICs for TV
AN5394FB
■ Terminal Equivalent Circuits (continued)
Pin No.
13
14
15
Equivalent circuit
Description
VCC 9 V (analog VCC2 /pin 16)
0.7 V[0-p]
1 kΩ
1 kΩ
4.5 V
NP, 0.1 µF
200 Ω
Pins 13
14
15
40 µA
3.0 V
500 µA
16
9V
47 µF
Pins 16, 27, 28, 30
Circuit
0.01 µF
OSD in:
OSD signal input pin for analog signal
• A standard input signal is 0.7 V[0-p] from black
to white level
Pin 13: B signal input pin
Pin 14: C signal input pin
Pin 15: R signal input pin
Drive them at a low impedance.
• Clamp the input signal with pin 43 clamp pulse.
• Recommended use range:Do not apply the DC
voltage from outside.
VCC 9 V:
Signal-system power supply pin
• Apply 9 V for use.
• Pin 16: OSD, RGB input circuit power supply
pin
(pair with pin 12 GND)
Pin 27: RGB output circuit power supply pin
(pair with pin 18 GND)
Pin 28: RGB output circuit power supply pin
(pair with pin 17 GND)
Pin 30: Analog power supply pin
(pair with pin 42 GND)
• Recommended use range: 8.1 V to 9.9 V
17

GND:
GND pin
• Pin 17: GND pin for RGB output circuit
18

GND:
GND pin
• Pin 18: GND pin for RGB output circuit
19
R, G, B-out:
RGB output pin
28
• Output dynamic range
1.5 V to 7.5 V
• Use the standard output pedestal at approx. 3 V.
• Pin 23: R output pin
Pin 21: G output pin
Pin 19: B output pin
Pins 19, 21, 23 • Recommended use range: −4 mA to +4 mA
VCC 9 V (RGB output VCC1, 2 / pins 27, 28)
27
200 µA
50 Ω
80 Ω
200 µA
50 Ω
15
AN5394FB
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
20
VCC 9 V (RGB output VCC1 /pin 27)
DC
66 µA
200 µA
Pins 20,22,24 200 Ω
0.1 µF
14 kΩ
200 Ω
3V
1 kΩ
1 kΩ
21
Refer to pin 19
Refer to pin 19
22
Refer to pin 20
Refer to pin 20
23
Refer to pin 19
Refer to pin 19
24
Refer to pin 20
Refer to pin 20
25
IK:
IK input pin
• Clamps a feed-back input signal of auto
cutoff-pulse.
• Recommended use range: Do not apply DC voltage from outside.
1 kΩ
1 kΩ
25 kΩ
25 kΩ
VCC 9 V (RGB output VCC1 /pin 27)
3.0 V
3 kΩ
200 µA
200 Ω
600 µA
25
16
RGB-S/H:
Pin to sample-hold the auto cutoff signal
• Use a less-leak capacitor to hold during V
period. Also be careful of the leak between
pins.
• Ground on use if you do not use an auto-cutoff.
Pin 20: for B signal
Pin 22: for G signal
Pin 24: for R signal
• Recommended use range: 0 V to 5 V
3 kΩ
4 PF
1 kΩ
3V
ICs for TV
AN5394FB
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
26
Description
Blooming level in:
• Input pin to determine a blooming level
50 µA
100 µA
VCC 9 V (analog VCC1 /pin 30)
24 kΩ
DC voltage
Output clip level
3.3 kΩ
50 µA
5.25 V
100 µA
1 kΩ 300 Ω
26
V26
3V
5V
• Recommended use range: 1.5 V to 5 V
27
Refer to pin 16
Refer to pin 16
28
Refer to pin 16
Refer to pin 16
29
VCC 9 V (analog VCC1 /pin 30)
Spot killer in:
Spot killer pin
• Used to quickly discharge the electricity of
the CRT when the set is turned-off.
• Raises DC voltage of RGB output pins (pins
19, 21 and 23) when RGB output VCC 9 V
(pin 27) becomes low.
VCC 9 V
10 kΩ
1.75 kΩ
29
10 µF
to RGB
output
circuit
30
100 kΩ
Refer to pin 16
31
32
33
Refer to pin 16
VCC 9 V (analog VCC1 /pin 30)
2 kΩ
1 kΩ
400 µA
DC voltage
200 Ω
1 kΩ
14 kΩ
3.75 V
0.1 µF
Pins 31
32
33
200 Ω
3V
1 kΩ
1 kΩ
RGB CLP:
Clamps the main signal to the voltage proportioned to brightness data.
• Shorten the distance between the pin and the
external capacitor.
Pin 33: R signal clamp pin
Pin 32: G signal clamp pin
Pin 31: B signal clamp pin
• Recommended use range: 0 V to 5 V
(Do not apply DC voltage from outside.)
1 kΩ
17
AN5394FB
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
34
Description
VCC 9 V (analog VCC1 /pin 30)
50 µA
DC voltage
3 kΩ
200 Ω
200 Ω
3V
R
C
34
3 kΩ
APL det.:
APL detection pin for main signal
• Outputs the voltage proportioned to main
signal
• Fit an RC filter at this pin.
R: For adjusting detection sensitivity
C: For adjusting tracking characteristics
• Recommended use range: 0 V to 3 V
35
VCC 9 V (analog VCC1 /pin 30)
DC voltage
35
200 Ω
200 Ω
1.5 kΩ
6 kΩ
300 Ω
40 µA
Black peak det.:
Detecting the blackest level of main signal
• Externally fit an RC filter at this pin.
• Corrects a black gradation with this detection
voltage
R: For adjusting the detection sensitivity
C: For adjusting the tracking characteristics
• Recommended use range: 0 V to 9 V
18 pF
300 µA
40 µA
R
C
7 kΩ
36
VCC 9 V (analog VCC1 /pin 30)
C
R
200 µA
50 µA
9V
200 Ω
36
DC voltage
200 Ω
18
4 kΩ
50 kΩ
250 Ω
40 µA
200 Ω
White peak det.:
Detecting the darkest level of main signal
• Externally fit an RC filter between this pin
and VCC.
• Makes a white gradation correction and a
blooming control with this detection voltage.
R: For adjusting detection sensitivity
C: For adjusting tracking characteristics
• Recommended use range: 0 V to 9 V
ICs for TV
AN5394FB
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
37
VCC 9 V (analog VCC1 /pin 30)
0.7 V[0-p]
1 kΩ
1 kΩ
5.25 V
NP, 0.1 µF
37
3.75 V
400 µA
38
39
VCC 9 V (analog VCC1 /pin 30)
1 kΩ
± 0.35 V
Y-in:
Y input pin for main signal
• Input 0.7 VB-W
• Drive this pin with a low impedance. A high
impedance is likely to change a white balance for the volume on the user side.
• Clamps the input signal with a clamp pulse
of pin 43.
• Recommended use range: Do not apply DC
voltage from outside.
1 kΩ
R−Y in, B−Y in:
R−Y, B−Yinput pin for main signal
• Pin 38: R−Y signal input pin
Pin 39: B−Y signal input pin
• Color bar input amplitude at switching the
G−Y matrix
HD
5.25 V
NP, 0.1 µF
Pins 38
39
3.75 V
400 µA
NTSC
DVD
Pin 38
± 0.35 V ± 0.245 V ± 0.35 V
Pin 39
± 0.35 V ± 0.312 V ± 0.35 V
• Drive this pin with a low impedance. A high
impedance is likely to change a white balance for the volume on the user side.
• Clamps the input signal with a clamp pulse
of pin 43.
• Recommended use range: Do not apply DC
voltage from outside.
19
AN5394FB
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
40
Description
50 µA
VCC 9 V (analog VCC1 /pin 30)
3.75 V
DC
4.5 V
±1.5 V
20 kΩ
20 kΩ
4.5 V
50 µA
5.25 V
0.01 µF
41
16 kΩ
5.2 kΩ
16 kΩ
40
DC voltage
41
100 µA
3.5 V
40 kΩ
3.5 V
40 kΩ
100 µA
VCC 9 V (analog VCC1 /pin 30)
5.2 kΩ
7V
4 kΩ
7V
Chroma γ cont.:
External pin for chroma signal γ correction
control
• Correcting the color level inside the IC in
order to adjust Y/C-Y ratio depending on
white gradation correction of Y signal. This
pin is for external control on this correction
value.
• Controls the correction value of color level
for 2 to 0 times the open mode by means of
applied voltage.
• Recommended use range: 3.0 V to 6.0 V
ABL/ACL in:
Control voltage input pin for ABL/ACL
• Apply the signal inversely proportional to
the screen brightness of CRT.
• Operating range is 7 V to 2 V.
• Possible to control contrast and brightness in
inverse proportion to the applied voltage
(Controls the main signal and the OSD
signal)
• Recommended use range: 0 V to 9 V
4 kΩ
5.2 kΩ

42
43
GND:
GND pin
• Pin 42: Analog GND pin
VCC 9 V (pulse VCC /pin 44)
40 µA
43
200 Ω
40 µA
5V
0V
20
2.25 V
CLP in:
Clamp pulse input pin
• Input threshold voltage: 1.4 V
(to clamp at high)
• Clamps the signal inputted from the pins
below.
Pins 9, 10, 11, 13, 14, 15, 37, 38, 39
• Recommended clamp pulse width:
NTSC: 2.5 µs
HD: 1.0 µs
• Recommended use range: 0 V to 5 V
ICs for TV
AN5394FB
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
44
5V
47 µF
44
Circuit
0.01 µF
45
VCC 5 V (pulse VCC /pin 44)
16 µA
40 µA
5V
0V
2.25 V
200 Ω
45
500 Ω
5 kΩ
46
VCC 5 V (pulse VCC /pin 44)
16 µA
40 µA
5V
0V
2.25 V
46
200 Ω
500 Ω
5 kΩ
VCC 5 V:
Pulse-system supply voltage pin
• Apply 5 V on use.
• Pin 44: Pulse-system supply voltage pin
(pair with pin 8 GND)
• Recommended use range: 4.5 V to 5.5 V
DI in:
Input pin for correction inhibition pulse
• Input threshold voltage: 1.4 V
High: V45 ≥ 2.1 V
Low: V45 ≤ 0.9 V
• At the input high, the following Y-signal
corrections are inhibited.
Black gradation correction: Det. and corr.
inhibited
White gradation correction: Det. and corr.
inhibited
DC transfer amount correction: Det. and corr.
inhibited
• In the DI pin input, only detection is
inhibited, but correction is left uninhibited.
• Recommended use range: 0 V to 5 V
BLK in:
Blanking pulse input pin
• Input threshold voltage: 1.4 V
High: V46 ≥ 2.1 V
Low: V46 ≤ 0.9 V
• Blanking RGB output at input = high
• At input = high, the following Y-signal
corrections are inhibited:
Black gradation correction: Detection and
correction inhibited
White gradation correction: Detection and
correction inhibited
DC transfer amount correction: Detection
and correction inhibited
• At BLK-SW/off, the BLK is released, but the
above-mentioned correction is not released.
• Recommended use range: 0 V to 5 V
21
AN5394FB
ICs for TV
■ Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
47
VCC 5 V (pulse VCC /pin 44)
40 µA
40 µA
5V
0V
1.5 V
200 Ω
47
HP in:
HP pulse input pin
• Input threshold voltage: 1.4 V
• Does BLK on the RGB output at input = high
High input: V47 ≥ 2.1 V
Low input: V47 ≤ 0.9 V
• The auto cutoff timing pulse is generated by
HP pulse.
• Recommended use range: 0 V to 5 V
5 kΩ
500 Ω
40 kΩ
48
VCC 5 V (pulse VCC /pin 44)
40 µA
40 µA
5V
0V
1.5 V
48
200 Ω
5 kΩ
500 Ω
22
40 kΩ
VP in:
VP pulse input pin
• Input threshold voltage: 1.4 V
High input: V48 ≥ 2.1 V
Low input: V48 ≤ 0.9 V
• The data for color, tint, brightness and
contrast will be re-written at the time when
VP pulse goes high to low. But at DAC SW
(V-latch Mode): In the through mode, the
data will be rewritten according to the timing
sent, regardless of VP pulse.
• Auto cutoff timing pulse will be generated
according to VP pulse.
• Be sure to keep the VP pulse width more
than 6H.
• Recommended use range: 0 V to 5 V
ICs for TV
AN5394FB
■ Application Note
1. PD  Ta curves of QFP048-P-1212B
PD  T a
2.500
Power dissipation PD (W)
2.000
1.959
For mounting on the standard PCB
(glass epoxy board
75 mm × 75 mm × 0.8 mm)
Rth (j-a) = 63.8°C/W
1.500
1.064
1.000
Independent IC
without a heat sink
Rth (j-c) = 117.4°C/W
0.500
0.000
0
25
50
75
100
125
150
Ambient temperature Ta (°C)
23
AN5394FB
ICs for TV
■ Application Note (continued)
2. I2C bus
1) Sub address byte and data byte format: ( ) is for initial state.
Sub
address
00
(41H)
01
(41H)
02
(81H)
03
(41H)
04
(81H)
05
(81H)
06
(81H)
07
(01H)
08
(01H)
09
(01H)
0A
(01H)
0B
(81H)
0C
(81H)
0D
(81H)
0E
(89H)
0F
(89H)
10
(89H)
11
(89H)
12
(89H)
13
(21H)
14
(09H)
15
(09H)
16
(41H)
17
(41H)
18
(01H)
19
(01H)
24
Data byte
D7
D6
D5
D4
D3
D2
D1
D0
Color(V latch)
Tint(V latch)
Brightness(V latch)
Contrast(V latch)
Drive R
Drive G
Drive B
Cutoff R
Cutoff G
Cutoff B
Cutoff SW R
Cutoff SW G
Cutoff SW B
Color temperature correction R
Color temperature correction G
Color temperature correction B
ACL gain level
ACL start level
ABL gain level
ABL start level
Black gradation correction gain
Black gradation correction level
White gradation correction gain
White gradation correction level
White character correction gain
White character correction level
G-Y SW
B-Y axis gain
Input SW
R-Y axis angle
RGB limit
R in DC adj.
1H/2H
B in DC adj.
changeover
White gradation Black gradation Cutoff
DC
Single color Single color Single color Blanking reproduction
/contrast
/contrast
adjustment R adjustment G adjustment B
off
interlocking auto/manual
ratio polarity interlocking
DC
transfer Auto cutoff
gradation Black gradation amount
V-latch
current
ABL off White
Test mode
ACL off
correction off correction off correction
through
off changeover
ICs for TV
AN5394FB
■ Application Note (continued)
2. I2C bus control contents
1) I2C bus protocol
S
Slave address
Start condition
O
Write
A
Sub address
A
Data byte
A
Acknowledge bit
P
Stop condition
2) Slave address
The slave address of this IC is 84H.
3) Since the data status at power on is not guaranteed, be sure to send data to all addresses before using.
4) Sub-address data
DAC name
bit Sub
Data address(H)
address(H) ( )Standard status
Operation
Remarks
Color control
7
00
00 to (40) to 7F
Chroma amplitude upped with With V latch
data upped Complete iris of → Refer to "(5) V latch opdata(00) color with
eration" in ■ Application Note
for details.
Tint control
7
01
00 to (40) to 7F
Direction to make the flesh
tone red with data(00)
Direction to make the flesh
tone green with data(7F)
With V-latch
Brightness
control
8
02
00 to (80) to FF
Pedestal upped with data
upped
With V-latch
Contrast control
7
03
00 to (40) to (7F) Signal amplitude upped with With V-latch
data upped complete iris of
color with data(00)
Drive (R)
8
04
00 to (40) to 7F
R gain upped with data upped
Drive (G)
8
05
00 to (40) to 7F
G gain upped with data upped
B gain upped with data upped
Drive (B)
8
06
00 to (40) to 7F
Cufoff (R)
8
+
2SW
07
+
0A
(00) to 80 to FF
Cutoff (R)
R output pedestal
00 to (80) to C0
07 00
0A 00
R-out pedestal is
upped with data up
30LSB
30LSB
30LSB
FF 00
40
2.0 V
FF 00
80
FF 00
C0
FF
25
AN5394FB
ICs for TV
■ Application Note (continued)
2. I2C bus control contents (continued)
4) Sub-address data (continued)
8
+
2SW
08
+
0A
Operation
Cutoff(G)
00 to (20) to 30
08 00
0A 00
8
+
2SW
09
+
0A
8
0B
30LSB
30LSB
30LSB
FF 00
10
2.0 V
FF 00
20
FF 00
30
B-out pedestal is
upped with data up
30LSB
30LSB
30LSB
FF 00
04
2.0 V
FF 00
08
00 to 80 to (FF)
at manual
cutoff
Used for color temperature
correction at manual cutoff.
00 to (80) to FF
at auto cutoff
At auto-cutoff, R-out
pedestal is upped with data
up
0C
00 to 80 to (FF)
at manual
cutoff
Used for color temperature
correction at manual cutoff.
00 to (80) to FF
at auto cutoff
At auto-cutoff, G-out
pedestal is upped with data
up
FF
Color temperature
correction G
0.64 V
00
26
FF
0.64 V
G output pedestal
8
FF 00
0C
Color temperature
correction R
00
Color temperature
correction (G)
FF
Cutoff (B)
00 to (08) to 0C
09 00
0A 00
Color temperature
correction (R)
G-out pedestal is
upped with data up
(00) to 80 to FF
B output pedestal
Cutoff (B)
Remarks
(00) to 80 to FF
G output pedestal
Cutoff (G)
bit Sub
Data address(H)
address(H) ( )Standard status
R output pedestal
DAC name
FF
ICs for TV
AN5394FB
■ Application Note (continued)
2. I2C bus control contents (continued)
4) Sub-address data (continued)
Color temperature
correction (B)
bit Sub
Data address(H)
address(H) ( )Standard status
8
0D
Operation
00 to 80 to (FF) Used for color temp.
at manual
correction at manual cutoff.
cutoff
B-out pedestal is upped with
00 to (80) to FF data up
at auto cutoff
Remarks
Color temp.
correction B
B output pedestal
DAC name
0.64 V
00
4
0E(L)
lower
4-bits
00 to (08) to 0F
Pin 41: Adjusts the start level
of output amplitude
change against the
voltage of ABL/ACL
pin
FF F8
Output amplitude
(V[p-p])
ACL
start level
FF
F0
ACL gain
4
0E(H)
upper
4-bits
00 to (80) to F0
Pin 41: Adjusts the start level
of output amplitude
change against the
voltage of ABL/ACL
pin
Output amplitude
(V[p-p])
ABL/ACL (V)
08
88
F8
ABL/ACL (V)
4
0F(L)
lower
4-bits
00 to (08) to 0F
Pin 41: Adjusts the start level
of output amplitude
change against the
voltage of ABL/ACL
pin
FF F8
Pedestal (V)
ABL
start level
F0
ABL gain
4
0F(H)
upper
4-bits
00 to (80) to F0
Pin 41: Adjusts the start level
of output amplitude
change against the
voltage of ABL/ACL
pin
Pedestal (V)
ABL/ACL (V)
08
88
F8
ABL/ACL (V)
27
AN5394FB
ICs for TV
■ Application Note (continued)
2. I2C bus control contents (continued)
4) Sub-address data (continued)
Black gradation
correction gain
bit Sub
Data address(H)
address(H) ( )Standard status
4
10(H)
Upper
4-bit
00 to (80) to F0
Operation
Adjusts the gain to be corrected at correcting the black
extension
Remarks
Correction on (V)
DAC name
Black level
08
88 F8
Black gradation
correction start
level
4
10(H)
Lower
4-bit
00 to (08) to 0F
Adjusts signal level where
black extension correction
starts
Correction on (V)
Correction off (V)
Black level
8F
88
80
Correction off (V)
4
11(H)
Upper
4-bit
00 to (80) to F0
Adjusts correction amount
at correcting the gamma
00
Output
White gradation
correction gain
80
F0
White gradation
correction level
4
11(H)
Lower
4-bit
00 to (80) to 0F
Adjusts a converging point
at correcting the gamma
Output
Input
FF
F8
F0
White character
correction gain
4
12(H)
Upper
4-bit
(00) to 80 to F0
Adjusts a detecting(or slicing)
level for white characters
B correction on (V)
Input
Output amplitude
8F 88
80
*Y-in input
4
12(H)
Lower
4-bit
(00) to 08 to 0F
Adjusts the amount to add
the sliced white signal to (B)
B correction on (V)
Correction off (V)
White character
correction start
level
Output amplitude
F8 88 08
*Y-in input
Correction off (V)
28
ICs for TV
AN5394FB
■ Application Note (continued)
2. I2C bus control contents (continued)
4) Sub-address data (continued)
DAC name
B−Y axis gain
bit Sub
Data address(H)
address(H) ( )Standard status
6
13
00 to (20) to 3F
Operation
Remarks
Adjusts B−Y gain in accorB-Y output
dance with 3 modes of HD/ at rainbow signal input
NTSC
B−Y
G(B-Y)
Data up →
R−Y
Gain ratio up
B-Y axis gain =
G(B-Y)
G(R-Y)
G(B-Y) is variable.
G−Y matrix
SW
R−Y angle
adjustment
2
4
11XXXXXX
00XXXXXX
14
(X0) to XF
G-Y matrix changeover
(Standard/matrix/matrix2)
Note) Normally use it at either
Standard (HD): 00
Standard (NTSC, DVD): 11
Matrix 1 (NTSC, DVD): 10
HD or standard.
Matrix 2 (NTSC, DVD): 01
Carries out R−Y angle adjustment in accordance with maR-Y output
trix changeover data up →
at rainbow signal input
90° (+ 0° to +19°)
1F
00
90°
Note) Normally use it at the
G(R-Y)
angle of 90°
R-Y angle adjustment
R-Y output peak moves.
Input SW
4
00XXXXXX
11XXXXXX
Output matrix changeover
(Standard/matrix/matrix2)
Standard (HD, NTSC, DVD): 00
Matrix 1 (NTSC, DVD): 10
Note) Normally use it at
Matrix 2 (NTSC, DVD): X1
standard.
RGB limit
4
15
(X0) to XF
Input signal changeover
(HD/NTSC/DVD)
The RGB output limited level
is lowered when data is upped.
HD: 00
NTSC: 10
DVD: X1
Output level
XX00XXXX
XX11XXXX
X0
X8
XF
*Y-in input
Input level
29
AN5394FB
ICs for TV
■ Application Note (continued)
2. I2C bus control contents (continued)
4) Sub-address data (continued)
DAC name
bit Sub
Data address(H)
address(H) ( )Standard status
Operation
Remarks
R-in DC. adj.
7
16
00 to (40) to 7F
The input clamp voltage of
R-in (pin 9) rises with data
up.
WB is likely to vary in switching
the main and RGB screen within
1H period with a high speed.
B-in DC. adj.
7
17
00 to (40) to 7F
The input clamp voltage of
B-in (pin 11) rises with data
up.
It is possible to adjust the position error of WB by controlling
an input clamp voltage.
1H/2H SW
1
1XXXXXXX
0XXXXXXX
Timing pulse width changeover for auto cutoff.
1H (normal): 0
2H (progressive scan): 1
Note) Use it at standard except
for progressive scan
Single color
adjustment R-off
SW12-7
0XXXXXXX
1XXXXXXX
Blanking R output only.
Normal: 0
R-BLK: 1
Single color
1
adjustment G-off
SW12-6
X0XXXXXX
X1XXXXXX
Blanking G output only.
Normal: 0
G-BLK: 1
Single color
adjustment B-off
SW12-5
1
XX0XXXXX
XX1XXXXX
Blanking B output only.
Normal: 0
B-BLK: 1
Blanking off
SW12-4
1
XXX0XXXX
XXX1XXXX
Output blanking on/off
changeover
With BLK: 0
Without BLK: 1
DC regeneration
ratio polarity
SW12-3
1
XXXX0XXX
XXXX1XXX
(+side)Pedestal down with APL up
(−side)Pedestal up with APL up
−: 0
+: 1
White gradation correction/contract interlocking SW12-2
1
XXXXX0XX
XXXXX1XX
(On side) White gradation
correction level is upped in
sequence with contrast up.
Interlocking: 0
Non-interlocking: 1
Black gradation correction/contrast interlocking SW12-1
1
XXXXXX0X
XXXXXX1X
(On side) Black gradation
correction level is upped in
sequence with contrast up.
Interlocking: 0
Non-interlocking: 1
Cutoff manual/
auto
SW12-0
1
XXXXXXX0
XXXXXXX1
30
1
18
Auto: 0
Manual: 1
ICs for TV
AN5394FB
■ Application Note (continued)
2. I2C bus control contents (continued)
4) Sub-address data (continued)
DAC name
bit Sub
Data address(H)
address(H) ( )Standard status
DAC mode
SW19-7
1
V-Latch mode
SW19-6
19
Operation
Remarks
0XXXXXXX
1XXXXXXX
Bits for inspection
Be sure to use it with 0
1
X0XXXXXX
X1XXXXXX
Through mode changeover
for V-latch DAC
Normal: 0
Through: 1
ACL
SW19-5
1
XX0XXXXX
XX1XXXXX
ACL on/off changeover
On: 0
Off: 1
ABL
SW19-4
1
XXX0XXXX
XXX1XXXX
ABL on/off changeover
On: 0
Off: 1
White gradation
correction
SW19-3
1
XXXX0XXX
XXXX1XXX
White gradation correction
on/off changeover
On: 0
Off: 1
Black gradation
correction
SW19-2
1
XXXXX0XX
XXXXX1XX
Black gradation correction
on/off changeover
On: 0
Off: 1
DC transmission
amount correction
SW19-1
1
XXXXXX0X
XXXXXX1X
DC transfer amount on/off
changeover
On: 0
Off: 1
Auto cuttoff current changeover
SW19-0
1
XXXXXX0X
XXXXXX1X
Auto cutoff current
changeover to large/small
Small current: 0
Large current: 1
31
AN5394FB
ICs for TV
■ Application Note (continued)
2. I2C bus control contents (continued)
5) V-latch operation
(Function) The data for sub-address 00 to 03 remains unchanged until VP pulse comes.
I2C bus
Data 1
transfer
Data 2
transfer
VP
IC ouput
Old data
Data 1
Data 2
6) Auto increment: This IC performs the designation of sub address by using the lower 5 bits. The uppermost bit is
used for designation of auto increment.
• When the sub address uppermost bit is defined as 0 (sub address: 00 to 19 HEX)
The sequential data transfer leads to the sequential change of sub address, then the data is inputted.
I2C bus
transfer
Slave
address
Sub address
X
Sub address
X
X+1
X+2
Data
1
Data
2
Data
3
Input data
Data 1
Data 2
Data 3
The data is inputted as above. But the data will be invalid after sub address 1A.
• When the sub address uppermost bit is defined as 1 or sub address is 80 to 99 HEX, the sequential data transfer
leads to data input on the same address.
I2C bus
transfer
Slave
address
Sub address
8Y
Sub address
8Y
8Y
8Y
32
Data
1
Input data
Data 1
Data 2
Data 3
Data
2
Data
3
ICs for TV
AN5394FB
VCC 9 V
■ Application Circuit Example
37
38
B-Y in
39 R-Y
G-CLP
B-CLP
Analog VCC
Spot killer in
RGB out-VCC2
RGB out-VCC1
Blooming DC in
IK
32
31
30
29
28
27
26
25
33
R-CLP
APL det.
11
12
Analog GND2
3
10
2
Ym
48
RGB SW
VP in
OSD block
Pulse block
B-in
47
RGB
G-in
HP in
RGB (OSD)
9
46
I2C block
R-in
BLK in
G-out
B-S/H
19
8
45
ABL/ACL
block
GND 5 V
44
DI in
20
7
VCC 5 V
R-out
G-S/H
21
RGB out
block
B
B-Y
6
43
G-Y
SCL
CLP in
Chroma
block
22
G
SDA
42
Matrix
block
R-Y
5
Analog GND1
23
4
41
B-Y
R-S/H
R
Ys
ABL/ACL
24
Y'
Video
block
NECK in
40
VCC 9 V
Y
1
Chroma γ cont.
VCC 5 V
Black peak det.
Y in
R-Y in
VP+6H
± 0.35 V
B-Y
35
± 0.35 V
R-Y
White peak det.
0.7 V[0-p]
Y
36
Analog YUV signal
(HD/NISC/DVD)
B-out
18
RGB out-GND1
17
RGB out-GND2
16
Analog VCC2
15
OSD-R in
14
OSD-G in
13
OSD-B in
Analog RGB signal
0.7 V[0-p]
Analog YUV signal
(HD/NTSC/DVD)
Analog RGB signal
Video signal
HD
NTSC/DVD
Chrominance signal
NTSC
HD
Y
650
551
501
199
149
50
Y
623
490
413
287
210
77
Pr
32
R-Y
77
295
Cr
0
0
0
−80
−270
−350
55
0
−77
−413
623
−490
413
210
−32
−318
350
−350
270
80
Pb
350
413
318
700
DVD
490
350
700
VCC 9 V 0.7 V[0-p]
B-Y
0
−210
−413
−623
Y = 0.2125R + 0.7154G + 0.0721B Y= 0.3R + 0.59G + 0.11B
Pr = 0.6349(R-Y)
Pb = 0.5389(B-Y)
−55
−295
350
−350
232
118
Cb
0
−118
−232
−350
Y = 0.3R + 0.59G + 0.11B
Cr = R-Y/1.4
Cb = B-Y/1.78
33