INTERSIL ISL28156_08

ISL28156, ISL28256
®
Data Sheet
February 11, 2008
39µA Micropower Single and Dual
Precision Rail-to-Rail Input-Output (RRIO)
Low Input Bias Current Op Amps
The ISL28156 and ISL28256 are micropower precision
operational amplifiers optimized for single supply operation
at 5V and can operated down to 2.4V.
These devices feature an Input Range Enhancement Circuit
(IREC), which enables them to maintain CMRR performance
for input voltages greater than the positive supply. The input
signal is capable of swinging 0.5V above a 5.0V supply (0.25
for a 2.5V supply) and to within 10mV from ground. The
output operation is rail-to-rail.
The 1/f corner of the voltage noise spectrum is at 1kHz. This
results in low frequency noise performance, which can only
be found on devices with an order of magnitude higher than
the supply current.
ISL28156 and ISL28256 can be operated from one lithium
cell or two Ni-Cd batteries. The input range includes both
positive and negative rail. The output swings to both rails.
Ordering Information
PART NUMBER
(Note)
PART
MARKING
Features
• 39µA typical supply current
• 5nA max input bias current
• 250kHz gain bandwidth product (AV = 1)
• 2.4V to 5.5V single supply voltage range
• Rail-to-rail input and output
• Enable pin (ISL28156 only)
• Pb-free (RoHS compliant)
Applications
• Battery- or solar-powered systems
• 4mA to 20mA current loops
• Handheld consumer products
• Medical devices
• Sensor amplifiers
• ADC buffers
• DAC output amplifiers
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL28156FHZ-T7*
GABV
6 Ld SOT-23
MDP0038
ISL28156FBZ
28156 FBZ
8 Ld SOIC
MDP0027
ISL28156FBZ-T7*
28156 FBZ
8 Ld SOIC
MDP0027
Coming Soon
ISL28256FBZ
28256 FBZ
8 Ld SOIC
MDP0027
Coming Soon
ISL28256FBZ-T7*
28256 FBZ
8 Ld SOIC
MDP0027
Coming Soon
ISL28256FUZ
8256Z
8 Ld MSOP
MDP0043
Coming Soon
ISL28256FUZ-T7*
8256Z
8 Ld MSOP
MDP0043
Pinouts
OUT 1
V- 2
+ -
6 V+
NC 1
5 ENABLE
IN- 2
4 IN-
IN+ 3
8 ENABLE
7 V+
+
6 OUT
V- 4
OUT_A 1
IN-_A 2
IN+_A 3
V- 4
8 V+
- +
+ -
5 NC
ISL28256
(8 LD MSOP)
TOP VIEW
ISL28256
(8 LD SOIC)
TOP VIEW
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
ISL28156
(8 LD SOIC)
TOP VIEW
ISL28156
(6 LD SOT-23)
TOP VIEW
IN+ 3
1
FN6154.4
OUT_A 1
7 OUT_B
IN-_A 2
6 IN-_B
IN+_A 3
5 IN+_B
V- 4
8 V+
7 OUT_B
- +
+ -
6 IN-_B
5 IN+_B
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006, 2007, 2008. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL28156, ISL28256
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Resistance
θJA (°C/W)
6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
230
6 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . .
110
8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . .
115
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VOS
V+ = 5V, V- = 0V,VCM = 2.5V, TA = +25°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data
established by characterization.
DESCRIPTION
Input Offset Voltage
CONDITIONS
MIN
(Note 1)
TYP
MAX
(Note 1)
UNIT
8 Ld SOIC
-120
-200
-7
120
250
µV
6 Ld SOT-23
-400
-450
-7
400
450
µV
ΔV OS
--------------ΔT
Input Offset Drive vs Temperature
IOS
Input Offset Current
-1.5
-5
0.34
1.2
2.5
nA
IB
Input Bias Current
-2
-3.5
1.14
5
5
nA
1.5
µV/°C
EN
Input Noise Voltage Density
FO = 1kHz
46
nV/√Hz
IN
Input Noise Current Density
FO = 1kHz
0.14
pA/√Hz
CMIR
Input Common-Mode Voltage Range
CMRR
Common-Mode Rejection Ratio
VCM = 0V to 5V
80
75
110
dB
PSRR
Power Supply Rejection Ratio
VS = 2.4V to 5V
90
75
104
dB
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4.5V, RL = 100kΩ
200
175
412
V/mV
VO = 0.5V to 4.5V, RL = 1kΩ
35
30
70
V/mV
VOUT
Maximum Output Voltage Swing
0
Output low, RL = 100kΩ
Output low, RL = 1kΩ
SR
Slew Rate
GBW
Gain Bandwidth Product
IS,ON
Supply Current, Enabled
2
5
V
3
6
8
mV
130
150
200
mV
Output high, RL = 100kΩ
4.992
4.99
4.985
V
Output high, RL = 1kΩ
4.85
4.8
4.88
V
0.05
V/µs
AV = 1
250
29
18
39
kHz
47
56
µA
FN6154.4
February 11, 2008
ISL28156, ISL28256
Electrical Specifications
PARAMETER
V+ = 5V, V- = 0V,VCM = 2.5V, TA = +25°C unless otherwise specified.
Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data
established by characterization. (Continued)
DESCRIPTION
MIN
(Note 1)
CONDITIONS
TYP
MAX
(Note 1)
10
14
16
UNIT
IS,OFF
Supply Current, Disabled
IO+
Short-Circuit Output Current
RL = 10Ω
28
23
31
mA
IO-
Short-Circuit Output Current
RL = 10Ω
24
18
26
mA
VSUPPLY
Supply Operating Range
Guaranteed by PSRR test
2.4
VENH
Enable Pin High Level
VENL
Enable Pin Low Level
0.8
V
IENH
Enable Pin Input Current
VEN = 5V
0.7
1
1.2
1.2
µA
IENL
Enable Pin Input Current
VEN = 0V
10
16
25
30
nA
tEN
Enable to Output On-state Delay Time
(ISL28156)
VOUT = 1V (enable state); VEN = High to
Low
10.8
µs
tEN
Enable to Output Off-state Delay Time
(ISL28156)
VOUT = 0V (disabled state) VEN = Low to
High
0.1
µs
5
2
µA
V
V
NOTE:
1. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.
Typical Performance Curves
3
RL = 1k
1
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
2
0
-1
RL = 10k
-2
RL = 100k
-3
-4
-5
AV = 1
CL = 16.3pF
VOUT = 10mVP-P
-6
-7
-8
1k
10k
100k
FREQUENCY (Hz)
1M
8
7
6
5
4
3
2
1
0
-1
-2
-3
-4
-5
-6
-7
-8
GAIN (dB)
50
40
Rf = 100k, Rg = 1k, RL = 10k
30
20
10
Rf = 9.09, Rg = 1k, RL = INF
0
Rf = 0, Rg = INF, RL = 10k
-10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 3. CLOSED LOOP GAIN vs FREQUENCY
3
CL = 43.3pF
CL = 38.3pF
CL = 34.3pF
AV = 1
RL = 10k
VOUT = 10mVP-P
1k
10k
100k
FREQUENCY (Hz)
1
RL = 10k
CL = 16.3pF
VOUT = 10mVP-P
1M
VS = 2.4V
0
NORMALIZED GAIN (dB)
60
Rf = 1M, Rg = 1k, RL = 10k
CL = 55.3pF
CL = 49.3pF
FIGURE 2. GAIN vs FREQUENCY vs CL
FIGURE 1. GAIN vs FREQUENCY vs RL
70
CL = 63.3pF
-1
VS = 5V
-2
-3
-4
-5
-6
AV = 1
RL = 10k
-8
VOUT = 10mVP-P
-9
1k
10k
-7
100k
1M
FREQUENCY (Hz)
FIGURE 4. GAIN vs FREQUENCY vs VS
FN6154.4
February 11, 2008
ISL28156, ISL28256
Typical Performance Curves (Continued)
3
0
VOUT = 50mV
1
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
1
VOUT = 10mV
2
0
-1
-2
VOUT = 100mV
VOUT = 1V
-3
-4
-5
AV = 1
RL = 1k
CL = 16.3pF
-6
-7
-8
1k
-1
100k
-4
-5
-6
-7
-9
1M
VOUT = 10mV
-3
-8
10k
VOUT = 1V
-2
VOUT = 50mV
AV = 1
RL = 10k
CL = 16.3pF
VOUT = 100mV
1k
10k
FREQUENCY (Hz)
-1
0
VOUT = 1V
-10
-2
-3
CMRR (dB)
NORMALIZED GAIN (dB)
10
VOUT = 10mV
0
VOUT = 50mV
-4
-5
-6
-8
-9
VOUT = 100mV
AV = 1
RL = 100k
CL = 16.3pF
-7
1k
AV = 1
RL = 10k
CL = 16.3pF
VCM = 1VP-P
PP
VS = 5V
-30
-40
-50
-60
10k
100k
-70
1M
100
1k
0
-10
PSRR-
-40
-50
-20
-30
AV = 1
RL = 1k
CL = 16.3pF
VOUT = 1VP-P
VS = 5V
PSRR-
-40
-50
PSRR+
-60
PSRR+
-60
-70
-70
-80
1M
10
AV = 1
RL = 1k
CL = 16.3pF
VOUT = 1VP-P
VS = 2.4V
PSRR (dB)
PSRR (dB)
-30
100k
FIGURE 8. CMRR vs FREQUENCY
10
-20
10k
FREQUENCY (Hz)
FIGURE 7. GAIN vs FREQUENCY vs VOUT
-10
VS = 2.4V
-20
FREQUENCY (Hz)
0
1M
FIGURE 6. GAIN vs FREQUENCY vs VOUT
FIGURE 5. GAIN vs FREQUENCY vs VOUT
1
100k
FREQUENCY (Hz)
-80
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 9. PSRR vs FREQUENCY, VS = 2.4V
4
1M
-90
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 10. PSRR vs FREQUENCY, VS = 5V
FN6154.4
February 11, 2008
ISL28156, ISL28256
Typical Performance Curves (Continued)
1.4
INPUT CURRENT NOISE (pA/√Hz)
140
120
100
80
60
40
20
0
1
10
100
1k
1.2
1.0
0.8
0.6
0.4
0.2
0
10k
1
10
100
FREQUENCY (Hz)
FIGURE 11. INPUT VOLTAGE NOISE vs FREQUENCY
0
24
-0.6
-0.8
-1.0
20
18
16
14
12
-1.2
-1.4
RF = Ri = RL = 10k
AV = 2
CL = 16.3pF
VOUT = 10mVP-P
22
SMALL SIGNAL (mV)
INPUT NOISE (µV)
-0.4
0
1
2
3
4
5
6
7
8
9
10
10
0
50
100
150
0.6
6
0.4
5
ENABLE (V)
0
-0.6
RF = Ri = RL = 10k
AV = 2
CL = 16.3pF
VOUT = 1VP-P
0
100
200
350
400
1.0
V-ENABLE
0.8
3
0.6
RF = Ri =RL = 10k
AV = 2
CL = 16.3pF
VOUT = 10mVP-P
2
1
0.4
0.2
0
300
TIME (µs)
FIGURE 15. LARGE SIGNAL STEP RESPONSE
5
300
1.2
4
0.2
-0.4
250
FIGURE 14. SMALL SIGNAL STEP RESPONSE
FIGURE 13. 1Hz TO 10Hz INPUT NOISE
-0.2
200
TIME (µs)
TIME (s)
LARGE SIGNAL (V)
10k
FIGURE 12. INPUT CURRENT NOISE vs FREQUENCY
AV = 1000
RF = 100k
Ri = 100
RL = 10k
-0.2
1k
FREQUENCY (Hz)
400
-1
OUTPUT (V)
INPUT VOLTAGE NOISE (nV/√Hz)
160
0
VOUT
0
10
20
30
40
50
60
70
80
90
-0.2
100
TIME (µs)
FIGURE 16. ENABLE TO OUTPUT DELAY
FN6154.4
February 11, 2008
ISL28156, ISL28256
Typical Performance Curves (Continued)
58
14.5
n = 1000
MAX
MAX
12.5
48
CURRENT (µA)
CURRENT (µA)
n = 1000
13.5
53
MEDIAN
43
38
33
11.5
MEDIAN
10.5
9.5
8.5
MIN
28
7.5
23
-40
6.5
-40
-20
0
20
40
60
80
100
120
MIN
-20
0
TEMPERATURE (°C)
FIGURE 17. SUPPLY CURRENT ENABLED vs TEMPERATURE
VS = ±2.5V
280
n = 1000
MAX
80
100
120
100
120
200
MEDIAN
VIO (µV)
VIO (µV)
80
-20
-120
-220
MEDIAN
100
0
-100
-200
MIN
-320
-420
-40
MAX
300
180
-20
0
20
40
60
80
TEMPERATURE (°C)
MIN
-300
100
-400
-40
120
-20
0
20
40
60
80
TEMPERATURE (°C)
FIGURE 19. VIO SO8 PACKAGE vs TEMPERATURE VS = ±2.5V
FIGURE 20. VIO SO8 PACKAGE vs TEMPERATURE VS = ±1.2V
380
400
280
300
n = 1000
MAX
MAX
n = 1000
180
200
MEDIAN
VIO (µV)
VIO (µV)
60
400
n = 1000
-20
-120
100
MEDIAN
0
-100
-220
-200
MIN
-320
-420
-40
40
FIGURE 18. SUPPLY CURRENT DISABLED vs
TEMPERATURE VS = ±2.5V
380
80
20
TEMPERATURE (°C)
MIN
-300
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 21. VIO SOT-23 PACKAGE vs TEMPERATURE
VS = ±2.5V
6
-400
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 22. VIO SOT-23 PACKAGE vs TEMPERATURE
VS = ±1.2V
FN6154.4
February 11, 2008
ISL28156, ISL28256
Typical Performance Curves (Continued)
5
5
n = 1000
4
3
MAX
2
IBIAS- (nA)
IBIAS+ (nA)
n = 1000
MAX
4
1
MEDIAN
0
3
2
1
MEDIAN
MIN
-1
0
MIN
-2
-3
-40
-20
0
20
40
60
80
100
-1
-40
120
-20
0
TEMPERATURE (°C)
FIGURE 23. IBIAS+ vs TEMPERATURE VS = ±2.5V
80
100
120
n = 1000
n = 1000
8
MAX
MAX
6
0
-1
IBIAS- (nA)
IBIAS+ (nA)
60
10
MEDIAN
-2
MEDIAN
4
2
0
-3
-2
MIN
-4
-40
-20
0
20
40
60
MIN
80
100
-4
-40
120
-20
0
TEMPERATURE (°C)
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 25. IBIAS+ vs TEMPERATURE VS = ±1.5V
FIGURE 26. IBIAS- vs TEMPERATURE VS = ±1.2V
4
4
3
n = 1000
MAX
0
1
IOS (nA)
0
-1
-2
MEDIAN
-3
-2
MEDIAN
-4
-6
MIN
-4
MIN
-8
-5
-6
-40
n = 1000
MAX
2
2
IOS (nA)
40
FIGURE 24. IBIAS- vs TEMPERATURE VS = ±2.5V
2
1
20
TEMPERATURE (°C)
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 27. IOS vs TEMPERATURE VS = ±2.5V
7
120
-10
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 28. IOS vs TEMPERATURE VS = ±1.5V
FN6154.4
February 11, 2008
ISL28156, ISL28256
Typical Performance Curves (Continued)
130
135
130
115
MEDIAN
110
105
100
110
MEDIAN
105
100
95
90
90
-40
85
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
4.900
100
120
MIN
-20
0
20
40
60
80
TEMPERATURE (°C)
MAX
n = 1000
MAX
4.9980
4.885
VOUT (V)
MEDIAN
4.880
4.875
4.870
4.9978
MEDIAN
4.9976
4.9974
MIN
4.865
120
4.9984
4.9982
4.890
100
FIGURE 30. PSRR vs TEMPERATURE ±1.2V to ±2.5V
n = 1000
4.895
VOUT (V)
115
95
MIN
FIGURE 29. CMRR vs TEMPERATURE V+ = ±2.5V, ±1.5V
MIN
4.9972
4.860
4.9970
4.855
4.850
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
4.9968
-40
FIGURE 31. VOUT HIGH vs TEMPERATURE VS = ±2.5V, RL = 1k
MAX
4.9982
-20
0
20
40
60
80
TEMPERATURE (°C)
n = 1000
MAX
4.5
VOUT (mV)
MEDIAN
4.9976
4.9974
4.0
3.5
MEDIAN
MIN
4.9972
120
5.0
n = 1000
4.9980
4.9978
100
FIGURE 32. VOUT HIGH VS = ±2.5V, RL = 100k
4.9984
VOUT (V)
MAX
120
120
PSRR (dB)
CMRR (dB)
125
n = 1000
125
MAX
n = 1000
3.0
MIN
4.9970
4.9968
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
FIGURE 33. VOUT LOW VS = ±2.5V, RL = 1k
8
120
2.5
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
100
120
FIGURE 34. VOUT LOW VS = ±2.5V, RL = 100k
FN6154.4
February 11, 2008
ISL28156, ISL28256
Pin Descriptions
ISL28156
(6 Ld SOT-23)
ISL28156
(8 Ld SOIC)
ISL28256
(8 Ld MSOP)
PIN NAME
1, 5
4
2
2 (A)
6 (B)
FUNCTION
NC
Not connected
ININ-_A
IN-_B
Inverting input
EQUIVALENT CIRCUIT
V+
IN-
IN+
VCircuit 1
3
3 (A)
5 (B)
IN+
IN+_A
IN+_B
4
V-
1 (A)
7 (B)
OUT
OUT_A
OUT_B
3
2
4
1
6
Non-inverting
input
(See Circuit 1)
Negative supply
Output
V+
OUT
VCircuit 2
6
7
5
8
8
V+
ENABLE
Positive supply
Chip enable
V+
CE
VCircuit 3
Applications Information
Introduction
The ISL28156 is a single BiMOS rail-to-rail input, output
(RRIO) operational amplifier with an enable feature. The
ISL28256 is a dual version without the enable feature. Both
devices are designed to operate from single supply (2.4V to
5.0V) or dual supplies (±1.2V to ±2.5V) while drawing only
39µA of supply current per amplifier. This combination of low
power and precision performance makes this device suitable
for a variety of low power applications including battery
powered systems.
Input Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails. They also contain
back-to-back diodes across the input terminals. For
applications where the input differential voltage is expected to
exceed 0.5V, external series resistors must be used to ensure
the input currents never exceed 5mA (Figure 35).
VIN
VOUT
RIN
+
RL
Rail-to-Rail Input/Output
These devices feature bi-polar inputs, which have an input
common mode range that extends up to 0.5V beyond the V+
rail, and to within 10mV of the V- rail. The CMOS outputs
typically swing to within about 4mV of the supply rails with a
100kΩ load. The NMOS sinks current to swing the output in
the negative direction. The PMOS sources current to swing the
output in the positive direction.
9
FIGURE 35. INPUT CURRENT LIMITING
Enable/Disable Feature
The ISL28156 offers an EN pin that disables the device when
pulled up to at least 2.0V. In the disabled state (output in a
high impedance state), the part consumes typically 10µA. By
disabling the part, multiple ISL28156 parts can be connected
together as a MUX. In this configuration, the outputs are tied
together in parallel and a channel can be selected by the EN
FN6154.4
February 11, 2008
ISL28156, ISL28256
pin. The EN pin also has an internal pull-down. If left open, the
EN pin will pull to the negative rail and the device will be
enabled by default.
The loading effects of the feedback resistors of the disabled
amplifier must be considered when multiple amplifier outputs
are connected together.
Using Only One Channel
The ISL28256 is a dual op amp. If the application only
requires one channel, the user must configure the unused
channel to prevent it from oscillating. The unused channel
will oscillate if the input and output pins are floating. This will
result in higher than expected supply currents and possible
noise injection into the channel being used. The proper way
to prevent this oscillation is to short the output to the
negative input and ground the positive input (as shown in
Figure 36).
Power Dissipation
It is possible to exceed the +125°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (TJMAX) for all applications
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related using
Equation 1:
T JMAX = T MAX + ( θ JA xPD MAXTOTAL )
(EQ. 1)
where:
• PDMAXTOTAL is the sum of the maximum power
dissipation of each amplifier in the package (PDMAX)
PDMAX for each amplifier can be calculated using Equation 2:
V OUTMAX
PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × ---------------------------R
L
-
(EQ. 2)
+
where:
FIGURE 36. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
Current Limiting
• TMAX = Maximum ambient temperature
• θJA = Thermal resistance of the package
• PDMAX = Maximum power dissipation of 1 amplifier
These devices have no internal current-limiting circuitry. If
the output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.
• VS = Supply voltage
• IMAX = Maximum supply current of 1 amplifier
• VOUTMAX = Maximum output voltage swing of the
application
• RL = Load resistance
10
FN6154.4
February 11, 2008
ISL28156, ISL28256
SOT-23 Package Family
MDP0038
e1
D
SOT-23 PACKAGE FAMILY
A
MILLIMETERS
6
N
SYMBOL
4
E1
2
E
3
0.15 C D
1
2X
2
3
0.20 C
5
2X
e
0.20 M C A-B D
B
b
NX
0.15 C A-B
1
3
SOT23-5
SOT23-6
A
1.45
1.45
MAX
A1
0.10
0.10
±0.05
A2
1.14
1.14
±0.15
b
0.40
0.40
±0.05
c
0.14
0.14
±0.06
D
2.90
2.90
Basic
E
2.80
2.80
Basic
E1
1.60
1.60
Basic
e
0.95
0.95
Basic
e1
1.90
1.90
Basic
L
0.45
0.45
±0.10
L1
0.60
0.60
Reference
N
5
6
Reference
D
2X
TOLERANCE
Rev. F 2/07
NOTES:
C
A2
2. Plastic interlead protrusions of 0.25mm maximum per side are not
included.
SEATING
PLANE
A1
0.10 C
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
NX
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
(L1)
6. SOT23-5 version has no center lead (shown as a dashed line).
H
A
GAUGE
PLANE
c
L
11
0.25
0° +3°
-0°
FN6154.4
February 11, 2008
ISL28156, ISL28256
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M C A B
e
H
C
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
L
b
0.010
4° ±4°
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
SO-14
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
A
0.068
0.068
0.068
0.104
0.104
0.104
0.104
MAX
-
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
±0.003
-
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
±0.002
-
b
0.017
0.017
0.017
0.017
0.017
0.017
0.017
±0.003
-
c
0.009
0.009
0.009
0.011
0.011
0.011
0.011
±0.001
-
D
0.193
0.341
0.390
0.406
0.504
0.606
0.704
±0.004
1, 3
E
0.236
0.236
0.236
0.406
0.406
0.406
0.406
±0.008
-
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
±0.004
2, 3
e
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
-
L
0.025
0.025
0.025
0.030
0.030
0.030
0.030
±0.009
-
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
-
h
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
-
16
20
24
28
Reference
-
N
SO-8
SO16
(0.150”)
8
14
16
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
12
FN6154.4
February 11, 2008
ISL28156, ISL28256
Mini SO Package Family (MSOP)
0.25 M C A B
D
MINI SO PACKAGE FAMILY
(N/2)+1
N
E
MDP0043
A
E1
MILLIMETERS
PIN #1
I.D.
1
B
(N/2)
e
H
C
SEATING
PLANE
0.10 C
N LEADS
SYMBOL
MSOP8
MSOP10
TOLERANCE
NOTES
A
1.10
1.10
Max.
-
A1
0.10
0.10
±0.05
-
A2
0.86
0.86
±0.09
-
b
0.33
0.23
+0.07/-0.08
-
c
0.18
0.18
±0.05
-
D
3.00
3.00
±0.10
1, 3
E
4.90
4.90
±0.15
-
E1
3.00
3.00
±0.10
2, 3
e
0.65
0.50
Basic
-
L
0.55
0.55
±0.15
-
L1
0.95
0.95
Basic
-
N
8
10
Reference
-
0.08 M C A B
b
Rev. D 2/07
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
PLANE
A1
L
0.25
3° ±3°
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
13
FN6154.4
February 11, 2008