For Audio Equipment MN35503 D/A Converter for Digital Audio Equipment Pin Assignment Overview The MN35503 is a CMOS digital-to-analog converter designed especially for PCM digital audio equipment. It features a built-in digital filter with 16/20-bit input. It uses pulse edge modulation (PEM) and JVC advanced noise shaping (VANS) to yield the high resolution and low distortion ratio equivalent to those of 20-bit systems covering the range between 0 and 20 kHz. The chip incorporating an 8-fold oversampling digital filter that eliminates a low-pass filter after the D/A converter and greatly reduces the power consumption of the overall D/A conversion system. The chip makes a major contribution to reducing the cost and size of CD players and other digital audio equipment. Features Built-in 8-fold oversampling digital filter using I2S bus MA 1 28 PDO DIN 2 27 MD LRCK 3 26 MC BCK 4 25 M3 MB 5 24 DVDD1 DVDD2 6 23 XIN CKO 7 22 XOUT DVSS2 8 21 DVSS1 M1 9 20 M2 OUT1C 10 19 OUT2C N.C. 11 18 N.C. AVDD1 12 17 AVDD2 OUT1D 13 16 OUT2D AVSS1 14 15 AVSS2 • Bandwidth ripple: within ±0.05 dB for 0 to 0.454 fs (TOP VIEW) • Cutoff band attenuation (0.546 to 7.454) fs : 37dB (n–0.03125) fs to (n+0.03125) fs : min. 60dB SOP028-P-0375 n=1 to 7 (integer) (The above characteristics include those for an external primary low-pass filter with fs=1.95 fs.) Built-in digital de-emphasis Choice of system clocks: 192fs , 256fs, 384fs , 512fs , 576fs fs=32.0 kHz 0 to14.5 kHz max. deviation +0.072dB/ – 0.047 dB Choice of input data formats: right-packed or I2S bus (16 or 20 bits, alternating channel input, MSB first) fs=44.1 kHz 0 to 20 kHz max. deviation +0.077dB/ – 0.028 dB Built-in phase comparator fs=48.0 kHz 0 to 21.8 kHz max. deviation +0.052dB/ – 0.053 dB Applications (The above characteristics include those for an external primary low-pass filter with fc=1.95 fs.) The digital filter is designed to deliver the above bandwidth characteristics when used with an external primary low-pass filter with f c=1.95 fs. Built-in digital attenuation Up/down over 32 steps Support for double-speed operation (192 fs clock) 4PEM output configuration (2PEM output per channel) Support for low-voltage (3.0 volt) operation CD players and other digital audio equipment MN35503 For Audio Equipment OUT2D 16 OUT2C 19 7 CKO XOUT 22 XIN 23 28 PDO Block Diagram OSC Block DF Block PEM Block • 8fs Over sampling Digital Filter 1st. Order Noise shaper Block • De-emphasis Filter VANS Block • Attenuater D/A Block PEM Block 13 OUT1D 10 OUT1C 27 MD 26 MC 5 MB 1 MA 25 M3 M2 9 M1 4 BCK 3 LRCK 2 DIN 20 Mode Control Block I/F Block MN35503 For Audio Equipment Pin Descriptions Pin No. Symbol Function Description 1 MA Operating mode selection pin 4 (See Table 1.) 2 DIN Serial data input pin (MSB first) 3 LRCK LR synchronization signal input pin (fs rate) 4 BCK Data shift bit clock input pin 5 MB Operating mode selection pin 5 6 DVDD2 7 CKO Clock output pin 8 DV SS2 Ground pin 2 for digital circuits 9 M1 10 OUT1C 11 N.C. No connection (Leave this pin open.) 12 AVDD1 Power supply pin 1 for analog circuits 13 OUT1D PEM output pin 1D (Left channel with reversed phase) 14 AV SS1 Ground pin 1 for analog circuits 15 AV SS2 Ground pin 2 for analog circuits 16 OUT2D PEM output pin 2D (Right channel with reversed phase) 17 AVDD2 Power supply pin 2 for analog circuits 18 N.C. No connection (Leave this pin open.) 19 OUT2C 20 M2 21 DV SS1 Ground pin 1 for digital circuits (Ground for oscillator circuit) 22 XOUT Crystal oscillator pin 23 XIN 24 DVDD1 25 M3 Operating mode selection pin 3 (See Table 1.) 26 MC Reset pin/digital attenuation control pin (See Table 1.) 27 MD Reset pin/digital attenuation control pin (See Table 1.) 28 PDO Phase comparator output pin (tristate output)*1 (See Table 1.) Power supply pin 2 for digital circuits Operating mode selection pin 1, with pull-up resistor (See Table 1.) PEM output pin 1C (Left channel with reversed phase) PEM output pin 2C (Right channel with reversed phase) Operating mode selection pin 2, with pull-up resistor (See Table 1.) Crystal oscillator pin (external clock input pin) (Built-in feedback resistor) Power supply pin 1 for digital circuits (for oscillation circuit) Note*1: This pin provides tristate output indicating the result of comparing the phases of the internal f s-rate-signal and the LRCK input signal. It is at "H" level when the LRCK signal leads and is at "L" level when the signal lags. At all other times, it is in the high-impedance state. MN35503 For Audio Equipment Operating Mode Descriptions Table 1-1. MN35503 Operating Modes Mode Selection Pins Pin States and Operating Modes M1 Includes pull-up resistor L M2 Includes pull-up resistor L M3 H L MA H L MB L H H L L H L RSBUP MD RSBDN 00 01 02 03 H H MC MODE L H MDAT L H L MCLK L MLAT 10 11 12 13 H H L H RSBUP L H 20 21 RSBDN 30 31 32 33 Serial mode Input data form Right-packed Input word length (bits) 16 LRCK level for left channel data H *1 XIN clock frequency (fs) 384 192 *2 576 *2 *2 384/576 256/384 256 See Table 3. See Table 3. CKO output frequency (fs) DE-EMP. (fs=[kHz]) 384 576 384/576 256/384 – 44.1 32 48 – 44.1 – 32 See Table 3 0.598 × AVDD VANS oversampling (fs) Theoretical signal-to-noise STOP See Table 3. See Table 3. Output level ratio 192 – 44.1 32 48 0.448 × AVDD 64 32 96 64/96 64/96 64 122 95 138 122/138 116/132 116 (dB) Notes * 1: During 192 f s operation, the chip supports fs clock speeds up to 88.2 kHz. * 2: During 576 f s operation and 384 fs operation in modes 21 or 61, the chip supports fs clock speeds up to 32 kHz; for other modes, it supports up to 48 kHz. MN35503 For Audio Equipment Table 1-2. MN35503 Operating Modes Mode Selection Pins Pin States and Operating Modes M1 Includes pull-up resistor H M2 Includes pull-up resistor L M3 H L MA H L MB L H H L L H H RSBUP MD RSBDN 40 41 42 43 H L MC MODE L H MDAT L H L MCLK L MLAT 50 51 52 53 H H L H RSBUP L H 60 61 RSBDN 70 71 72 73 Serial mode Right-packed Input word length (bits) 16 LRCK level for left channel data L I2S 20 to 20 H 384 576 16 L *1 XIN clock frequency (fs) Right-packed *1 384 576 H *1 384/576 20 *1 256/384 Test Mode Input data form 512 See Table 3. See Table 3. CKO output frequency (fs) DE-EMP.(fs=[kHz]) 384 STOP 384 STOP 384 384/576 – 48 44.1 32 – 44.1 – See Table 3. 0.598 × AVDD VANS oversampling (fs) Theoretical signal-to-noise 256/384 512 See Table 3. See Table 3. Output level ratio 576 – 44.1 – 0.448 × AVDD 64 94 64 96 64/96 64/96 64 122 138 122 138 122/138 116/132 122 (dB) Note*1: During 576 fs operation and 384 fs operation in modes 21 or 61, the chip supports fs clock speeds up to 32 kHz; for other modes, it supports up to 48 kHz. MN35503 For Audio Equipment Serial Mode (MODE=20, 21, 60, 61) MDAT (MA) D1 D2 D3 D4 D5 D6 D7 D8 MCLK (MB) MLAT (MC) Figure 1. Serial Mode Input Signal Timing Table 2. Attenuation Control The 5-bit from D1 (MSB) to D5 (LSB) specifies a code of the 32 available attenuation step. (See Table 2.) D1 D2 D3 D4 D5 Code 0 0 0 0 0 00H 0.0 0 0 0 0 1 01H –1.0 0 0 0 1 0 02H –2.0 .. .. . .. .. . .. .. . Output Level (dB) 1 1 1 1 0 1EH – 48.1 1 1 1 1 1 1FH –∞ (mute) 0=L, 1=H Table 3. Mode Control The combination of 3-bit from pins D6 to D8 controls XIN clock frequency, de-emphasis, and reset operation. D6 D7 D8 at MD=L at MD=H fs=[kHz] 0 0 0 384 256 OFF Reset ●: Reset —: Normal — 0 0 1 384 256 32 — 0 1 0 384 256 OFF ● 0 1 1 576 384 32 — 1 0 0 384 256 44.1 — 1 0 1 384 256 48 — 1 1 0 576 384 OFF ● 1 1 1 576 384 OFF — 0=L, 1=H XIN Clock Frequency [fs] DE-EMP. MD=L: MODE=2 0, 6 0 MD=H: MODE=21, 6 1 MN35503 For Audio Equipment Digital attenuation and reset (Parallel mode) Table 4 shows how the inputs from the two pins MC (RSBUP) and MD (RSBDN) control digital attenuation except the serial modes. Table 4. Attenuation Modes Pin Name MC (RSBUP) MD (RSBDN) Mode L Pin States and Operating Modes ↑↓ L ↑ H ↑ L L ↑ Reset Mute Normal Volume Mute (–∞) H 0dB Attenuation control UP DOWN Note: The upward arrow indicates the rising edge change of the input signal; the paired arrows, the rising and falling edge changes. There are a total of 32 attenuation levels. According to the attenuation control shown in Table-4, volume goes up or down in one step every input-signal rising-edge. Still, in the 0 dB state, up-pulse does not change the volume. Similary, in the muting state (–∞), downpulse does not change the volume. The change of the input signals is detected by inner clock of 16 fs period, so always use a frequency of 8 fs or less for changes in the RSBUP and RSBDN signals. Note, however, that changes in attenuation level require a period corresponding to 2 fs to complete. Do not simultaneously change the RSBUP and RSBDN signals unless setting up for a reset. Conversion Characteristics DV DD=5.0V, DVSS=0V, AVDD=5.0V, AVss=0V, f=16.9344MHz, Ta=25˚C Analog Characteristics for 20-bit, 1 fs input Parameter Symbol Signal-to-noise ratio Dynamic range Total harmonic distortion Output level D.R. THD+N Test Condition min typ max Unit EIAJ (1kHz) 108 dB EIAJ (1kHz) 107 dB EIAJ (1kHz) 0.0008 1 kHz full scale 2.0 0.0015 % Vrms The above analog characteristics are based on measurements with the sample application circuit using mode 50 . MN35503 For Audio Equipment OUT L 560pF 0.033µF 560pFG 3.3kΩ 3.3kΩ 0.018µFG 56kΩF 100Ω 100Ω + 47µF 3.3kΩ 1.2kΩF 100pFG + 47µF 0.033µF 3.3kΩ 47µF + 47µF 620ΩF 3300pFG + 100Ω 100Ω + 100pFG 3300pFG 3.3kΩ + + 10Ω 470µF 470µF M1 + 220µF M2 10kΩ 560Ω 10kΩ MD 74HC14 GND 10kΩ 100kΩ MCLK 0.1µF 100kΩ 10kΩ 0.1µF 10kΩ 100kΩ 74HC4050 CKO GND 9 100Ω 560Ω 560Ω 560Ω DATA LRCK BCK GND 1 1.5µF 18Ω +5V MA MC 0.1µF 18Ω M3 MB 27Ω AVSS1 14 56kΩF OUT1D 13 1.5µF AVDD1 12 N.C. 11 OUT1C 10 56kΩF M1 9 560Ω DVSS2 8 1.5µF CKO 7 180Ω DVDD2 6 MB 5 560Ω BCK 4 LRCK 3 DIN 2 MA 1 560Ω 560Ω 560Ω 15 AVSS2 56kΩF 16 OUT2D 17 AVDD2 1.5µF 18 N.C. 19 OUT2C 56kΩF 20 M2 560Ω 21 DVSS1 10pF 22 XOUT 1.5µF 23 XIN 10pF 24 DVDD1 16.9344MHz 25 M3 26 MC 27 MD 28 PDO (TOP VIEW) 560Ω 560Ω 560Ω + 330Ω 330Ω – + 620ΩF 0.018µFG 56kΩF 100Ω 100µF GND 10Ω DVDD 22µF – 1.2kΩF OUT IN +12V 27kΩ + 78M05 27kΩ 560ΩF 560ΩF 3.3kΩ AVDD 5600pF – 0.1µF 5600pF + 0.1µF GND 0.1µF 22µF – –12V OUT R Application Circuit Example 1.5µF UP DOWN MN35503 For Audio Equipment Package Dimensions (Unit: mm) SOP028-P-0375 17.80±0.20 15 (0.65) 1.27 0.40±0.10 SEATING PLANE +0.10 9.40±0.30 2.40max. 0.15 -0.05 7.20±0.20 14 0.10±0.10 1 1.10±0.20 2.00±0.20 28 0 to 10° 0.30min.