Dual Channel Differential DSL Line Driver ISL1533A Features The ISL1533A is a dual channel differential amplifier designed for driving high crest factor signals at very low distortion levels. The high drive capability of 450mA makes this driver ideal for DMT designs. It contains two pairs of wideband, high-voltage, current mode feedback amplifiers designed on Intersil’s HS30 Bipolar SOI process for low power consumption in Asymmetric Digital Subscriber Line (ADSL) and Power Line Communications (PLC) systems. This process also provides for very rugged protection against lightning induced surges on the line. • 450mA output drive capability The supply current can be set using a resistor on the IADJ pin. Pins (C0 and C1) can also be used to adjust supply current to one of four preset modes (full-IS, 3/4-IS, 1/2-IS, and full power-down). The ISL1533A integrates 50k pull-up resistors on C0 and C1 pins to initially disable the device. • Pb-free (RoHS compliant) • 44.4VP-P differential output drive into 100 • ±5V to ±15V or single supply to 30V operation • Operates down to supply current of 4mA per port • Current control pins • Channel separation - 80dB at 500kHz Applications • Dual port ADSL2+ line drivers • Power Line Communications (PLC) The ISL1533A operates on ±5V to ±15V supplies or single supply up to 30V and retains its bandwidth and linearity over the complete full scale supply range. The device is supplied in a thermally-enhanced small footprint (4mmx5mm) 24 Ld QFN package. The ISL1533A is specified for operation over the full -40°C to +85°C temperature range. VS+ RT + TX+ VS- 25 0.22µF TXFR 1:1 RF FROM AFE 100 3k 2RG 667 VS+ TX- RT + VS- 25 0.22µF RF 3k FIGURE 1. TYPICAL APPLICATION CIRCUIT May 9, 2014 FN8648.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2014. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL1533A Ordering Information PART NUMBER (Notes 2, 3) PACKAGE (Pb-free) PART MARKING PKG. DWG. # ISL1533AIRZ 1533A IRZ 24 Ld QFN L24.4x5F-A ISL1533AIRZ-T13 (Note 1) 1533A IRZ 24 Ld QFN (Tape & Reel) L24.4x5F-A NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL1533A. For more information on MSL please see techbrief TB363. Pin Configuration 20 VOUTA 21 NC 22 VS- 23 C0AB 24 C1AB ISL1533AIRZ (24 LD QFN) TOP VIEW VINA+ 1 19 VINA- VINB+ 2 18 VINB- GND 3 17 VOUTB THERMAL PAD IADJ 4 16 NC NC 5 15 VOUTC VOUTD 12 VS+ 11 13 VINDNC 10 VIND+ 7 C0CD 9 14 VINC- C1CD 8 VINC+ 6 THERMAL PAD TO BE CONNECTED TO GND Submit Document Feedback 2 FN8648.0 May 9, 2014 ISL1533A Pin Descriptions 24 Ld QFN PIN NAME 1 VINA+ FUNCTION CIRCUIT Amplifier A non-inverting input VS+ 7.5k VSCIRCUIT 1 2 VINB+ 3 GND 4 IADJ (Note 4) Amplifier B non-inverting input (Reference Circuit 1) Ground connection Supply current control pin for both DSL channels #1 and #2 VS+ IADJ VS- GND CIRCUIT 2 5, 10, 16, 21 NC 6 VINC+ 7 VIND+ 8 C1CD (Note 5) Not connected Amplifier C non-inverting input (Reference Circuit 1) Amplifier D non-inverting input (Reference Circuit 1) DSL channel #2 current control pin 2.6V VS+ VS+ 50k COAB 20k VSIADJ CIRCUIT 3 9 C0CD (Note 5) 11 VS+ DSL channel #2 current control pin (Reference Circuit 3) 12 VOUTD Amplifier D output (Reference Circuit 1) 13 VIND- Amplifier D inverting input (Reference Circuit 1) Positive supply 14 VINC- Amplifier C inverting input (Reference Circuit 1) 15 VOUTC Amplifier C output (Reference Circuit 1) 17 VOUTB Amplifier B output (Reference Circuit 1) 18 VINB- Amplifier B inverting input (Reference Circuit 1) 19 VINA- Amplifier A inverting input (Reference Circuit 1) 20 VOUTA Amplifier A output (Reference Circuit 1) 22 VS- 23 C0AB (Note 6) DSL channel #1 current control pin Negative supply (Reference Circuit 3) 24 C1AB (Note 6) DSL channel #1 current control pin (Reference Circuit 3) NOTES: 4. IADJ controls bias current (IS) setting for both DSL channels. 5. Amplifiers C and D comprise DSL channel #2. C0CD and C1CD control IS settings for DSL channel #2. 6. Amplifiers A and B comprise DSL channel #1. C0AB and C1AB control IS settings for DSL channel #1. Submit Document Feedback 3 FN8648.0 May 9, 2014 ISL1533A Absolute Maximum Ratings (TA = +25°C) Thermal Information VS+ to VS- Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 30V VS+ Voltage to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 30V VS- Voltage to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -30V to 0.3V Driver VIN+ Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS- to VS+ C0, C1 Voltage to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V IADJ Voltage to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 4V ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . . . . . . . 3kV Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . . . . . . . 200V Thermal Resistance (Typical) JA (°C/W) JC (°C/W) 24 Lead QFN Package (Notes 7, 8) . . . . . . 39 4.5 Current into any Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA Output Current from Driver (Static) . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .See Figure 37 Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493 Recommended Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +150°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 7. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 8. For JC, the “case temp” location is the center of the exposed metal pad on the package underside. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA. Electrical Specifications PARAMETER VS = ±12V, RF = 3k, RL= 50, IADJ = C0 = C1 = 0V, TA = +25°C. Amplifiers tested separately. DESCRIPTION CONDITIONS MIN (Note 9) TYP MAX Note 9 UNIT SUPPLY CHARACTERISTICS IS+ (Full IS) Positive Supply Current per Amplifier All outputs at 0V, C0 = C1 = 0V, RADJ = 0 3.0 4.0 5.0 mA IS- (Full IS) Negative Supply Current per Amplifier All outputs at 0V, C0 = C1 = 0V, RADJ = 0 -4.88 -3.88 -2.88 mA IS+ (3/4 IS) Positive Supply Current per Amplifier All outputs at 0V, C0 = 5V, C1 = 0V, RADJ = 0 3.0 mA IS- (3/4 IS) Negative Supply Current per Amplifier All outputs at 0V, C0 = 5V, C1 = 0V, RADJ = 0 -2.8 mA IS+ (1/2 IS) Positive Supply Current per Amplifier All outputs at 0V, C0 = 0V, C1 = 5V, RADJ = 0 1.63 2.0 2.75 mA IS- (1/2 IS) Negative Supply Current per Amplifier All outputs at 0V, C0 = 0V, C1 = 5V, RADJ = 0 -2.63 -1.88 -1.5 mA IS+ (Power-down) Positive Supply Current per Amplifier All outputs at 0V, C0 = C1 = 5V, RADJ = 0 0.12 0.5 mA IS- (Power-down) Negative Supply Current per Amplifier All outputs at 0V, C0 = C1 = 5V, RADJ = 0 IGND GND Supply Current per Amplifier All outputs at 0V -0.5 0 mA 0.25 mA INPUT CHARACTERISTICS VOS Input Offset Voltage -10 4 +10 mV VOS VOS Mismatch -2 0 +2 mV IB+ Non-Inverting Input Bias Current -7.5 +7.5 µA IB- Inverting Input Bias Current -50 +50 µA IB- IB- Mismatch -10 +10 µA ROL Transimpedance 15 M eN Input Noise Voltage 10 nV/ Hz iN -Input Noise Current 25 pA/ Hz VIH Input High Voltage C0 and C1 inputs VIL Input Low Voltage C0 and C1 inputs IIH0, IIH1 Input High Current for C0, C1 C0 = 5V, C1 = 5V Submit Document Feedback 4 0 2.2 5 V 33 0.8 V 60 µA FN8648.0 May 9, 2014 ISL1533A Electrical Specifications PARAMETER IIL VS = ±12V, RF = 3k, RL= 50, IADJ = C0 = C1 = 0V, TA = +25°C. Amplifiers tested separately. (Continued) MIN (Note 9) TYP -15 -3.5 µA RL = 100 ±11.1 V RL = 50 (+) +10.8 V RL = 50 (-) -10.8 V +10.3 V DESCRIPTION Input Low Current for C0 or C1 CONDITIONS C0 = 0V, C1 = 0V MAX Note 9 UNIT OUTPUT CHARACTERISTICS VOUT Loaded Output Swing (RL Single-ended to GND) RL = 25 (+) +9.4 RL = 25 (-) -10.5 450 mA 1 A IOL Linear Output Current AV = 5, RL = 10, f = 100kHz, THD = -60dBc (10 single-ended) IOUT Output Current VOUT = 1V, RL = 1 -9.3 V DYNAMIC PERFORMANCE BW -3dB Bandwidth AV = 5, RL-DIFF = 100 60 MHz HD2 2nd Harmonic Distortion fC = 200kHz, RL-DIFF = 100VOUT = 10.5VP-P-DIFF -86 dBc fC = 2MHz, RL-DIFF = 100VOUT = 2VP-P-DIFF -65 dBc HD3 SR 3rd Harmonic Distortion Slewrate (Single-ended) fC = 2MHz, RL-DIFF = 100VOUT = 10.5VP-P-DIFF -60 dBc fC = 200kHz, RL-DIFF = 100VOUT = 10.5VP-P-DIFF -92 dBc fC = 2MHz, RL-DIFF = 100VOUT = 2VP-P-DIFF -50 dBc fC = 2MHz, RL-DIFF = 100VOUT = 10.5VP-P-DIFF -58 dBc VOUT from -8V to +8V measured at ±4V 400 V/µs NOTE: 9. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Submit Document Feedback 5 FN8648.0 May 9, 2014 ISL1533A Typical Performance Curves VS = ±12V AV = 5 RL = 100DIFF RF = 1k VS=±12V AV=10 RL=100DIFF RF = 1k RF = 2k RF = 3k RF = 2k RF = 3k RF = 4k RF = 4k FIGURE 2. DIFFERENTIAL FREQUENCY RESPONSE vs RF (FULL IS) VS = ±12V AV = 5 RL = 100DIFF RF = 1k RF = 3k RF = 2k FIGURE 3. DIFFERENTIAL FREQUENCY RESPONSE vs RF (FULL IS) VS = ±12V AV = 10 RL = 100DIFF RF = 3k RF = 4k RF = 1k RF = 2k RF = 3k RF = 4k FIGURE 6. DIFFERENTIAL FREQUENCY RESPONSE vs RF (1/2 IS) Submit Document Feedback 6 RF = 2k RF = 4k FIGURE 4. DIFFERENTIAL FREQUENCY RESPONSE vs RF (3/4 IS) VS = ±12V AV = 5 RL = 100DIFF RF = 1k FIGURE 5. DIFFERENTIAL FREQUENCY RESPONSE vs RF (3/4 IS) VS = ±12V AV = 10 RL = 100DIFF RF = 3k RF = 1k RF = 2k RF = 4k FIGURE 7. DIFFERENTIAL FREQUENCY RESPONSE vs RF (1/2 IS) FN8648.0 May 9, 2014 ISL1533A Typical Performance Curves (Continued) VS = ±12V AV = 5 RF = 3k RL = 100DIFF CL = 47pF CL = 27pF VS = ±12V AV = 10 RF = 3k RL = 100DIFF CL = 47pF CL = 15pF CL = 27pF CL = 15pF CL = 0pF CL = 0pF FIGURE 8. DIFFERENTIAL FREQUENCY RESPONSE vs CL (FULL IS) VS = ±12V AV = 5 RF = 3k RL = 100DIFF CL = 47pF CL = 27pF FIGURE 9. DIFFERENTIAL FREQUENCY RESPONSE vs CL (FULL IS) VS = ±12V AV = 10 RF = 3k RL = 100DIFF CL = 47pF CL = 27pF CL = 15pF CL = 15pF CL = 0pF CL = 0pF FIGURE 10. DIFFERENTIAL FREQUENCY RESPONSE vs CL (3/4 IS) VS = ±12V AV = 5 RF = 3k RL = 100DIFF CL = 47pF CL = 27pF CL = 15pF VS = ±12V AV = 10 RF = 3k RL = 100DIFF CL = 15pF CL = 0pF FIGURE 12. DIFFERENTIAL FREQUENCY RESPONSE vs CL (1/2 IS) Submit Document Feedback FIGURE 11. DIFFERENTIAL FREQUENCY RESPONSE vs CL (3/4 IS) 7 CL = 47pF CL = 27pF CL = 0pF FIGURE 13. DIFFERENTIAL FREQUENCY RESPONSE vs CL (1/2 IS) FN8648.0 May 9, 2014 ISL1533A Typical Performance Curves (Continued) VS = ±12V AV = 5 RF = 3k VS = ±12V AV = 10 RF = 3k RL = 100 RL = 365 RL = 100 RL = 365 RL = 220 RL = 220 RL = 50 RL = 50 FIGURE 14. DIFFERENTIAL FREQUENCY RESPONSE vs RL (FULL IS) VS = ±12V AV = 5 RF = 3k FIGURE 15. DIFFERENTIAL FREQUENCY RESPONSE vs RL (FULL IS) VS = ±12V AV = 10 RF = 3k RL = 100 RL = 100 RL = 365 RL = 50 RL = 50 RL = 220 RL = 220 FIGURE 16. DIFFERENTIAL FREQUENCY RESPONSE vs RL (3/4 IS) VS = ±12V AV = 5 RF = 3k RL = 365 FIGURE 17. DIFFERENTIAL FREQUENCY RESPONSE vs RL (3/4 IS) VS = ±12V AV = 10 RF = 3k RL = 100 RL = 100 RL = 365 RL = 220 RL = 50 FIGURE 18. DIFFERENTIAL FREQUENCY RESPONSE vs RL (1/2 IS) Submit Document Feedback 8 RL = 50 RL = 365 RL = 220 FIGURE 19. DIFFERENTIAL FREQUENCY RESPONSE vs RL (1/2 IS) FN8648.0 May 9, 2014 ISL1533A Typical Performance Curves (Continued) VS = ±12V AV = 5 RF = 3k FREQ = 200 kHz RL = 100DIFF THD VS = ±12V AV = 5 RF = 3k FREQ = 1 MHz RL = 100DIFF THD 2nd HD 3rd HD FIGURE 20. HARMONICS DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (FULL IS) VS = ±12V AV = 5 RF = 3k FREQ = 200 KHz RL = 100DIFF THD 2nd HD 3rd HD FIGURE 21. HARMONICS DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (FULL IS) VS = ±12V AV = 5 RF = 3k FREQ = 1 MHz RL = 100DIFF THD 2nd HD 3rd HD FIGURE 22. HARMONICS DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (3/4 IS) VS = ±12V AV = 5 RF = 3k FREQ = 200 KHz RL = 100DIFF THD 2nd HD 3rd HD FIGURE 23. HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (3/4 IS) VS = ±12V AV = 5 RF = 3k FREQ = 1 MHz RL = 100DIFF THD 2nd HD 3rd HD FIGURE 24. HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (1/2 IS) Submit Document Feedback 9 2nd HD 3rd HD FIGURE 25. HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (1/2 IS) FN8648.0 May 9, 2014 ISL1533A Typical Performance Curves (Continued) VS = ±12V AV = 5 RF = 3k FREQ = 2 MHz RL = 100DIFF THD ±12V 2nd HD 3rd HD ±6V k FIGURE 26. HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (FULL IS) k k k k FIGURE 27. QUIESCENT SUPPLY CURRENT vs RADJ THD FULL BIAS MODE 3/4 BIAS MODE 2nd HD VS = ±12V AV = 5 RF = 3k FREQ = 2 MHz RL = 100DIFF 1/2 BIAS MODE 3rd HD (¬±V FIGURE 28. HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (3/4 IS) FIGURE 29. SUPPLY CURRENT vs SUPPLY VOLTAGE VS = ±12V RF = 3k RL = 100 AV = 1 COMMON MODE THD FULL BIAS MODE 2nd HD VS = ±12V AV = 5 RF = 3k FREQ = 2 MHz RL = 100DIFF 1/2 BIAS MODE 3rd HD FIGURE 30. HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT VOLTAGE (1/2 IS) Submit Document Feedback 10 FIGURE 31. COMMON-MODE FREQUENCY RESPONSE FN8648.0 May 9, 2014 ISL1533A Typical Performance Curves (Continued) in- Av=20 en in+ FIGURE 32. INPUT VOLTAGE & CURRENT NOISE vs FREQUENCY FIGURE 33. SINGLE-ENDED OUTPUT VOLTAGE NOISE vs FREQUENCY AB ==> CD PSRR- PSRR+ CD ==> AB FIGURE 34. CHANNEL SEPARATION vs FREQUENCY FIGURE 35. PSRR vs FREQUENCY JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD - QFN EXPOSED 4.5 POWER DISSIPATION (W) 4.0 QFN 24 JA = +39°C/W 3.5 3.21W 3.0 2.5 2.0 1.5 1.0 0.5 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) FIGURE 36. OUTPUT IMPEDANCE vs FREQUENCY Submit Document Feedback 11 FIGURE 37. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FN8648.0 May 9, 2014 ISL1533A Applications Information TABLE 1. POWER MODES OF THE ISL1533A Figure 38 is a typical application circuit for ISL1533A as an ADSL2+ CO line driver. The driver output stage has been sized to provide full ADSL2+ CO power level of 20dBm onto the telephone lines. The actual peak output voltages and currents will depend on the transformer turn ratio. The ISL1533A is designed to support 450mA of output current, which exceeds the level required for 1:1 transformer ratio. VS+ TX+ FROM AFE + - VSRF 2RG 25 0.22µF TXFR 1:1 100 3k 667 TX- RT + - VS+ VSRF RT 25 0.22µF C1 C0 0 0 IS Full Power Mode 0 1 3/4 IS Power Mode 1 0 1/2 IS Power Mode 1 1 Power-down OPERATION Another method for controlling the power consumption of the ISL1533A is to connect a resistor from the IADJ pin to ground. When the IADJ pin is grounded (the normal state), the supply current per channel is as shown in the “SUPPLY CHARACTERISTICS” on page 4 of the “Electrical Specifications” table. When a resistor is inserted, the supply current is scaled according to Figure 27 on page 10 of the “Typical Performance Curves”. Both methods of power control can be used simultaneously. In this case, positive and negative supply currents (per amp) are given by Equation 1. 5.06mA I S + = 0.34mA + ------------------------------------------------- x 1 + R SET / 1300 3k FIGURE 38. TYPICAL ADSL CO LINE DRIVER 3/4C 1 + 1/2C 0 - C 1 C 0 1/4 Power Control Function The ISL1533A contains two forms of power control operation. Two digital inputs, C0 and C1, can be used to control the supply current of the ISL1533A drive amplifiers. C0 and C1 inputs are designed to pull high initially. Floating these inputs will put the device in disable mode. As the supply current is reduced, the ISL1533A will start to exhibit slightly higher levels of distortion and the frequency response will be limited. The four power modes of the ISL1533A are set up as shown in Table 1. -5.06mA I S - = ------------------------------------------------- x 1 + R SET / 1300 (EQ. 1) 3/4C 1 + 1/2C 0 - C 1 C 0 1/4 Feedback Resistor Value The bandwidth and peaking of the amplifiers varies with feedback and gain settings. The feedback resistor values can be adjusted to produce an optimal frequency response. Table 2 shows the recommended resistor values that produce an optimal driver frequency response (1dB of peaking). . TABLE 2. OPTIMUM DRIVER FEEDBACK RESISTOR FOR VARIOUS GAINS DRIVER VOLTAGE GAIN Submit Document Feedback 12 SUPPLY VOLTAGE 5 10 ±12V 3k 2k FN8648.0 May 9, 2014 ISL1533A Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION May 9, 2014 FN8648.0 CHANGE Initial Release About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com Submit Document Feedback 13 FN8648.0 May 9, 2014 ISL1533A Package Outline Drawing L24.4x5F-A 24 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 5/14 4.00 PIN 1 INDEX AREA A 24x0.40 2.6 to 2.8 B 24 20 PIN #1 INDEX AREA R0.20 6 1 5.00 0.50 19 0.5x6 = 3.00 REF 6 3.6 to 3.8 13 0.10 4x 7 12 0.10 M C A B 8 0.25 ±0.05 0.50 TOP VIEW 0.5x4 = 2.00 REF BOTTOM VIEW C (24x0.25) SEATING PLANE 0.08 C 0.10 C 0.203 REF 5 C 0 ~ 0.05 3.8 4.80 TYP SEE DETAIL “X” (20x0.50) (24x0.60) DETAIL "X" 2.8 0.00-0.05 3.80 TYP 0.90±0.10 SIDE VIEW TYPICAL RECOMMENDED LAND PATTERN NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) are for Reference Only. 2. Dimensioning and tolerancing conform to ASMEY14.5m-1994. 3. Unless otherwise specified, tolerance: Decimal ± 0.05 4. Dimension applies to the metallized terminal and is measured between 0.20mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. Submit Document Feedback 14 FN8648.0 May 9, 2014