Si2374DS Datasheet

Si2374DS
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Vishay Siliconix
N-Channel 20 V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
20
RDS(on) (Ω) MAX.
ID (A) d
0.030 at VGS = 4.5 V
5.9
0.034 at VGS = 2.5 V
5.5
0.041 at VGS = 1.8 V
5
• TrenchFET® power MOSFET
Qg (TYP.)
• 100 % Rg tested
• Material categorization:
For definitions of compliance please see
www.vishay.com/doc?99912
7.7 nC
APPLICATIONS
SOT-23 (TO-236)
D
• Load switch
D
3
• Power management
G
2
S
1
G
Top View
S
N-Channel MOSFET
Marking Code: F5
Ordering Information:
Si2374DS-T1-GE3 (Lead (Pb)-free and Halogen-free)
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
20
Gate-Source Voltage
VGS
±8
TC = 25 °C
4.7
ID
TA = 25 °C
4.5 a, b
3.6 a, b
TA = 70 °C
IDM
Pulsed Drain Current (t = 100 μs)
TC = 25 °C
Continuous Source-Drain Diode Current
1.4
0.8 a, b
TC = 25 °C
1.7
TC = 70 °C
1.1
PD
TA = 25 °C
W
0.96 a, b
0.62 a, b
TA = 70 °C
Operating Junction and Storage Temperature Range
A
25
IS
TA = 25 °C
Maximum Power Dissipation
V
5.9
TC = 70 °C
Continuous Drain Current (TJ = 150 °C)
UNIT
TJ, Tstg
-55 to 150
°C
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
a, c
Maximum Junction-to-Foot (Drain)
SYMBOL
TYPICAL
MAXIMUM
t≤5s
RthJA
100
130
Steady State
RthJF
60
75
UNIT
°C/W
Notes
a. Surface mounted on 1" x 1" FR4 board.
b. t = 5 s.
c. Maximum under steady state conditions is 175 °C/W.
d. TC = 25 °C.
S14-0768-Rev. A, 14-Apr-14
Document Number: 62947
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si2374DS
www.vishay.com
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 μA
20
-
-
V
-
34
-
-
-5
-
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
ΔVDS/TJ
ID = 250 μA
mV/°C
VGS(th) Temperature Coefficient
ΔVGS(th)/TJ
Gate-Source Threshold Voltage
VGS(th)
VDS = VGS , ID = 250 μA
0.4
-
1
V
IGSS
VDS = 0 V, VGS = ± 8 V
-
-
± 100
nA
VDS = 20 V, VGS = 0 V
-
-
1
VDS = 20 V, VGS = 0 V, TJ = 55 °C
-
-
10
VDS ≥ 5 V, VGS = 10 V
10
-
-
VGS = 4.5 V, ID = 4 A
-
0.025
0.030
VGS = 2.5 V, ID = 3 A
-
0.028
0.034
VGS = 1.8 V, ID = 2 A
-
0.031
0.041
VDS = 10 V, ID = 4 A
-
29
-
Gate-Source Leakage
Zero Gate Voltage Drain Current
IDSS
On-State Drain Current a
ID(on)
Drain-Source On-State Resistance a
Forward Transconductance a
Dynamic
RDS(on)
gfs
μA
A
Ω
S
b
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Rg
-
735
-
VDS = 10 V, VGS = 0 V, f = 1 MHz
-
110
-
-
40
-
VDS = 10 V, VGS = 10 V, ID = 4.5 A
-
13.4
20
-
7.7
12
VDS = 10 V, VGS = 4.5 V, ID = 4.5 A
-
1
-
-
1
-
0.12
0.6
1.2
-
4
8
-
22
33
f = 1 MHz
td(on)
VDD = 10 V, RL = 2.8 Ω
ID ≅ 3.6 A, VGEN = 8 V, Rg = 1 Ω
tr
td(off)
-
16
24
tf
-
9
18
td(on)
-
10
20
VDD = 10 V, RL = 2.8 Ω
ID ≅ 3.6 A, VGEN = 4.5 V, Rg = 1 Ω
tr
td(off)
tf
-
23
35
-
16
24
-
10
20
-
-
1.4
-
-
25
-
0.8
1.2
pF
nC
Ω
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulse Diode Forward Current (t = 100 μs)
ISM
Body Diode Voltage
VSD
TC = 25 °C
IS = 3.6 A, VGS = 0 V
A
V
Body Diode Reverse Recovery Time
trr
-
13
20
ns
Body Diode Reverse Recovery Charge
Qrr
-
6
12
nC
Reverse Recovery Fall Time
ta
-
9
-
Reverse Recovery Rise Time
tb
-
4
-
IF = 3.6 A, dI/dt = 100 A/μs, TJ = 25 °C
ns
Notes
a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S14-0768-Rev. A, 14-Apr-14
Document Number: 62947
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si2374DS
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (TJ = 25 °C, unless otherwise noted)
5
25
VGS = 5V thru 2V
VGS = 1.8 V
4
ID - Drain Current (A)
ID - Drain Current (A)
20
15
VGS = 1.5 V
10
3
TC = 25 °C
2
TC = 125 °C
1
5
TC = - 55 °C
0
0
0
0.5
1
1.5
VDS - Drain-to-Source Voltage (V)
0
2
0.3
0.05
1000
0.04
750
VGS = 2.5 V
0.03
VGS =4.5V
0.02
0.9
1.2
1.5
Transfer Characteristics
C - Capacitance (pF)
RDS(on) - On-Resistance (Ω)
Output Characteristics
VGS = 1.8 V
0.6
VGS - Gate-to-Source Voltage (V)
Ciss
500
250
Coss
Crss
0
0.01
0
5
10
15
20
25
0
10
15
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
20
1.6
8
VGS = 4.5 V, 4A / 2.5V, 3A
RDS(on) - On-Resistance (Normalized)
VDS = 5 V
ID = 4.5 A
VGS - Gate-to-Source Voltage (V)
5
ID - Drain Current (A)
6
VDS = 10 V
4
VDS = 16 V
2
0
0
3
6
9
12
Qg - Total Gate Charge (nC)
Gate Charge
S14-0768-Rev. A, 14-Apr-14
15
1.35
VGS = 1.8 V, 2A
1.1
0.85
0.6
- 50
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
Document Number: 62947
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For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si2374DS
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (TJ = 25 °C, unless otherwise noted)
100
0.070
RDS(on) - On-Resistance (Ω)
IS - Source Current (A)
ID = 4 A
TJ = 150 °C
10
TJ = 25 °C
1
0.1
0.0
0.055
0.040
TJ = 125 °C
TJ = 25 °C
0.025
0.010
0.3
0.6
0.9
1.2
0
2
4
6
8
VGS - Gate-to-Source Voltage (V)
VSD - Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
30
0.8
ID = 250 μA
0.65
Power (W)
VGS(th) (V)
20
0.5
10
0.35
0.2
- 50
- 25
0
25
50
75
100
125
150
0
0.001
0.01
0.1
1
10
TJ - Temperature (°C)
Time (s)
Threshold Voltage
Single Pulse Power (Junction-to-Ambient)
100
100
Limited by IDM
Limited by RDS(on)*
ID - Drain Current (A)
10
100 μs
1
1 ms
10 ms
100 ms
0.1
TA = 25 °C
0.01
0.1
10 s, 1 s
DC
BVDSS Limited
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
S14-0768-Rev. A, 14-Apr-14
Document Number: 62947
4
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si2374DS
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (TJ = 25 °C, unless otherwise noted)
6.5
ID - Drain Current (A)
5.2
3.9
2.6
1.3
0
0
25
50
75
100
125
150
TC - Case Temperature (°C)
Current Derating*
2
0.9
0.72
Power (W)
Power (W)
1.5
1
0.54
0.36
0.5
0.18
0
0
0
25
50
75
100
TC - Case Temperature (°C)
Power Junction-to-Foot
125
150
0
25
50
75
100
125
150
TA - Ambient Temperature (°C)
Power Junction-to-Ambient
* The power dissipation PD is based on TJ (max.) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the
package limit.
S14-0768-Rev. A, 14-Apr-14
Document Number: 62947
5
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Si2374DS
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (TJ = 25 °C, unless otherwise noted)
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
Notes:
0.1
PDM
0.05
t1
0.02
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = RthJA = 175 °C/W
3. TJM - TA = PDMZthJA(t)
Single Pulse
0.01
10 -4
4. Surface Mounted
10 -3
10 -2
10 -1
1
100
10
1000
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10 -4
10 -3
10 -2
10 -1
1
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?62947.
S14-0768-Rev. A, 14-Apr-14
Document Number: 62947
6
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
SOT-23 (TO-236): 3-LEAD
b
3
E1
1
E
2
e
S
e1
D
0.10 mm
C
0.004"
A2
A
C
q
Gauge Plane
Seating Plane
Seating Plane
C
A1
Dim
0.25 mm
L
L1
MILLIMETERS
Min
INCHES
Max
Min
Max
0.044
A
0.89
1.12
0.035
A1
0.01
0.10
0.0004
0.004
A2
0.88
1.02
0.0346
0.040
b
0.35
0.50
0.014
0.020
c
0.085
0.18
0.003
0.007
D
2.80
3.04
0.110
0.120
E
2.10
2.64
0.083
0.104
E1
1.20
1.40
0.047
e
0.95 BSC
e1
L
1.90 BSC
0.40
L1
q
0.0748 Ref
0.60
0.016
0.64 Ref
S
0.024
0.025 Ref
0.50 Ref
3°
0.055
0.0374 Ref
0.020 Ref
8°
3°
8°
ECN: S-03946-Rev. K, 09-Jul-01
DWG: 5479
Document Number: 71196
09-Jul-01
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1
AN807
Vishay Siliconix
Mounting LITTLE FOOTR SOT-23 Power MOSFETs
Wharton McDaniel
Surface-mounted LITTLE FOOT power MOSFETs use integrated
circuit and small-signal packages which have been been modified
to provide the heat transfer capabilities required by power devices.
Leadframe materials and design, molding compounds, and die
attach materials have been changed, while the footprint of the
packages remains the same.
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286), for the basis
of the pad design for a LITTLE FOOT SOT-23 power MOSFET
footprint . In converting this footprint to the pad set for a power
device, designers must make two connections: an electrical
connection and a thermal connection, to draw heat away from the
package.
ambient air. This pattern uses all the available area underneath the
body for this purpose.
0.114
2.9
0.081
2.05
0.150
3.8
0.059
1.5
0.0394
1.0
0.037
0.95
FIGURE 1. Footprint With Copper Spreading
The electrical connections for the SOT-23 are very simple. Pin 1 is
the gate, pin 2 is the source, and pin 3 is the drain. As in the other
LITTLE FOOT packages, the drain pin serves the additional
function of providing the thermal connection from the package to
the PC board. The total cross section of a copper trace connected
to the drain may be adequate to carry the current required for the
application, but it may be inadequate thermally. Also, heat spreads
in a circular fashion from the heat source. In this case the drain pin
is the heat source when looking at heat spread on the PC board.
Figure 1 shows the footprint with copper spreading for the SOT-23
package. This pattern shows the starting point for utilizing the
board area available for the heat spreading copper. To create this
pattern, a plane of copper overlies the drain pin and provides
planar copper to draw heat from the drain lead and start the
process of spreading the heat so it can be dissipated into the
Document Number: 70739
26-Nov-03
Since surface-mounted packages are small, and reflow soldering
is the most common way in which these are affixed to the PC
board, “thermal” connections from the planar copper to the pads
have not been used. Even if additional planar copper area is used,
there should be no problems in the soldering process. The actual
solder connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the drain
pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low-impedance
path for heat to move away from the device.
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1
Application Note 826
Vishay Siliconix
0.049
(1.245)
0.029
0.022
(0.559)
(0.724)
0.037
(0.950)
(2.692)
0.106
RECOMMENDED MINIMUM PADS FOR SOT-23
0.053
(1.341)
0.097
(2.459)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index Return to Index
APPLICATION NOTE
Document Number: 72609
Revision: 21-Jan-08
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25
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Revision: 02-Oct-12
1
Document Number: 91000