ESD24VL1B-02LRH Data Sheet (1.5 MB, EN)

TVS Diode
Transient Voltage Suppressor Diodes
ESD24VL1B Series
Low Capacitance Bi-directional ESD / Transient Protection Diode
ESD24VL1B-02LS
ESD24VL1B-02LRH
Data Sheet
Revision 1.1, 2012-05-04
Final
Power Management & Multimarket
Edition 2012-05-04
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2012 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
ESD24VL1B Series
Revision History: Rev. 1.0, 2011-12-06
Page or Item
Subjects (major changes since previous revision)
Revision 1.1, 2012-05-04
7+8
ESD air and contact discharge change
8
Parameter VBR inserted in Table 3-2
Trademarks of Infineon Technologies AG
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Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
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RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of
Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Final Data Sheet
3
Revision 1.1, 2012-05-04
ESD24VL1B Series
Table of Contents
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1
1.1
1.2
Low Capacitance Bi-directional ESD / Transient Protection Diode . . . . . . . . . . . . . . . . . . . . . . . . 7
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2
Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
3.1
3.2
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical Characteristics at TA = 25 °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Typical Characteristics at TA=25°C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5
Ordering Information Scheme (Examples) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6
6.1
6.2
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
PG-TSLP-2-17 (mm) [2] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
PG-TSSLP-2-1 (mm) [2] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Predefined Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Final Data Sheet
4
Revision 1.1, 2012-05-04
ESD24VL1B Series
List of Figures
List of Figures
Figure 2-1
Figure 3-1
Figure 3-2
Figure 3-3
Figure 3-4
Figure 3-5
Figure 3-6
Figure 3-7
Figure 3-8
Figure 4-1
Figure 5-1
Figure 6-1
Figure 6-2
Figure 6-3
Figure 6-4
Figure 6-5
Figure 6-6
Figure 6-7
Figure 6-8
Pin Configuration and Schematic Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Definitions of electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Reverse current: IR = f(VR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Line capacitance: CL = f(VR), f = 1MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Clamping voltage (TLP): ITLP = f(VTLP)[1] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
IEC61000-4-2 : VCL = f(t), 8 kV positive pulse from pin 1 to pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . 11
IEC61000-4-2 : VCL = f(t), 8 kV negative pulse from pin 1 to pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . 11
IEC61000-4-2 : VCL = f(t), 15 kV positive pulse from pin 1 to pin 2 . . . . . . . . . . . . . . . . . . . . . . . . 12
IEC61000-4-2 : VCL = f(t), 15 kV negative pulse from pin 1 to pin 2 . . . . . . . . . . . . . . . . . . . . . . . . 12
Single line, bi-directional ESD / Transient protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
PG-TSLP-2-17: Package overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
PG-TSLP-2-17: Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
PG-TSLP-2-17: Packing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
PG-TSLP-2-17: Marking (example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
PG-TSSLP-2-1: Package overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
PG-TSSLP-2-1: Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
PG-TSSLP-2-1: Packing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
PG-TSSLP-2-1: Marking (example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Final Data Sheet
5
Revision 1.1, 2012-05-04
ESD24VL1B Series
List of Tables
List of Tables
Table 2-1
Table 3-1
Table 3-2
Table 3-3
Table 3-4
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Ratings at TA = 25 °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Characteristics at TA = 25 °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF Characteristics at TA = 25 °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Characteristics at TA = 25 °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Final Data Sheet
6
7
8
8
9
9
Revision 1.1, 2012-05-04
ESD24VL1B Series
Low Capacitance Bi-directional ESD / Transient Protection Diode
1
Low Capacitance Bi-directional ESD / Transient Protection Diode
1.1
Features
•
•
•
•
•
ESD / transient protection according to:
– IEC61000-4-2 (ESD): ±20 kV (air), ±18 kV (contact)
– IEC61000-4-4 (EFT): 40 A (5/50 ns)
– IEC61000-4-5 (surge): 1 A (8/20 μs)
Bi-directional, working voltage up to VRWM = ±24 V
Low capacitance: CL = 2.5 pF (typical)
Very low reverse current. IR = < 1nA (typical)
Pb-free (RoHS compliant) and halogen free package
1.2
Application Examples
•
•
•
•
ESD protection of USB-battery charger interface
LCD Backlight protection
NFC antenna protection
Protection of high speed bus rated up to ±24 V
2
Product Description
Pin 1
Pin 2
Pin 1 marking
(lasered)
Pin 1
TSLP-2
Pin 1
Pin 2
Pin 2
TSSLP-2
a) Pin configuration
b) Schematic diagram
P G-TS (S)LP -2_Dual_Diode_S erie_P inConf_and_S chematicDiag. v sd
Figure 2-1 Pin Configuration and Schematic Diagram
Table 2-1
Ordering Information
Type
Package
Configuration
Marking code
ESD24VL1B-02LS
PG-TSSLP-2-1
1 line, bi-directional
n
ESD24VL1B-02LRH
PG-TSLP-2-17
1 line, bi-directional
n
Final Data Sheet
7
Revision 1.1, 2012-05-04
ESD24VL1B Series
Characteristics
3
Characteristics
Table 3-1
Maximum Ratings at TA = 25 °C, unless otherwise specified
Parameter
Symbol
1)
Values
Unit
Min.
Typ.
Max.
ESD air discharge
ESD contact discharge1)
VESD
-20
-18
–
–
20
18
kV
Peak pulse current (tp = 8/20 μs)2)
IPP
-1
–
1
A
Operating temperature range
TOP
-55
–
150
°C
Storage temperature
1) VESD according to IEC61000-4-2
2) IPP according to IEC61000-4-5
Tstg
-65
–
150
°C
Electrical Characteristics at TA = 25 °C, unless otherwise specified
3.1
RDYN Dynamic resistance
VBR
Breakdown voltage
I
VRWM Reverse working voltage maximum
VCL
Clamping voltage
IPP
Peak pulse current
IPP
RDYN
IBR
VCL
VBR
IRWM
VRWM
V RWM
I RWM
VBR
VCL
V
IBR
RDYN
IPP
Diode_Charac teris tic _Curv e_B -i direc tional .v s d
Figure 3-1 Definitions of electrical characteristics
Table 3-2
DC Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Values
Unit
Min.
Typ.
Max.
Reverse working voltage VRWM
-24
–
24
Breakdown voltage
VBR
24.3
25
–
Reverse current
IR
–
<1
50
Final Data Sheet
8
Note /
Test Condition
V
IR = 1 mA
nA
VR = 24 V
Revision 1.1, 2012-05-04
ESD24VL1B Series
Characteristics
Table 3-3
RF Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Line capacitance
Table 3-4
CL
Values
Min.
Typ.
Max.
–
2.5
3.5
Unit
Note /
Test Condition
pF
VR = 0 V, f = 1 MHz
Unit
Note /
Test Condition
V
IPP = 16 A
ESD Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Clamping voltage
1)
VCL
Values
Min.
Typ.
Max.
–
55
–
1)
Dynamic resistance
RDYN
–
1.0
–
Ω
1)Please refer to Application Note AN210[1] . TLP parameter: Z0 = 50 Ω , tp = 100ns, tr = 300ps, averaging window:
t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP charactertistics between
IPP1 = 10 A and IPP2 = 40 A.
Typical Characteristics at TA=25°C, unless otherwise specified
3.2
-7
10
-8
10
IR [A]
10-9
10
-10
10
-11
10-12
10
-13
-25
-20
-15
-10
-5
0
VR [V]
5
10
15
20
25
Figure 3-2 Reverse current: IR = f(VR)
Final Data Sheet
9
Revision 1.1, 2012-05-04
ESD24VL1B Series
Characteristics
4
CL [pF]
3
2
1
0
-25
-20
-15
-10
-5
0
VR [V]
5
10
15
20
25
Figure 3-3 Line capacitance: CL = f(VR), f = 1MHz
15
ESD24VL1B
RDYN
25
ITLP [A]
20
10
15
RDYN=1.0Ω
10
5
Equivalent VIEC [kV]
30
5
0
20
25
30
35
40
45 50
VTLP [V]
55
60
65
70
75
0
Figure 3-4 Clamping voltage (TLP): ITLP = f(VTLP)[1]
Final Data Sheet
10
Revision 1.1, 2012-05-04
ESD24VL1B Series
Characteristics
110
100
Scope: 20 GS/s
90
VCL-30ns-peak = 49.1 [V]
80
VCL [V]
70
VCL-max-peak = 94.0 [V]
60
50
40
30
20
10
0
-10
-100
0
100
200
300
400
tp [ns]
500
600
700
800
900
Figure 3-5 IEC61000-4-2 : VCL = f(t), 8 kV positive pulse from pin 1 to pin 2
40
Scope: 20 GS/s
20
0
VCL [V]
-20
-40
-60
VCL-max-peak = -93.5 [V]
-80
VCL-30ns-peak = -46.9 [V]
-100
-120
-100
0
100
200
300
400
tp [ns]
500
600
700
800
900
Figure 3-6 IEC61000-4-2 : VCL = f(t), 8 kV negative pulse from pin 1 to pin 2
Final Data Sheet
11
Revision 1.1, 2012-05-04
ESD24VL1B Series
Characteristics
180
160
Scope: 20 GS/s
140
VCL [V]
120
100
VCL-30ns-peak = 59.5 [V]
80
VCL-max-peak = 169.8 [V]
60
40
20
0
-100
0
100
200
300
400
tp [ns]
500
600
700
800
900
Figure 3-7 IEC61000-4-2 : VCL = f(t), 15 kV positive pulse from pin 1 to pin 2
40
20
Scope: 20 GS/s
0
VCL [V]
-20
-40
-60
-80
VCL-max-peak = -157 [V]
-100
VCL-30ns-peak = -57.7 [V]
-120
-140
-160
-100
0
100
200
300
400
tp [ns]
500
600
700
800
900
Figure 3-8 IEC61000-4-2 : VCL = f(t), 15 kV negative pulse from pin 1 to pin 2
Final Data Sheet
12
Revision 1.1, 2012-05-04
ESD24VL1B Series
Application Information
Application Information
Connector
4
Protected signal line
ESD
I/O sensitive
device
1
2
The protection diode should be placed very close to the location
where the ESD or other transients can occur to keep loops and
inductances as small as possible .
Pin 2 (or pin 1) should be connected directly to a ground plane on
the board .
A pplic ation_E S D5V3S 1B-02LS .v s d
Figure 4-1 Single line, bi-directional ESD / Transient protection
Final Data Sheet
13
Revision 1.1, 2012-05-04
ESD24VL1B Series
Ordering Information Scheme (Examples)
5
ESD
Ordering Information Scheme (Examples)
0P1
RF
- XX YY
Package
XX = Pin number (i.e.: 02 = 2 pins; 03 = 3 pins)
YY = Package family:
LS = TSSLP
LRH = TSLP
For Radio Frequency Applications
Line Capacitance CL in pF: (i.e.: 0P1 = 0.1pF)
ESD 5V3 U n U - XX YY
Package or Application
XX = Pin number (i.e.: 02 = 2 pins; 03 = 3 pins)
YY = Package family:
LS = TSSLP
LRH = TSLP
S = SOT363
U = SC74
XX = Application family:
LC = Low Clamp
HDMI
Uni- / Bi-directional or Rail to Rail protection
Number of protected lines (i.e.: 1 = 1 line; 4 = 4 lines)
Capacitance: Standard (>10pF), Low (<10pF), Ultra-low (<1pF)
Maximum working voltage VRWM in V: (i.e.: 5V3 = 5.3V)
Figure 5-1 Ordering information scheme
Final Data Sheet
14
Revision 1.1, 2012-05-04
ESD24VL1B Series
Package Information
6
Package Information
6.1
PG-TSLP-2-17 (mm) [2]
Top view
Bottom view
0.39 +0.01
-0.03
0.6 ±0.05
0.05 MAX.
1±0.05
0.65 ±0.05
2
0.25 ±0.035 1)
1
0.5 ±0.035 1)
Cathode
marking
1) Dimension applies to plated terminal
TSLP 2 7 PO V02
0.45
Copper
Solder mask
0.375
0.35
0.275
1
0.925
0.3
0.35
0.6
0.275
Figure 6-1 PG-TSLP-2-17: Package overview
Stencil apertures
TSLP-2-7-FP V01
Figure 6-2 PG-TSLP-2-17: Footprint
0.5
1.16
Orientation
marking
8
4
0.76
TSLP-2-7-TP V03
Figure 6-3 PG-TSLP-2-17: Packing
Type code
12
Cathode marking
TSLP-2-18-MK V01
Figure 6-4 PG-TSLP-2-17: Marking (example)
Final Data Sheet
15
Revision 1.1, 2012-05-04
ESD24VL1B Series
Package Information
PG-TSSLP-2-1 (mm) [2]
Top view
Bottom view
0.31 +0.01
-0.02
2
0.62 ±0.035
0.355 ±0.025
0.32 ±0.035
1
0.2 ±0.025 1)
6.2
0.26 ±0.025 1)
Cathode
marking
1) Dimension applies to plated terminal
TSSLP-2-1,-2-PO V05
Figure 6-5 PG-TSSLP-2-1: Package overview
0.19
0.24
Solder mask
0.19
0.57
0.14
0.62
Copper
0.19
0.27
0.24
0.32
Stencil apertures
TSSLP-2-1,-2-FP V02
Figure 6-6 PG-TSSLP-2-1: Footprint
a
Tape type
Ex Ey
Punched Tape
0.43 0.73
Embossed Tape 0.37 0.67
8
Ey
Cathode
marking
g
0.35
4
Deliveries can be both tape types (no selection possible).
Specification allows identical processing (pick & place) by users.
Ex
TSSLP-2-1,-2-TP V03
Figure 6-7 PG-TSSLP-2-1: Packing
Figure 6-8 PG-TSSLP-2-1: Marking (example)
Final Data Sheet
16
Revision 1.1, 2012-05-04
ESD24VL1B Series
References
References
[1]
Infineon AG - Application Note AN210: Effective ESD Protection design at System Level Using VF-TLP
Characterization Methodology
[2]
Infineon AG - Recommendations for PCB Assembly of Infineon TSLP and TSSLP Packages
Final Data Sheet
17
Revision 1.1, 2012-05-04
ESD24VL1B Series
Terminology
Terminology
CL
Line capacitance
DSC
Digital Still Camera
EFT
Electrical Fast Transient
ESD
Electrostatic Discharge
IPP
Peak pulse current
IR
Reverse current
LCD
Liquid Crystal Display
PPK
Peak pulse power
RDYN
Dynamic resistance
RoHs
Restriction of Hazardous Substance directive
STB
Set-Top-Box
TA
Ambient temperature
TOP
Operation temperature
tp
Pulse duration
Tstg
Storage temperature
VBR
Breakdown voltage
VCL
Reverse clamping voltage
VESD
Electrostatic discharge voltage
VR
Reverse voltage
VRWM
Reverse working voltage maximum
Final Data Sheet
18
Revision 1.1, 2012-05-04
ESD24VL1B Series
Predefined Names
Predefined Names
Name
Initial Cross-Reference
X-GOLD
X-GOLD
XMM
XMM
----------------------------------------------------------------------------Definition of “Predefined Names”
Frequently used expressions, such as component names, file names, tools releases, version numbers, proprietary
variables and software links, can be used in a similar way as user variables. However, they must be listed in a
special table and not in the standard file “Variables”.
Correct Usage
Steps:
1. Insert all expressions into the left column of the above table.
2. Insert an initial Cross-Reference into the right column of the same row. The initial Cross-Reference is
necessary to ensure that a single ID is used in all your documents using the “Predefined_Names.fm” file
(Example: X-GOLD has the unique ID = CHDGHJGH).
3. Insert a Cross-Reference (Element “CrossReference”) into your document to the Element Identifier of the
“Predefined_Names.fm” file. Set the output format of the Cross-Reference to “Variable” (example: X-GOLD).
Notes
1. All documents in a project (such as XMM) and within a book should use the same file “Predefined Names”.
This allows copying content between different documents. For this reason, local versions of “Predefined
Names” must not be produced.
2. New definitions must be inserted in a new row. Never change existing definitions, as they might be used in
other documents.
3. This file does not need to be included in your book, but it must be in the fm sub-folder of your document.
4. You can sort the above table with FrameMaker only if the initial cross-reference in the right column has been
properly inserted. Otherwise, the table may only be sorted by hand, as the cross-references to your document
would get lost.
Final Data Sheet
19
Revision 1.1, 2012-05-04
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Published by Infineon Technologies AG