SiHP16N50C, SiHB16N50C, SiHF16N50C www.vishay.com Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) at TJ max. • Low Figure-of-Merit Ron x Qg 560 RDS(on) () VGS = 10 V 0.38 Qg (Max.) (nC) • 100 % Avalanche Tested 68 Qgs (nC) • Gate Charge Improved 17.6 Qgd (nC) • Trr/Qrr Improved 21.8 Configuration Single TO-220AB TO-220 FULLPAK G D • Compliant to RoHS Directive 2002/95/EC Note * Pb containing terminations are not RoHS compliant, exemptions may apply D S GD S D2PAK (TO-263) G S G D N-Channel MOSFET S ORDERING INFORMATION Package Lead (Pb)-free TO-220AB D2PAK (TO-263) SiHP16N50C-E3 SiHB16N50C-E3 SiHF16N50C-E3 - SiHB16N50CTR-E3 - - SiHB16N50CTL-E3 - TO-220 FULLPAK ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 500 Gate-Source Voltage VGS ± 30 Continuous Drain Current (TJ = 150 °C)a Pulsed Drain TC = 25 °C VGS at 10 V TC = 100 °C Currentc ID IDM Linear Derating Factor Single Pulse Avalanche Energyb EAS TO220-AB, D2PAK (TO-263) Maximum Power Dissipation TO-220 FULLPAK TJ, Tstg Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature)d PD for 10 s UNIT V 16 A 10 40 2 W/°C 320 mJ 250 38 W - 55 to + 150 300 °C Notes a. Limited by maximum junction temperature. b. VDD = 50 V, starting TJ = 25 °C, L = 2.5 mH, Rg = 25 , IAS = 16 A. c. Repetitive rating; pulse width limited by maximum junction temperature. d. 1.6 mm from case. S11-1116-Rev. B, 13-Jun-11 1 Document Number: 91401 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP16N50C, SiHB16N50C, SiHF16N50C www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS SYMBOL TO220-AB D2PAK (TO-263) TO-220 FULLPAK Maximum Junction-to-Ambient RthJA 62 65 Maximum Junction-to-Case (Drain) RthJC 0.5 3.3 Junction-to-Ambient (PCB mount)a RthJA 40 - PARAMETER UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage (N) VDS VGS = 0 V, ID = 250 μA 500 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.6 - V/°C VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 500 V, VGS = 0 V - - 50 VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250 VGS = 10 V μA - 0.31 0.38 gfs VDS = 50 V, ID = 3 A - 3 - S Input Capacitance Ciss 1900 - Coss - 230 - Reverse Transfer Capacitance Crss VGS = 0 V, VDS = 25 V, f = 1.0 MHz - Output Capacitance - 24 - Drain-Source On-State Resistance Forward Transconductancea RDS(on) ID = 8 A Dynamic Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time - 45 68 - 18 - Qgd - 22 - td(on) - 27 - tr td(off) Fall Time tf Gate Input Resistance Rg VGS = 10 V ID = 16 A, VDS = 400 V pF nC VDD = 250 V, ID = 16 A, Rg = 9.1 VGS = 10 V - 156 - - 29 - - 31 - f = 1 MHz, open drain - 1.6 - - - 16 - - 30 - - 1.8 - 555 - ns - 5.5 - μC - 18 - A ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Body Diode Reverse Recovery Current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 10 A, VGS = 0 V TJ = 25 °C, IF = IS, dI/dt = 100 A/μs, VR = 20 V V Note • The information shown here is a preliminary product proposal, not a commercial product data sheet. Vishay Siliconix is not committed to produce this or any similar product. This information should not be used for design purposes, nor construed as an offer to furnish or sell such products. S11-1116-Rev. B, 13-Jun-11 2 Document Number: 91401 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP16N50C, SiHB16N50C, SiHF16N50C www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 45 50 15 V 14 V 13 V 12 V 11 V 10 V 9.0 V 8.0 V 7.0 V 6.0 V BOTTOM 5.0 V TOP 40 35 30 25 TJ = 25 °C 20 15 10 5 7.0 V 0 0 5 10 15 20 40 35 30 25 20 15 TJ = 150 °C 10 TJ = 25 °C 5 0 25 0 30 2 4 6 8 10 12 14 16 18 20 VDS, Drain-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics (TO-220) Fig. 3 - Typical Transfer Characteristics 30 ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 45 VGS TJ = 150 °C TOP 15 V 14 V 13 V 12 V 11 V 10 V 9.0 V 8.0 V 7.0 V 6.0 V BOTTOM 5.0 V 25 20 15 RDS(on), Drain-to-Source On-Resistance (Normalized) ID, Drain-to-Source Current (A) VGS 10 7.0 V 5 0 0 5 10 15 20 25 30 VDS, Drain-to-Source Voltage (V) ID = 16 A 2.5 2 1.5 1 0.5 VGS = 10 V 0 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 2 - Typical Output Characteristics (TO-220) S11-1116-Rev. B, 13-Jun-11 3 Fig. 4 - Normalized On-Resistance vs. Temperature 3 Document Number: 91401 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP16N50C, SiHB16N50C, SiHF16N50C www.vishay.com 2800 100 ISD, Reverse Drain Current (A) VGS = 0 V, f = 1MHz Ciss = Cgs +Cgd Cds SHORTED Crss = Cgd Coss = Cds + Cgd 2400 C, Capacitance (pF) Vishay Siliconix 2000 Ciss 1600 1200 Coss 800 400 Crss TJ = 150 °C 10 TJ = 25 °C 1 VGS = 0 V 0.1 0 1 10 100 0.2 1000 0.4 VDS, Drain-to-Source Voltage (V) 1.2 1.4 1.6 OPERATION IN THIS AREA LIMITED BY RDS(on) 100 ID, Drain-to-Source Current (A) VGS, Gate-to-Source Voltage (V) 20 1 Fig. 7 - Typical Source-Drain Diode Forward Voltage VDS = 400 V VDS = 250 V VDS = 100 V ID = 16 A 0.8 VSD, Source-to-Drain Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 24 0.6 16 12 8 4 100 µs 10 1 ms 10 ms 1 TTTTCCCC====25 25 25 25°C °C °C °C 150 150 150°C °C °C °C TTTTJJJJ====150 Single Single Single SinglePulse Pulse Pulse Pulse 0.1 0 0 20 40 60 10 80 100 Fig. 8 - Maximum Safe Operating Area (TO-220AB, D2PAK) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage OPERATION IN THIS AREA LIMITED BY RDS(on) 100 ID, Drain-to-Source Current (A) 1000 VDS, Drain-to-Source Voltage (V) QG, Total Gate Charge (nC) 100 µs 10 1 ms 1 TC = 25 °C TJ = 150 °C Single Pulse 10 ms 0.1 10 100 1000 VDS, Drain-to-Source Voltage (V) Fig. 9 - Maximum Safe Operating Area (TO-220 FULLPAK) S11-1116-Rev. B, 13-Jun-11 4 Document Number: 91401 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP16N50C, SiHB16N50C, SiHF16N50C www.vishay.com VDS Vishay Siliconix RD VDS 90 % VGS D.U.T. RG + - VDD 10 % VGS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % t d(on) tr t d(off) t f Fig. 10b - Switching Time Waveforms Fig. 10a - Switching Time Test Circuit 1 Thermal Response (ZthJC) 0.5 0.2 0.1 0.1 PDM 0.05 0.02 t1 t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC Single Pulse (Thermal Response) 0.01 10-4 10-3 10-2 0.1 1 t1, Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case (TO-220AB, D2PAK) 1 Thermal Response (ZthJC) 0.5 0.2 0.1 0.1 PDM 0.05 t1 0.02 t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC Single Pulse (Thermal Response) 0.01 10-4 10-3 10-2 0.1 1 10 t1, Rectangular Pulse Duration (s) Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case (TO-220 FULLPAK) S11-1116-Rev. B, 13-Jun-11 5 Document Number: 91401 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP16N50C, SiHB16N50C, SiHF16N50C www.vishay.com Vishay Siliconix 15 V QG VGS L VDS Driver QGS D.U.T. RG + A - VDD IAS 20 V tp QGD VG A 0.01 Ω Charge Fig. 14a - Basic Gate Charge Waveform Fig. 13a - Unclamped Inductive Test Circuit Current regulator Same type as D.U.T. V DS 50 kΩ tp 12 V 0.2 µF 0.3 µF D.U.T. + V - DS VGS 3 mA I AS IG ID Current sampling resistors Fig. 13b - Unclamped Inductive Waveforms S11-1116-Rev. B, 13-Jun-11 Fig. 14b - Gate Charge Test Circuit 6 Document Number: 91401 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP16N50C, SiHB16N50C, SiHF16N50C www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive Period P.W. D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current D.U.T. VDS Body diode forward current dI/dt waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 15 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91401. S11-1116-Rev. B, 13-Jun-11 7 Document Number: 91401 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-220-1 A E DIM. Q H(1) D 3 2 L(1) 1 M* L b(1) INCHES MIN. MAX. MIN. MAX. A 4.24 4.65 0.167 0.183 b 0.69 1.02 0.027 0.040 b(1) 1.14 1.78 0.045 0.070 F ØP MILLIMETERS c 0.36 0.61 0.014 0.024 D 14.33 15.85 0.564 0.624 E 9.96 10.52 0.392 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 1.14 1.40 0.045 0.055 H(1) 6.10 6.71 0.240 0.264 0.115 J(1) 2.41 2.92 0.095 L 13.36 14.40 0.526 0.567 L(1) 3.33 4.04 0.131 0.159 ØP 3.53 3.94 0.139 0.155 Q 2.54 3.00 0.100 0.118 ECN: X15-0364-Rev. C, 14-Dec-15 DWG: 6031 Note • M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM C b e J(1) e(1) Package Picture ASE Revison: 14-Dec-15 Xi’an Document Number: 66542 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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