SiHP35N60E www.vishay.com Vishay Siliconix E Series Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) at TJ max. • A specific on resistance (m-cm2) reduction of 25 % • Low figure-of-merit (FOM) Ron x Qg • Low input capacitance (Ciss) • Reduced switching and conduction losses • Ultra low gate charge (Qg) • Avalanche energy rated (UIS) • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 650 RDS(on) typ. () at 25 °C VGS = 10 V Qg max. (nC) 0.082 132 Qgs (nC) 22 Qgd (nC) 46 Configuration Single D TO-220AB APPLICATIONS • Power factor correction power supplies (PFC) • Hard switching PWM stages • Computing - Switch mode power supplies (SMPS) • Lighting - Light emitting diode (LED) - High intensity discharge (HID) • Telecom - Server power supplies • Renewable energy - Photovoltaic inverters • Industrial - Welding - Induction heating - Motor drives - Battery chargers - Uniterruptable power supplies G G D S S N-Channel MOSFET ORDERING INFORMATION Package TO-220AB Lead (Pb)-free and Halogen-free SiHP35N60E-GE3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 600 Gate-Source Voltage VGS ± 30 Continuous Drain Current (TJ = 150 °C) VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Current a ID UNIT V 32 20 A IDM 80 2 W/°C Single Pulse Avalanche Energy b EAS 691 mJ Maximum Power Dissipation PD 250 W TJ, Tstg -55 to +150 °C Linear Derating Factor Operating Junction and Storage Temperature Range Drain-Source Voltage Slope TJ = 125 °C Reverse Diode dV/dt d Soldering Recommendations (Peak Temperature) c for 10 s dV/dt 57 31 300 V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature. b. VDD = 140 V, starting TJ = 25 °C, L = 28.2 mH, Rg = 25 , IAS = 7 A. c. 1.6 mm from case. d. ISD ID, dI/dt = 100 A/μs, starting TJ = 25 °C. S16-1157-Rev. A, 13-Jun-16 Document Number: 91580 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP35N60E www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Maximum Junction-to-Case (Drain) RthJC - 0.5 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage (N) Gate-Source Leakage Zero Gate Voltage Drain Current VDS VGS = 0 V, ID = 250 μA 600 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.70 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2 - 4 V VGS = ± 20 V - - ± 100 nA μA IGSS IDSS VGS = ± 30 V - - ±1 VDS = 600 V, VGS = 0 V - - 1 VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 25 μA - 0.082 0.094 gfs VDS = 30 V, ID = 17 A - 13 - S Input Capacitance Ciss 2760 - Coss - 118 - Reverse Transfer Capacitance Crss VGS = 0 V, VDS = 100 V, f = 1 MHz - Output Capacitance - 5 - Effective Output Capacitance, Energy Related a Co(er) - 118 - Effective Output Capacitance, Time Related b Co(tr) - 429 - Qg - 88 132 - 22 - - 46 - Drain-Source On-State Resistance Forward Transconductance RDS(on) VGS = 10 V ID = 17 A Dynamic Total Gate Charge pF VDS = 0 V to 480 V, VGS = 0 V Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Rise Time Turn-Off Delay Time tr td(off) Fall Time tf Gate Input Resistance Rg VGS = 10 V ID = 17 A, VDS = 480 V - 29 58 VDD = 480 V, ID = 17 A, VGS = 10 V, Rg = 9.1 - 61 92 - 78 117 - 32 64 f = 1 MHz, open drain 0.25 0.5 1 - - 32 - - 80 nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current ISM Diode Forward Voltage VSD Reverse Recovery Time trr Reverse Recovery Charge Qrr Reverse Recovery Current IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 17 A, VGS = 0 V TJ = 25 °C, IF = IS = 17 A, dI/dt = 100 A/μs, VR = 25 V - 0.9 1.2 V - 455 910 ns - 8 16 μC - 30 - A Notes a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDSS. b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDSS. S16-1157-Rev. A, 13-Jun-16 Document Number: 91580 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP35N60E www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 80 3.0 TJ = 25 °C ID = 17 A RDS(on), Drain-to-Source On-Resistance (Normalized) 60 40 20 2.5 2.0 1.5 VGS = 10 V 1.0 0.5 0 0 5 10 15 20 25 VDS, Drain-to-Source Voltage (V) 0 - 60 - 40 - 20 30 Fig. 4 - Normalized On-Resistance vs. Temperature Fig. 1 - Typical Output Characteristics 60 TOP 15 V 14 V 13 V 12 V 11 V 10 V 9V 8V 7V 6V BOTTOM 5 V 40 100 000 TJ = 150 °C 30 20 Ciss 1000 100 Coss Crss 10 10 0 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds shorted Crss = Cgd Coss = Cds + Cgd 10 000 C, Capacitance (pF) ID, Drain-to-Source Current (A) 50 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) 1 0 5 10 15 20 25 0.1 30 0 100 VDS, Drain-to-Source Voltage (V) 200 300 400 500 VDS, Drain-to-Source Voltage (V) 600 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 2 - Typical Output Characteristics 18 100 TJ = 25 °C 16 80 14 12 60 Coss (pF) ID, Drain-to-Source Current (A) 5000 TJ = 150 °C 10 Coss Eoss 500 8 Eoss (μJ) ID, Drain-to-Source Current (A) 100 40 6 4 20 2 VDS = 27.4 V 0 50 0 5 10 15 20 VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics S16-1157-Rev. A, 13-Jun-16 25 0 0 100 200 300 VDS 400 500 600 Fig. 6 - Coss and Eoss vs. VDS Document Number: 91580 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP35N60E www.vishay.com Vishay Siliconix VDS = 480 V VDS = 300 V VDS = 120 V 20 30 ID, Drain Current (A) VGS, Gate-to-Source Voltage (V) 24 16 12 8 0 0 30 60 90 120 Qg, Total Gate Charge (nC) 150 180 Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 25 VDS, Drain-to-Source Breakdown Voltage (V) TJ = 25 °C 10 1 VGS = 0 V 0.2 0.4 0.6 0.8 1.0 1.2 VSD, Source-Drain Voltage (V) 1.4 1.6 Fig. 8 - Typical Source-Drain Diode Forward Voltage 100 Operation in this Area Limited by RDS(on) 10 Limited by RDS(on)* 150 750 725 700 675 650 625 ID = 250 μA 600 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (°C) Fig. 11 - Temperature vs. Drain-to-Source Voltage IDM Limited 100 μs 1 1 ms 10 ms 0.1 0.01 75 100 125 TC, Case Temperature (°C) 775 TJ = 150 °C 0.1 50 Fig. 10 - Maximum Drain Current vs. Case Temperature 100 ISD, Reverse Drain Current (A) 10 4 0 ID, Drain Current (A) 20 TC = 25 °C TJ = 150 °C Single Pulse 1 BVDSS Limited 10 100 1000 VDS, Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Fig. 9 - Maximum Safe Operating Area S16-1157-Rev. A, 13-Jun-16 Document Number: 91580 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP35N60E www.vishay.com Vishay Siliconix 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 0.0001 0.001 0.01 Pulse Time (s) 0.1 1 Fig. 12 - Normalized Thermal Transient Impedance, Junction-to-Case RD VDS VDS tp VGS VDD D.U.T. RG + - VDD VDS 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % IAS Fig. 16 - Unclamped Inductive Waveforms Fig. 13 - Switching Time Test Circuit VDS QG 10 V 90 % QGS 10 % VGS QGD VG td(on) td(off) tf tr Charge Fig. 14 - Switching Time Waveforms Fig. 17 - Basic Gate Charge Waveform Current regulator Same type as D.U.T. L Vary tp to obtain required IAS VDS 50 kΩ D.U.T RG 12 V + - IAS 0.2 µF 0.3 µF V DD + D.U.T. - VDS 10 V tp 0.01 Ω VGS 3 mA Fig. 15 - Unclamped Inductive Test Circuit IG ID Current sampling resistors Fig. 18 - Gate Charge Test Circuit S16-1157-Rev. A, 13-Jun-16 Document Number: 91580 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 SiHP35N60E www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 19 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91580. S16-1157-Rev. A, 13-Jun-16 Document Number: 91580 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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