96667

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Changes in accordance with NOR 5962-R016-98
98-01-07
Monica L. Poelking
B
Update boilerplate and appendix A. Editorial changes throughout. - tmh
00-04-26
Monica L. Poelking
REV
SHEET
REV
B
B
B
B
B
B
B
SHEET
15
16
17
18
19
20
21
REV STATUS
REV
B
B
B
B
B
B
B
B
B
B
B
B
B
B
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
Larry T. Gauder
STANDARD
MICROCIRCUIT
DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
CHECKED BY
Monica L. Poelking
APPROVED BY
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
Monica L. Poelking
DRAWING APPROVAL DATE
MICROCIRCUIT, DIGITAL, RADIATION
HARDENED CMOS, DUAL 4-BIT LATCH,
MONOLITHIC SILICON
95-12-18
AMSC N/A
REVISION LEVEL
B
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
1 OF
5962-96667
21
5962-E201-00
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the
Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the
PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
R
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
96667
01
V
Device
type
(see 1.2.2)
/
X
C
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
4512B
02
4512BN
Circuit function
Radiation hardened CMOS dual 4bit latch
Radiation hardened CMOS dual 4-bit
latch with neutron irradiated die
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
M
Q or V
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant,
non-JAN class level B microcircuits in accordance with MIL-PRF-38535,
appendix A
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
E
X
Descriptive designator
CDIP2-T16
CDFP4-F16
Terminals
16
16
Package style
dual-in-line package
flat package
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
2
1.3 Absolute maximum ratings. 1/ 2/ 3/
Supply voltage range (VDD) .............................................................................................................-0.5 V dc to +20 V dc
Input voltage range .........................................................................................................................-0.5 V dc to VDD + 0.5 V dc
DC input current, any one input ...................................................................................................... ±10 mA
Device dissipation per output transistor..........................................................................................100 mW
Storage temperature range (TSTG)...................................................................................................-65°C to +150°C
Lead temperature (soldering, 10 seconds)..................................................................................... +265°C
Thermal resistance, junction-to-case (θJC):
Case E .......................................................................................................................................... 24°C/W
Case X .......................................................................................................................................... 29°C/W
Thermal resistance, junction-to-ambient (θJA):
Case E .......................................................................................................................................... 73°C/W
Case X .......................................................................................................................................... 114°C/W
Junction temperature (TJ)................................................................................................................ +175°C
Maximum power dissipation at TA = +125°C (PD): 4/
Case J........................................................................................................................................... 0.68 W
Case X .......................................................................................................................................... 0.44 W
1.4 Recommended operating conditions.
Supply voltage range (VDD) ............................................................................................................. 3.0 V dc to +18 V dc
Case operating temperature range (TC).......................................................................................... -55°C to +125°C
Input voltage (VIN) ............................................................................................................................ 0 V to VDD
Output voltage (VOUT)....................................................................................................................... 0 V to VDD
Radiation features:
Total dose .................................................................................................................................. 1 x 105 Rads (Si)
Single event phenomenon (SEP) effective
linear energy threshold, no upsets or latchup (see 4.4.4.5).................................................... > 75 MEV/(cm2/mg) 5/
Dose rate upset (20 ns pulse).................................................................................................... > 5 x 108 Rads(Si)/s 5/
Dose rate latch-up ..................................................................................................................... > 2 x 108 Rads(Si)/s 5/
Dose rate survivability ............................................................................................................... > 5 x 1011 Rads(Si)/s 5/
Neutron irradiated (device type 02) .. ....................................................................................... > 1 x 1014 neutrons/cm2
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in
the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the
solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 MIL-STD-973 MIL-STD-1835 1/
2/
3/
4/
5/
Test Method Standard Microcircuits.
Configuration Management.
Interface Standard For Microcircuit Case Outlines.
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
Unless otherwise specified, all voltages are referenced to VSS.
The limits for the parameters specified herein shall apply over the full specified VCC range and case temperature range of
-55°C to +125°C unless otherwise noted.
If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is
based on θJA) at the following rate:
Case E ......................................................................................................................... 13.7 mW/°C
Case X ......................................................................................................................... 8.8 mW/°C
Guaranteed by design or process but not tested.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
3
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings (SMD's).
Standard Microcircuit Drawings.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 2.
3.2.4 Block diagram. The block diagram shall be as specified on figure 3.
3.2.5 Radiation exposure circuit. The radiation test connections shall be as specified in table III herein.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space
limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the
RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.
Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535
and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in
MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered
to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
4
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change as defined in MIL-STD-973.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 39 (see MIL-PRF-38535, appendix A).
4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be
in accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1015.
(2) TA = +125°C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for
groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein except where option 2 of
MIL-PRF-38535 permits alternate in-line control testing. Quality conformance inspection for device class M shall be in
accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be
those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
5
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions
-55°C < TC < +125°C
unless otherwise specified
Device
type
Group A
subgroups
Min
Supply current
IDD
VDD = 5 V
VIN = 0.0 V or VDD
All
5.0
2 1/
150
1, 3 1/
10.0
2 1/
300
1, 3 1/
10.0
2 1/
600
1
10.0
2
1000
All
1
25
VDD = 18 V, VIN = 0.0 V or VDD
All
3
2.0
VDD = 5 V
VO = 0.4 V
VIN = 0.0 V or VDD
All
1
0.53
2 1/
0.36
3 1/
0.64
1
1.4
2 1/
0.9
3 1/
1.6
1
3.5
2 1/
2.4
3 1/
4.2
All
VDD = 15 V
VIN = 0.0 V or VDD
All
VDD = 20 V, VIN = 0.0 V or VDD
All
M, D, L, R 2/
IOL
VDD = 10 V
VO = 0.5 V
VIN = 0.0 V or VDD
All
VDD = 15 V
VO = 1.5 V
VIN = 0.0 V or VDD
High level output
current (source)
IOH
Max
1, 3 1/
VDD = 10 V
VIN = 0.0 V or VDD
Low level output
current (sink)
Units
Limits
All
VDD = 5 V
VO = 4.6 V
VIN = 0.0 V or VDD
All
VDD = 5 V
VO = 2.5 V
VIN = 0.0 V or VDD
All
VDD = 10 V
VO = 9.5 V
VIN = 0.0 V or VDD
All
VDD = 15 V
VO = 13.5 V
VIN = 0.0 V or VDD
All
µA
mA
1
-0.53
2 1/
-0.36
3 1/
-0.64
1
-1.8
2 1/
-1.15
3 1/
-2.0
1
-1.4
2 1/
-0.9
3 1/
-1.6
1
-3.5
2 1/
-2.4
3 1/
-4.2
mA
See notes at end of table
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
6
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions
-55°C < TC < +125°C
unless otherwise specified
Device
type
Group A
subgroups
Min
Output voltage, high
Output voltage, low
Input voltage
VOH
VOL
VIL
VIH
Input leakage current,
low
Input leakage current,
high
Tri-state output leakage
Tri-state output leakage
IIL
IIH
IOZL
IOZH
VDD = 5 V, no load 1/
All
1, 2, 3
4.95
VDD = 10 V, no load 1/
1, 2, 3
9.95
VDD = 15 V, no load 3/
1, 2, 3
14.95
All
VDD = 5 V, no load 1/
Unit
Limits
Max
V
1, 2, 3
0.05
VDD = 10 V, no load 1/
1, 2, 3
0.05
VDD = 15 V, no load
1, 2, 3
0.05
1, 2, 3
1.5
VDD = 10 V
VOH > 9.0 V, VOL < 1.0 V 1/
1, 2, 3
3
VDD = 15 V
VOH > 13.5 V, VOL < 1.5 V
1, 2, 3
4
VDD = 5 V
VOH > 4.5 V, VOL < 0.5 V
All
1, 2, 3
3.5
VDD = 10 V
VOH > 9.0 V, VOL < 1.0 V 1/
1, 2, 3
7
VDD = 15 V
VOH > 13.5 V, VOL < 1.5 V
1, 2, 3
11
1
-100
VIN = VDD or GND, VDD = 20 V
2
-1000
VIN = VDD or GND, VDD = 18 V
3
-100
VDD = 5 V
VOH > 4.5 V, VOL < 0.5 V
All
All
VIN = VDD or GND, VDD = 20 V
All
VIN = VDD or GND, VDD = 20 V
V
V
nA
1
100
VIN = VDD or GND, VDD = 20 V
2
1000
VIN = VDD or GND, VDD = 18 V
3
100
1
-0.4
VIN = VDD or GND, VDD = 20 V
VOUT = 0 V
2
-12
VIN = VDD or GND, VDD = 18 V
VOUT = 0V
3
-0.4
VIN = VDD or GND, VDD = 20 V
VOUT = 0 V
All
VIN = VDD or GND, VDD = 20 V
VOUT = VDD
All
µA
1
0.4
VIN = VDD or GND, VDD = 20 V
VOUT = VDD
2
12
VIN = VDD or GND, VDD = 18 V
VOUT = VDD
3
0.4
µA
See notes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
7
TABLE I. Electrical performance characteristics - Continued.
Test
N threshold voltage
Symbol
VNTH
Conditions
-55°C < TC < +125°C
unless otherwise specified
Device
type
VDD = 10 V, ISS = -10 µA
M, D, L, R 2/
Group A
subgroups
Unit
Limits
Min
Max
All
1
-0.7
-2.8
All
1
-0.2
-2.8
N threshold voltage,
delta
∆VNTH
VDD = 10 V, ISS = -10 µA
M, D, L, R 2/
All
1
P threshold voltage
VPTH
VSS = 0.0 V, IDD = 10 µA
All
1
0.7
2.8
All
1
0.2
2.8
VSS = 0.0 V, IDD = 10 µA
M, D, L, R 2/
All
1
VDD = 2.8 V, VIN = VDD or GND
All
7
M, D, L, R 2/
P threshold voltage,
delta
∆VPTH
Functional tests
VDD = 20 V, VIN = VDD or GND
V
±1.0
±1.0
VOH >
VDD/2
VOL <
VDD/2
V
7
VDD = 18 V, VIN = VDD or GND
M, D, L, R 2/
VDD = 3.0 V, VIN = VDD or GND
M, D, L, R 2/
All
8A
All
7
All
8B
All
7
Input capacitance
CIN 1/
Any input, See 4.4.1c
All
4
7.5
pF
Transition time 4/
TTLH,
TTHL
VDD = 5.0 V, VIN = VDD or GND
All
9
200
ns
10, 11
270
9
280
10, 11
378
All
9
378
All
9
400
10, 11
540
All
9
540
All
9
360
10, 11
486
All
9
486
All
9
120
10, 11
162
All
9
162
All
9
120
10, 11
162
9
162
Propagation delay time,
Inhibit to output 4/
tPHL1,
tPLH1
VDD = 5.0 V, VIN = VCC or GND
All
M, D, L, R 2/
Propagation delay time,
"A" select to output
4/
tPHL2,
tPLH2
VDD = 5.0 V, VIN = VCC or GND
M, D, L, R 2/
Propagation delay time,
data to output
4/
tPHL3,
tPLH3
VDD = 5.0 V, VIN = VCC or GND
M, D, L, R 2/
Propagation delay time,
3-state disable 5/
tPHZ,
tPZH
VDD = 5.0 V, VIN = VCC or GND
M, D, L, R 2/
Propagation delay time,
3-state disable 5/
tPLZ,
tPZL
VDD = 5.0 V, VIN = VCC or GND
M, D, L, R 2/
All
ns
ns
ns
ns
ns
See notes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
8
TABLE I. Electrical performance characteristics - Continued.
Test
Conditions
-55°C < TC < +125°C
unless otherwise specified
Symbol
Device
type
Group A
subgroups
Min
Transition time 1/ 4/
Propagation delay time,
input to output 1/ 4/
TTLH,
TTHL
VDD = 10 V
tPHL1,
tPLH1
VDD = 10 V
All
VDD = 15 V
All
VDD = 15 V
Propagation delay time,
"A" select to output
1/ 4/
tPHL2,
tPLH2
Propagation delay time,
data to output 1/ 4/
tPHL3,
tPLH3
All
VDD = 10 V
VDD = 15 V
All
VDD = 10 V
VDD = 15 V
Propagation delay time,
3-state enable 1/5/
tPHZ,
tPZH
All
VDD = 10 V
VDD = 15 V
Propagation delay time,
3-state enable 1/ 5/
tPLZ,
tPZL
All
VDD = 10 V
VDD = 15 V
Unit
Limits
Max
9
100
9
80
9
140
9
100
9
170
9
120
9
150
9
110
9
60
9
40
9
60
9
40
ns
ns
ns
ns
ns
ns
1/ These tests are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which affect these characteristics.
2/ Devices supplied to this drawing will meet all levels M, D, L, R of irradiation. However, this device is only tested at the 'R' level. When
performing post irradiation electrical measurements for any RHA level, TA = +25°C.
3/ For accuracy, voltage is measured differentially to VDD. Limit is 0.050 V Max.
4/ CL = 50 pF, RL = 200 KΩ, Input tr, tf < 20 ns.
5/ CL = 50 pF, RL = 1 KΩ, Input tr, tf < 20 ns.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
9
Device type
01 and 02
Case outlines
E and X
Terminal number
Terminal symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
D0
D1
D2
D3
D4
D5
D6
VSS
D7
INHIBIT
A
B
C
SEL OUTPUT
3-STATE DISABLE
VDD
FIGURE 1. Terminal connections.
Select cont.
A
B
INH
C
3-STATE
DISABLE
SELECT
OUTPUT
0
0
0
0
0
D0
1
0
0
0
0
D1
0
1
0
0
0
D2
1
1
0
0
0
D3
0
0
1
0
0
D4
1
0
1
0
0
D5
0
1
1
0
0
D6
1
1
1
0
0
D7
X
X
X
1
0
0
X
X
X
X
1
High Z
1 = High logic level
2 = Low logic level
X = Irrelevant
FIGURE 2. Truth table
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
10
Figure 3. Logic diagram.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
11
4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V,
subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in
accordance with MIL-STD-883, test method 5012 (see 1.5 herein).
TABLE IIA. Electrical test requirements.
Test requirements
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Subgroups
(in accordance with
MIL-STD-883,
method 5005, table I)
Device
class M
Device
class Q
Device
class V
Interim electrical
parameters (see 4.2)
1, 7, 9
1, 7, 9
1, 7, 9
Final electrical
parameters (see 4.2)
1, 2, 3, 7, 8, 9, 10, 11
1/
1, 2, 3, 7, 8, 9,
10, 11 1/
1, 2, 3, 7, 8,
9, 10, 11 2/ 3/
Group A test
requirements (see 4.4)
1, 2, 3, 4, 7, 8, 9, 10,
11
1, 2, 3, 4, 7, 8,
9, 10, 11
1, 2, 3, 4, 7,
8, 9, 10, 11
Group C end-point electrical
parameters (see 4.4)
1, 2, 3, 7, 8, 9, 10, 11
1, 2, 3, 7, 8, 9,
10, 11
1, 2, 3, 7, 8,
9, 10, 11 3/
Group D end-point electrical
parameters (see 4.4)
1, 7, 9
1, 7, 9
1, 7, 9
Group E end-point electrical
parameters (see 4.4)
1, 7, 9
1, 7, 9
1, 7, 9
1/ PDA applies to subgroup 1 and 7.
2/ PDA applies to subgroups 1, 7, 9 and deltas.
3/ Delta limits as specified in table IIB shall be required where specified, and the delta limits shall be completed
with reference to the zero hour electrical parameters (see Table I)
Table IIB. Burn-in and operating life test Delta parameters (+25°C)
Parameter
Symbol
Delta Limits
Supply current
IDD
±1.0 µA
Output current (sink)
VDD = 5.0 V
IOL
±20%
Output current (source)
VDD = 5.0 V, VOUT = 4.6 V
IOH
±20%
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method
1005 of MIL-STD-883.
b.
TA = +125°C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
12
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of
MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein). RHA levels for device classes M, Q and V shall be as specified in MIL-PRF-38535. End-point
electrical parameters shall be as specified in table IIA herein.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883
method 1019 and as specified herein.
4.4.4.1.1 Accelerated aging test. Accelerated aging tests shall be performed on all devices requiring a RHA level greater
than 5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall be the
pre-irradiation end-point electrical parameter limit at +25°C ±5°C. Testing shall be performed at initial qualification and after
any design or process changes which may affect the RHA response of the device.
4.4.4.2 Neutron irradiation. Neutron irradiation for device 02 shall be conducted in wafer form using a neutron fluence of
14
2
approximately 1 x 10 neutrons/cm .
4.4.4.3 Dose rate induced latchup testing. Dose rate induced latchup testing shall be performed in accordance with test
method 1020 of MIL-STD-883 and as specified herein (see 1.4 herein). Tests shall be performed on devices, SEC, or approved
test structures at technology qualification and after any design or process changes which may effect the RHA capability of the
process.
4.4.4.4 Dose rate upset testing. Dose rate upset testing shall be performed in accordance with test method 1021 of MILSTD-883 and herein (see 1.4 herein).
a. Transient dose rate upset testing shall be performed at initial qualification and after any design or process changes
which may effect the RHA performance of the devices. Test 10 devices with 0 defects unless otherwise specified.
b. Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved radiation
hardness assurance plan and MIL-PRF-38535.
4.4.4.5 Single event phenomena (SEP). SEP testing shall be required on class V devices (see 1.4 herein). SEP testing shall
be performed on a technology process on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by
the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latchup
characteristics. The recommended test conditions for SEP are as follows:
a. The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive (i.e. 0° ≤
angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related effects is allowed.
b. The fluence shall be ≥ 100 errors or ≥ 10 ions/cm .
6
2
5
2
2
c. The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates which differ by at least an order of magnitude.
d. The particle range shall be ≥ 20 microns in silicon.
e. The test temperature shall be +25°C and the maximum rated operating temperature ±10°C.
f. Bias conditions shall be defined by the manufacturer for latchup measurements.
g. Test four devices with zero failures.
4.5 Methods of inspection. Methods of inspection shall be as specified as follows:
4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal.
Currents given are conventional current and positive when flowing into the referenced terminal.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
13
Table III. Irradiation test connections device types 01 and 02. 1/
Open
Ground
VDD = 10 V ± 0.5 V
14
8
1,2,3,4,5,6,7,9,10,11,
12,13,15,16
1/ Each pin except VDD and GND will have a series resistor of 47KΩ ±5%, for irradiation testing.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device
classes Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished in accordance with MIL-STD-973 using DD Form 1692,
Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering
microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0525.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43216-5000, or telephone
(614) 692-0674.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to
this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
6.7 Additional information. A copy of the following additional data shall be maintained and available from the device
manufacturer:
a. RHA upset levels.
b. Test conditions (SEP).
c. Number of upsets (SEP).
d. Number of transients (SEP).
e. Occurrence of latchup (SEP).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
14
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-96667
10. SCOPE
10.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified
Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers
approved QM plan for use in monolithic microcircuits, multichip modules (MCMs), hybrids, electronic modules, or devices
using chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes
consisting of military high reliability (device class Q) and space application (device Class V) are reflected in the Part or
Identification Number (PIN). When available a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN.
10.2 PIN. The PIN shall be as shown in the following example:
5962
R
Federal
Stock class
designator
RHA
designator
(see 10.2.1)
96667
01
V
9
A
Device
type
(see 10.2.2)
Device
class
designator
(see 10.2.3)
Die
code
Die
Det ails
(see 10.2.4)
Drawing Number
10.2.1 RHA designator. Device classes Q and V RHA identified die shall meet the MIL-PRF-38535 specified RHA levels. A
dash (-) indicates a non-RHA die.
10.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type
Generic number
Circuit function
01
4512B
Radiation Hardened, CMOS,
dual 4-bit latch
02
4512BN
Radiation Hardened, CMOS,
dual 4-bit latch, neutron
irradiated die.
10.2.3 Device class designator.
Device class
Q or V
Device requirements documentation
Certification and qualification to the die requirements of MIL-PRF-38535.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
15
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-96667
10.2.4 Die Details. The die details designation shall be a unique letter which designates the die’s physical dimensions,
bonding pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each
product and variant supplied to this appendix.
10.2.4.1 Die Physical dimensions.
Die Types
Figure number
01, 02
A-1
10.2.4.2 Die Bonding pad locations and Electrical functions.
Die Types
Figure number
01, 02
A-1
10.2.4.3 Interface Materials.
Die Types
Figure number
01, 02
A-1
10.2.4.4 Assembly related information.
01, 02
A-1
10.3 Absolute maximum ratings. See paragraph 1.3 within the body of this drawing for details.
10.4 Recommended operating conditions. See paragraph 1.4 within the body of this drawing for details.
20. APPLICABLE DOCUMENTS
20.1 Government specifications, standards, bulletin, and handbooks. Unless otherwise specified, the following
specifications, standards, bulletin, and handbook of the issue listed in that issue of the Department of Defense Index of
Specifications and Standards specified in the solicitation, form a part of this drawing to the extent specified herein.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
16
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-96667
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 - Test Methods and Procedures for Microelectronics.
HANDBOOK
DEPARTMENT OF DEFENSE
MIL-HDBK-103 - List of Standardized Military Drawings (SMD’s).
(Copies of the specification, standards, bulletin, and handbook required by manufacturers in connection with specific
acquisition functions should be obtained from the contracting activity or as directed by the contracting activity).
20.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
text of this drawing shall take precedence.
30. REQUIREMENTS
30.1 Item Requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The
modification in the QM plan shall not effect the form, fit or function as described herein.
30.2 Design, construction and physical dimensions. The design, construction and physical dimensions shall be as
specified in MIL-PRF-38535 and the manufacturer’s QM plan, for device classes Q and V and herein.
30.2.1 Die Physical dimensions. The die physical dimensions shall be as specified in 10.2.4.1 and on figure A-1.
30.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be
as specified in 10.2.4.2 and on figure A-1.
30.2.3 Interface materials. The interface materials for the die shall be as specified in 10.2.4.3. and on figure A-1.
30.2.4 Assembly related information. The assembly related information shall be as specified in 10.2.4.4. and figure A-1.
30.2.5 Truth Table. The truth table shall be as defined within paragraph 3.2.3 of the body of this document.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
17
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-96667
30.2.6 Radiation exposure circuit. The radiation exposure circuit shall be as defined within paragraph 3.2.5. of the body of
this document.
30.3 Electrical performance characteristics and post- irradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and post-irradiation parameter limits are as specified in table I of the body of this
document.
30.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing
sufficient to make the packaged die capable of meeting the electrical performance requirements in table I.
30.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a
customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN
listed in 10.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535.
30.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a
QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 60.4 herein). The certificate of
compliance submitted to DSCC-VA prior to listing as an approved source of supply for this appendix shall affirm that the
manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein.
30.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535
shall be provided with each lot of microcircuit die delivered to this drawing.
40. QUALITY ASSURANCE PROVISIONS
40.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in
accordance with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The
modifications in the QM plan shall not effect the form, fit or function as described herein.
40.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the
manufacturer’s QM plan. As a minimum it shall consist of:
a) Wafer Lot acceptance for Class V product using the criteria defined within MIL-STD-883 TM 5007.
b) 100% wafer probe (see paragraph 30.4).
c) 100% internal visual inspection to the applicable class Q or V criteria defined within MIL-STD-883 TM20 or the
alternate procedures allowed within MIL-STD-883 TM5004.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
18
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-96667
40.3 Conformance inspection.
40.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see
30.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of
packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified within paragraphs
4.4.4.1, 4.4.4.1.1, 4.4.4.2, 4.4.4.3, 4.4.4.4 and 4.4.4.5.
50. DIE CARRIER
50.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or
as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and
electrostatic protection.
60. NOTES
60.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with
MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications and
logistics purposes.
60.2 Comments. Comments on this appendix should be directed to DSCC-VA, Columbus, Ohio, 43216-5000 or telephone
(614)-692-0536.
60.3 Abbreviations, symbols and definitions. The abbreviations, symbols, and definitions used herein are defined with
MIL-PRF-38535 and MIL-STD-1331.
60.4 Sources of Supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML38535. The vendors listed within QML-38535 have submitted a certificate of compliance (see 30.6 herein) to DSCC-VA and
have agreed to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
19
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-96667
FIGURE A-1
o DIE PHYSICAL DIMENSIONS
Die Size:
Die Thickness:
1905 x 1981 microns.
20 +/-1 mils.
o DIE BONDING PAD LOCATIONS AND ELECTRICAL FUNCTIONS
NOTE: Pad numbers reflect terminal numbers when placed in Case Outlines E, X (see Figure 1).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
20
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-96667
o INTERFACE MATERIALS
Top Metallization:
Al
11.0kA - 14.0kA
Backside Metallization
None
Glassivation
Type:
Thickness
PSG
10.4kA - 15.6kA
Substrate:
Single crystal silicon
o ASSEMBLY RELATED INFORMATION
Substrate Potential:
Floating or tied to VDD.
Special assembly
instructions:
Bond pad #16 (VDD) first.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-96667
A
REVISION LEVEL
B
SHEET
21
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 00-04-26]\
Approved sources of supply for SMD 5962-96667 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962R9666701VEC
34371
CD4512BDMSR
5962R9666701VXC
34371
CD4512BKMSR
5962R9666701V9A
34371
CD4512BHSR
5962R9666702VEC
34371
CD4512BDNSR
5962R9666702VXC
34371
CD4512BKNSR
5962R9666702V9A
34371
CD4512BHNSR
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE
number
34371
Vendor name
and address
Intersil Corporation
PO Box 883
Melbourne, FL 32902-0883
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.