95823

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Corrected waveform labeling error on sheet 13. Updated boilerplate.
glg.
97-09-18
Raymond Monnin
B
Updated document to current requirements, and updated contact
information and agency address. ksr
09-07-05
Charles F. Saffle
REV
SHEET
REV
B
B
B
B
B
B
SHEET
15
16
17
18
19
20
REV STATUS
REV
B
B
B
B
B
B
B
B
B
B
B
B
B
B
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
Jeff Bowling
STANDARD
MICROCIRCUIT
DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
CHECKED BY
http://www.dscc.dla.mil
Jeff Bowling
APPROVED BY
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
Michael A. Frye
DRAWING APPROVAL DATE
96-03-20
REVISION LEVEL
B
MICROCIRCUIT, MEMORY,
DIGITAL, CMOS/SOS, RADIATION
HARDENED, 8K X 8 STATIC RAM,
MONOLITHIC SILICON
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
1 OF
5962-95823
20
5962-E360-09
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the
Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in
the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
│
│
│
Federal
stock class
designator
F
│
│
│
RHA
designator
(see 1.2.1)
01
│
│
│
Device
type
(see 1.2.2)
95823
/
\
V
│
│
│
Device
class
designator
(see 1.2.3)
Y
│
│
│
Case
outline
(see 1.2.4)
C
│
│
│
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix
A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
Generic number 1/
65647RH
Circuit function
Access time
8K X 8 Radiation hardened CMOS/SOS SRAM
50 ns
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level
as follows:
Device class
M
Q or V
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant,
non-JAN class level B microcircuits in accordance with MIL-PRF-38535,
appendix A
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
Descriptive designator
Terminals
Package style
CDIP2-T28
CDFP3-F28
28
28
Dual-in-line package
Flat pack
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
1/
Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document
and will also be listed in QML-38535 and MIL-HDBK-103 (see 6.6 herein).
STANDARD
MICROCIRCUIT DRAWING
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SIZE
5962-95823
A
REVISION LEVEL
B
SHEET
2
1.3 Absolute maximum ratings. 2/
Supply voltage range .................................................................
Input, output, or I/O voltage .......................................................
Maximum package power dissipation (PD) at TA = +125C
Case X....................................................................................
Case Y....................................................................................
Lead temperature (soldering, 10 seconds maximum) ................
Thermal resistance, junction-to-case (JC):
Case X....................................................................................
Case Y....................................................................................
Thermal resistance, junction-to-ambient (JA):
Case X....................................................................................
Case Y....................................................................................
Junction temperature (TJ) ..........................................................
Storage temperature range ........................................................
1.4 Recommended operating conditions.
Supply voltage (VDD) ..................................................................
Ground voltage (GND) ...............................................................
Input high voltage (VIH) ..............................................................
Input Low voltage (VIL) ...............................................................
Case operating temperature range (TC) .....................................
Input rise and fall time ................................................................
1.5 Radiation features.
Radiation features:
Total dose irradiation .............................................................
Dose rate upset (20 ns pulse) ................................................
Dose rate survivability ...........................................................
Single event phenomenon (SEP) effective linear energy
threshold (LET) with no upsets ............................................
Latchup ..................................................................................
Cosmic ray upset immunity .....................................................
-0.5 V to +7.0 V dc
-0.3 V dc to VDD +0.3 V dc
1.11 W 3/
0.94 W 3/
+300C
8.0C/W
7.4C/W
45.0C/W
53.4C/W
+175C
-65C to +150C
+4.5 V dc to +5.5 V dc
0.0 V dc
0.8VDD to VDD
0.0 V dc to 0.2VDD
-55C to +125C
40 ns max
> 300 KRads(Si)
11
> 1 x 10 Rads(Si)/sec 4/
> 1 x 1012 Rads(Si)/sec 4/
> 100 MeV/(cm2/mg) 4/
None 4/
< 1 x 10-10 errors/bit-day 4/ 5/
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited
in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
3/ If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is based on
JA) at the following rate: case outline X - - - 22.2 mW/C, case outline Y - - - 18.7 mW/C.
4/ Guaranteed by process or design, but not tested.
5/ Single event upset error rates are obtained using Adams 10% worst case environment under worst case conditions.
STANDARD
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A
REVISION LEVEL
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SHEET
3
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of these documents are those cited in the solicitation.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM Standard F1192-00
-
Standard Guide for the Measurement of Single Event Phenomena from
Heavy Ion Irradiation of Semiconductor Devices.
(Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor
Drive, West Conshohocken, PA 19428-2959; http://www.astm.org.)
ELECTRONICS INDUSTRIES ASSOCIATION (EIA)
JEDEC Standard EIA/JESD78
-
IC Latch-Up Test.
(Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington,
VA 22201; http://www.jedec.org.)
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute
the documents. These documents also may be available in or through libraries or other informational services.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations
unless a specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as
specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device
class M.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table(s). The truth table shall be as specified on figure 2.
3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document
revision level control and shall be made available to the preparing and acquiring activity upon request.
3.2.5 Functional tests. Functional tests used to test this device shall be maintained under document revision level control
by the manufacturer and shall be made available to the preparing or acquiring activity upon request. For device classes Q
and V alternate test patterns shall be under the control of the device manufacturer's Technology Review Board (TRB) in
accordance with MIL-PRF-38535 and shall be made available to the preparing or acquiring activity upon request.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the
full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The
electrical tests for each subgroup are defined in table I.
STANDARD
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REVISION LEVEL
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SHEET
4
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the
manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator
shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device
class M shall be in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required
in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a
QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M,
a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MILHDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of
supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of
MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or
for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be
made available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 42 (see MIL-PRF-38535, appendix A).
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance
with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM
plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures
shall be in accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be
conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be
in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance
inspection.
4.2.1 Additional criteria for device class M.
a.
Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical
parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.
b.
The test circuit shall be maintained by the manufacturer under document revision level control and shall be made
available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases,
and power dissipation, as applicable, in accordance with the intent specified in method 1015.
(1)
c.
Dynamic burn-in (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein).
Interim and final electrical test parameters shall be as specified in table IIA herein.
STANDARD
MICROCIRCUIT DRAWING
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APR 97
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5962-95823
A
REVISION LEVEL
B
SHEET
5
4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained
under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance
with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit
shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified
in method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for
groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified. Quality conformance inspection for device
class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for
device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4).
4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
Subgroups 5 and 6 of table I of method 5005 of MIL-STD-883 shall be omitted.
c.
Subgroup 4 (CIN and CI/O measurements) shall be measured only for initial qualification and after any process or
design changes which may affect input or output capacitance. Capacitance shall be measured between the
designated terminal and GND at a frequency equal or less than 1 MHz. Sample size is 5 devices with no failures,
and all input and output terminals tested.
d.
For device class M, subgroups 7, 8A, and 8B tests shall be sufficient to verify the truth table. For device classes Q
and V, subgroups 7, 8A, and 8B shall include verifying the functionality of the device.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1005 of MIL-STD883.
b.
TA = +125°C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test
temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MILPRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in
accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of
MIL-STD-883.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
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APR 97
SIZE
5962-95823
A
REVISION LEVEL
B
SHEET
6
TABLE I. Electrical performance characteristics.
Test
Symbol
High level output
voltage
Low level output
voltage
Input leakage
current
High impedance
output leakage
current
VOH
Conditions
-55C < TC < +125C
4.5 V < VDD < 5.5 V
unless otherwise specified
IIN
IOZ
M-F
VDD = 4.5 V, IOL = 8 mA
VIN = GND or VDD
M-F
VDD = 5.5 V
VIN = GND or VDD
1, 2, 3
1
IDDOP
IDDSB
IDDEN
M-F
1
VDD = 5.5 V
VIN = VOUT = GND or VDD
IDDDR
V
3/
01
0.4
3/
01
2/
1, 3
4/
E 1 = VDD , E2 = GND
01
2
1
VDD = 5.5 V, f = 2 MHz
VIN = GND or VDD
2/
-1
1
3/
3/
-10
10
-30
30
-60
60
-60
60
2
E 1 = GND, E2 = VDD
IOUT = 0 mA
01
3
1
VDD = 5.5V, IOUT = 0 mA
VIN = GND or VDD
2/
4/
1
E 1 = VDD , E2 = GND
3
01
VDD = 2.0 V, IOUT = 0 mA
VIN = GND or VDD
01
81
mA
105
2/
105
µA
100
01
2
1
mA
90
4/
M-F
4
10
1, 3
E 1 = VDD , E2 = GND
µA
10
2
1
mA
500
2/
VDD = 5.5 V, IOUT = 0 mA
VIN = GND or VDD
85
110
2
1
µA
110
1, 3
E 1 = VDD , E2 = GND
µA
95
1
M-F
Data retention
current
Max
VDD -0.4
2/
1, 2, 3
M-F
Enable supply
current 5/
Unit
Limits 1/
V
1
M-F
Standby supply
current 6/
01
2/
1, 2, 3
M-F
Operating supply
current 5/
Device
type
Min
VDD = 4.5 V, IOH = -5.0 mA
VIN = GND or VDD
VOL
Group A
subgroups
1
4
2/
mA
6
See footnotes at end of table.
STANDARD
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REVISION LEVEL
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SHEET
7
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Group A
subgroups
Conditions
-55C < TC < +125C
4.5 V < VDD < 5.5 V
unless otherwise specified
Device
type
Limits 1/
Min
Unit
Max
Input capacitance
7/
CIN
VDD = open, f = 1.0 MHz,
see 4.4.1c
4
01
12
pF
I/O capacitance
7/
CI/O
VDD = open, f = 1.0 MHz,
see 4.4.1c
4
01
12
pF
Functional tests
FT
see 4.4.1d, VDD = 4.5 V and 5.5 V,
f = 1 MHz,
VIN = GND or VDD
M-F
7,8A,8B
VDD = 4.5 V, f = 1 MHz,
VIH = 0.8VDD,
7,8A,8B
Noise immunity
functional test
FN
01
7
7/
Address access time
7
tAVAX
see figure 3, VDD = 4.5 V and
5.5 V
8/
tAVQV
see figure 3, VDD = 4.5 V
8/
Output hold from
address 7/
tAXQX
see figure 3, VDD = 4.5 V and
5.5 V
8/
Chip enable access
time
tE1LQV
see figure 3, VDD = 4.5 V
Chip enable to
output active 7/
tE1LQX
Chip enable to
output in high-Z 7/
tE1LQX
tE2HQX
Output enable
access time
tGLQV
tE2HQX
Output disable to
output in high Z 7/
tGHQZ
Output enable to
output active
7/
tGLQX
01
2/
3/
9,10,11
01
9,10,11
M-F
tE2HQV
3/
M-F
VIL = 0.2VDD
Read cycle
2/
9
ns
01
50
2/
8/
9,10,11
M-F
9
ns
3/
9,10,11
see figure 3, VDD = 4.5 V and
5.5 V 8/
50
01
0
ns
01
50
2/
ns
3/
9,10,11
01
9,10,11
0
ns
01
15
ns
see figure 3, VDD = 4.5 V
8/
9,10,11
M-F
9
see figure 3, VDD = 4.5 V and
5.5 V 8/
01
15
2/
ns
3/
9,10,11
01
9,10,11
01
15
ns
0
ns
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
B
SHEET
8
TABLE I. Electrical performance characteristics - Continued.
Test
Write cycle
Symbol
7/
Address setup time
tAVAX
see figure 3, VDD = 4.5 V
Device
type
9,10,11
9,10,11
tAVE1L
tAVE2H
tAVWL
M-F
see figure 3, VDD = 4.5 V
9
8/
tWLWH
Write recovery time
tWHAX
tE1HAX
tE2LAX
see figure 3, VDD = 4.5 V
Data to write set-up
time
tDVWH
tDVE1H
tDVE2L
see figure 3, VDD = 4.5 V
Write enable high to
output active 7/
tWHQX
see figure 3, VDD = 4.5 V and
5.5 V
8/
Data hold time
tWHDX
tE1HDX
tE2LDX
see figure 3, VDD = 4.5 V
Write enable to
output high Z 7/
tWLQZ
see figure 3, VDD = 4.5 V and
5.5 V
8/
Chip enable to end
of write
tE1LE1H
tE2HE2L
see figure 3, VDD = 4.5 V
9
8/
9
8/
9
2/
9
01
9
01
2/
9
0
30
ns
3/
01
0
01
0
2/
ns
ns
3/
01
01
10
ns
35
ns
2/
3/
9,10,11
M-F
ns
3/
9,10,11
M-F
25
ns
2/
9,10,11
8/
ns
3/
9,10,11
M-F
5
01
9,10,11
8/
01
Max
ns
9,10,11
M-F
50
Unit
3/
9,10,11
M-F
01
2/
9,10,11
M-F
tAVE1H
tAVE2L
Limits 1/
Min
8/
Write enable pulse
width
Address hold time
Group A
subgroups
Conditions
-55C < TC < +125C
4.5 V < VDD < 5.5 V
unless otherwise specified
01
40
ns
2/
3/
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95823
A
REVISION LEVEL
B
SHEET
9
TABLE I. Electrical performance characteristics - Continued.
1/ This device also receives 100% testing and group A sample inspection at +85C. Unless otherwise specified, the limit is
the same as defined at +125C.
2/ When performing postirradiation electrical measurements for any RHA level TA = +25C. Limits shown are guaranteed at
TA = +25C ±5C. The M – F in the test condition column are the postirradiation limits for the device types specified in the
device types column.
3/ Preirradiation values for RHA marked devices shall also be the postirradiation values, unless otherwise specified.
4/ Limit at +85C.
5/ For each 1MHz increase in address frequency, there is a 3mA(typical) increase in operating supply current.
6/ In order for this device to be in low power standby mode, E2 must be disabled (low).
7/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to
the limits specified in table I.
8/ AC measurements assume rise and fall times of 5 ns or less, timing reference levels of 2.0 V, input pulse levels of 0 to
VDD, and the output load = 1 TTL equivalent load and CL > 50 pF. For CL > 50 pF, access times are derated 0.15ns/pF.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95823
A
REVISION LEVEL
B
SHEET
10
Device types
All
Case outlines
X,Y
Terminal
number
Terminal
symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
DQ3
DQ4
DQ5
DQ6
DQ7
22
23
24
25
26
27
28
E1
A10
G
A11
A9
A8
E2
W
VDD
NC = no connection
FIGURE 1. Terminal connections.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95823
A
REVISION LEVEL
B
SHEET
11
Read modes
Mode
E1
E2
G
W
Outputs
Low power supply
X
L
X
X
High Z
Disabled
H
H
X
X
High Z
Enabled
L
H
H
H
High Z
Read
L
H
L
H
Data out
Write
L
H
X
L
Data in
NOTES:
1. L = logic low voltage level; H = logic high voltage level; X can be H or L.
2. High Z is high impedance state.
FIGURE 2. Truth table.
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MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
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REVISION LEVEL
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SHEET
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Read cycle 1 (see note 1)
Read cycle 2 (see note 2)
NOTES:
1. W and E2 are high, G and E1 are low.
2. W is high.
FIGURE 3. Timing waveforms.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
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DSCC FORM 2234
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REVISION LEVEL
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SHEET
13
Write cycle 1: Late write
FIGURE 3. Timing waveforms continued.
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MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43218-3990
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REVISION LEVEL
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Write cycle 2: Early write,
E1 controlled
FIGURE 3. Timing waveforms continued.
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COLUMBUS, OHIO 43218-3990
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Write cycle 3: Early write, E2 controlled
FIGURE 3. Timing waveforms continued.
STANDARD
MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
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4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein).
a.
End-point electrical parameters shall be as specified in table IIA herein.
b.
For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All
device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at
TA = +25°C ± 5°C, after exposure, to the subgroups specified in table IIA herein.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883
method 1019, condition A and as specified herein.
4.4.4.1.1 Accelerated annealing test. Accelerated annealing tests shall be performed on all devices requiring a RHA level
greater than 5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall
be the pre-irradiation end-point electrical parameter limit at 25C ±5C. Testing shall be performed at initial qualification and
after any design or process changes which may affect the RHA response of the device.
4.4.4.2 Dose rate induced latchup testing. Dose rate induced latchup testing shall be performed in accordance with test
method 1020 of MIL-STD-883 and as specified herein (see 1.4). Tests shall be performed on devices, SEC, or approved test
structures at technology qualification and after any design or process changes which may affect the RHA capability of the
process.
4.4.4.3 Dose rate upset testing. Dose rate upset testing shall be performed in accordance with method 1021 of MIL-STD883 and herein (see 1.4).
a.
Transient dose rate upset testing shall be performed at initial qualification and after any design or process changes
which may affect the RHA performance of the devices. Test 10 devices with 0 defects unless otherwise specified.
b.
Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved
radiation hardness assurance plan and MIL-PRF-38535.
4.4.4.4 Single event phenomena (SEP). SEP testing shall be required on class V devices (see 1.4 herein). SEP testing
shall be performed on a technology process on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as
approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset
or latchup characteristics. ASTM standard F1192 may be used as a guideline when performing SEP testing. The test
conditions for SEP are as follows:
a.
The ion beam angle of incidence shall be between normal to the die surface and 60 to the normal, inclusive (i.e. 0 
angle  60). No shadowing of the ion beam due to fixturing or package related effects are allowed.
b.
The fluence shall be  100 errors or  106 ions/cm2.
c.
The flux shall be between 102 and 105 ions/cm2/s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates which differ by at least an order of magnitude.
d.
The particle range shall be  20 microns in silicon.
e.
The test temperature shall be +25 C and the maximum rated operating temperature ±10 C.
f.
Bias conditions shall be defined by the manufacturer for latchup measurements.
g.
Test four devices with zero failures.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
B
SHEET
17
TABLE IIA. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ 6/ 7/
Line
no.
1/
2/
3/
4/
5/
6/
7/
Test requirements
1
Interim electrical parameters
(see 4.2)
2
Static burn-in
(method 1015)
3
Same as line 1
4
Dynamic burn-in
(method 1015)
5
Same as line 1
6
Final electrical
parameters (see 4.2)
7
Group A test requirements (see
4.4)
8
Subgroups
(in accordance with
MIL-STD-883,
TM 5005, table I)
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Device
class M
Device
class Q
Device
class V
1, 7, 9
1, 7, 9
1, 7, 9
Not
required
Not
required
Required
1*, 7*, 9 
Required
Required
Required
1*, 7*, 9

1*, 2, 3, 7*, 8A,
8B, 9, 10, 11
1*, 2, 3, 7*, 8A,
8B, 9, 10, 11
1*, 2, 3, 7*, 8A,
8B, 9, 10, 11
1, 2, 3, 4**, 7,
8A, 8B, 9, 10, 11
1, 2, 3, 4**, 7,
8A, 8B, 9, 10, 11
1, 2, 3, 4**, 7,
8A, 8B, 9, 10, 11
Group C end-point electrical
parameters
(see 4.4)
1, 2, 3, 7,
8A, 8B
1, 2, 3, 7,
8A, 8B
1, 2, 3, 7, 8A,
8B, 9, 10, 11 
9
Group D end-point electrical
parameters
(see 4.4)
1, 7, 9
1, 7, 9
1, 7, 9
10
Group E end-point electrical
parameters
(see 4.4)
1, 7, 9
1, 7, 9
1, 7, 9
Blank spaces indicate tests are not applicable.
Any or all subgroups may be combined when using high-speed testers.
Subgroups 7, 8A, and 8B functional tests shall verify the truth table.
* indicates PDA applies to subgroup 1, 7, and 9.
** see 4.4.1c.
 indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be computed with
reference to the previous interim electrical parameters (see line 1).
See 4.5.
Table IIB. Delta limits at +25C.
Test 1/
All device types
IIN
±150 nA of specified value in Table I
IOZ
±2 µA of specified value in Table I
IDDSB
±150 A of specified value in Table I
VOL
±60 mV of specified value in Table I
VOH
±150 mV of specified value in Table I
1/ The above parameter shall be recorded before and after the required
burn-in and life tests to determine the delta.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95823
A
REVISION LEVEL
B
SHEET
18
4.5 Delta measurements for device class V. Delta measurements, as specified in table IIA, shall be made and recorded
before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical
parameters to be measured, with associated delta limits are listed in table IIB. The device manufacturer may, at his option,
either perform delta measurements or within 24 hours after burn-in perform final electrical parameter tests, subgroups 1, 7,
and 9.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device
classes Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of
users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering
microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43218-3990, or telephone
(614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
CIN......................................... Input terminal capacitance.
CI/O ....................................... Output terminal capacitance.
GND ....................................... Ground zero voltage potential.
IDD......................................... Supply current.
II ............................................. Input current.
IO ........................................... Output current.
TC .......................................... Case temperature.
VDD ....................................... Positive supply voltage.
6.5.1 Timing limits. The table of timing values shows either a minimum or a maximum limit for each parameter. Input
requirements are specified from the external system point of view. For example, address setup time would be shown as a
minimum since the system must supply at least that much time (even though most devices do not require it). On the other
hand, responses from the memory are specified from the device point of view. For example, the access time would be shown
as a maximum since the device never provides data later than that time.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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REVISION LEVEL
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6.5.2 Waveforms.
Waveform
symbol
Input
Output
MUST BE
VALID
WILL BE
VALID
CHANGE FROM
H TO L
WILL CHANGE
FROM
H TO L
CHANGE FROM
L TO H
WILL CHANGE
FROM
L TO H
DON'T CARE
ANY CHANGE
PERMITTED
CHANGING
STATE
UNKNOWN
HIGH
IMPEDANCE
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in
QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and
have agreed to this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95823
A
REVISION LEVEL
B
SHEET
20
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 09-07-05
Approved sources of supply for SMD 5962-95823 are listed below for immediate acquisition only and shall be added
to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to
include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of
compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of
supply at http://www.dscc.dla.mil/Programs/Smcr/.
Standard
microcircuit
drawing PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962F9582301QXC
3/
HS1-65647RH-8
5962F9582301VXC
3/
HS1-65647RH-Q
5962F9582301QYC
3/
HS9-65647RH-8
5962F9582301VYC
3/
HS9-65647RH-Q
1/ The lead finish shown for each PIN representing a hermetic package
is the most readily available from the manufacturer listed for that part.
If the desired lead finish is not listed, contact the Vendor to determine
its availability.
2/ Caution. Do not use this number for item acquisition. Items acquired to
this number may not satisfy the performance requirements of this drawing.
3/ Not available from an approved source of supply. The last known supplier is listed below.
Vendor CAGE
number
34371
Vendor name
and address
Harris Semiconductor
P.O. Box 883
Melbourne, FL 32902-0883
The information contained herein is disseminated for convenience only
and the Government assumes no liability whatsoever for any inaccuracies
in this information bulletin.
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