REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED 95-11-29 M. A. Frye 06-11-01 15-07-02 Raymond Monnin Charles Saffle Add 20 and 15 ns parts. Add M package. Add vendor 0EU86. Redrawn with changes. Boilerplate update and part of five year review. tcr Update drawing to reflect current MIL-PRF-38535 requirements. - llb A B C REV SHEET REV C C C C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 24 25 26 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jeff Bowling STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.landandmaritime.dla.mil CHECKED BY Jeff Bowling APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A Michael A. Frye DRAWING APPROVAL DATE 95-11-29 REVISION LEVEL C MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 256K X 4 STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 5962-91612 1 OF 26 5962-E357-15 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91612 Federal stock class designator \ RHA designator (see 1.2.1) 01 M X A Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type 01 02 03 04 05 06 07 08 09 10 Generic number 1/ Circuit function 84256LPS45 84256CS45 84256LPS35 84256CS35 84256LPS25 84256CS25 84256LPS20 84256CS20 MT5C1005 MT5C1005 256K x 4 SRAM 256K x 4 SRAM 256K x 4 SRAM 256K x 4 SRAM 256K x 4 SRAM 256K x 4 SRAM 256K x 4 SRAM 256K x 4 SRAM 256K x 4 SRAM 256K x 4 SRAM Data Retention Access time Yes No Yes No Yes No Yes No Yes No 45 ns 45 ns 35 ns 35 ns 25 ns 25 ns 20 ns 20 ns 15 ns 15 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter X Y Z U T M Descriptive designator See figure 1 See figure 1 CDCC1-N28 CDFP1-F32 See figure 1 See figure 1 Terminals Package style 28 28 28 32 32 32 dual-in-line SOJ package dual leadless chip carrier flat pack rectangular leadless chip carrier SOJ pckage ____ 1/ Generic numbers are also listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103 and QML-38535 (see 6.6.2 herein). STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 2 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range to (VCC) .................................................... -0.5 V dc to +7.0 V dc DC input voltage range(VIN) ...................................................... -0.5 V dc to VCC +0.5 V dc 3/ DC output voltage range (VOUT) ................................................. -0.5 V dc to VCC +0.5 V dc 3/ Storage temperature range ........................................................ -65C to +150C Maximum power dissipation (PD) ............................................... 1.0 W Lead temperature (soldering, 10 seconds) ................................ +260C Thermal resistance, junction-to-case (θJC): Case X ....................................................................................... 15C/W 4/ Cases Y and T ........................................................................... 18C/W 4/ Cases Z and U ........................................................................... See MIL-STD-1835 Output voltage applied in high Z state ........................................ -0.5 V dc to VCC +0.5 V dc Maximum power dissipation, (PD) .............................................. 1.0 W Maximum junction temperature (TJ) ........................................... +150C 5/ 1.4 Recommended operating conditions. Supply voltage range (VCC) ........................................................ +4.5 V dc minimum to +5.5 V dc maximum Supply voltage range (VSS) ........................................................ 0.0 V dc High level input voltage range (VIH )........................................... 2.2 V dc to VCC + 0.5 V dc Low level input voltage range (VIL ) ............................................ -0.5 V dc to 0.8 V dc Case operating temperature range (TC) ..................................... -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) ________ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ All voltages referenced to VSS (VSS = ground) unless otherwise specified. 3/ Negative undershoots to a minimum of -3.0 V are allowed with a maximum of 20 ns pulse width. 4/ When the thermal resistance for this case is specified in MIL-STD-1835, that value shall supersede the value indicated herein. 5/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 3 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http://www.astm.org.) JEDEC – SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD 78 - IC Latch-Up Test. (Copies of these documents are available online at http://www.jedec.org or from JEDEC – Solid State Technology Association, 3103 North 10th Street, Suite 240-S, Arlington, VA 22201-2107.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Functional tests. Various functional tests used to test this device are contained in the appendix. If the test patterns cannot be implemented due to test equipment limitations, alternate test patterns to accomplish the same results shall be allowed. For device class M, alternate test patterns shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity upon request. For device classes Q and V alternate test patterns shall be under the control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL- PRF -38535 and shall be made available to the preparing or acquiring activity upon request. 3.2.5 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL- PRF -38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as provided by MIL- PRF -38535 for classes Q and V. Samples may be pulled any time after seal. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 4 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime’s agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 041 (see MIL-PRF-38535, appendix A). STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 5 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C VSS = 0 V; 4.5 V ≤ VCC ≤ 5.5 V unless otherwise specified Group A subgroups Device type Limits Min Unit Max High level input current IIH VCC = 5.5 V, VIN = 5.5 V 1, 2, 3 All 10 µA Low level input current IIL VCC = 5.5 V, VIN = 0.0 V 1, 2, 3 All High impedance output leakage current IOZH VCC = 5.5 V, VO = 5.5 V VIL = 0.0 V, VIH = 5.0 V VIH ≤ OE ≤ VCC 1, 2, 3 All IOZL VCC = 5.5 V, VO = 5.5 V VIL = 0.0 V, VIH = 5.0 V VIH ≤ OE ≤ VCC Output high voltage VOH IOH = -4.0 mA, VCC = 4.5 V VIH = 2.2 V, VIL = 0.8 V 1, 2, 3 All Output low voltage VOL IOL = 8.0 mA, VCC = 4.5 V VIH = 2.2 V, VIL = 0.8 V 1, 2, 3 All 0.4 V Operating supply current ICC1 VCC = 5.5 V, CE, WE = VIL max 1, 2, 3 All 180 mA Standby supply current TTL ICC2 VCC = 5.5 V, CE VCC - 0.2 V, VIN = VCC - 0.2 V 1, 2, 3 01-06 20 mA 07-10 25 Standby supply current CMOS ICC3 VCC = 5.5 V, CE VCC - 0.2 V, VIN = VCC - 0.2 V or ≤ 0.2 V 1, 2, 3 01,03,05, 07,09 2 02,04,06, 08,10 5 1, 2, 3 01,03,05, 07,09 750 µA 1, 2, 3 01,03,05, 07,09 2.0 V -10 µA 10 µA -10 VCC = 2.0 V, CE VCC - 0.2 V, VIN VCC - 0.2 V or ≤ 0.2 V 2.4 V mA Data retention current ICC4 Data retention voltage VDR Input capacitance 1/ CIN VIN = 0 V, f = 1.0 MHz TC = + 25°C, see 4.4.1e 4 All 12.0 pF Output capacitance 1/ COUT VOUT = 0 V, f = 1.0 MHz TC = + 25°C, see 4.4.1e 4 All 14.0 pF 7, 8A, 8B All Functional tests 2/ See 4.4.1c See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 6 TABLE I. Electrical performance characteristics – Continued. Test Read cycle time Address access time Chip enable access time Output enable to output valid Symbol Conditions Group A subgroups -55C TC +125C VSS = 0 V; 4.5 V ≤ VCC ≤ 5.5 V unless otherwise specified tAVAV 9, 10, 11 tAVQV 9, 10, 11 tELQV 9, 10, 11 tOLQV 9, 10, 11 Device type Limits Min 01,02 45 03,04 35 05,06 25 07,08 20 09,10 15 Unit Max ns 01,02 45 03,04 35 05,06 25 07,08 20 09,10 15 01,02 45 03,04 35 05,06 25 07,08 20 09,10 15 01,02 25 03,04 20 05,06 10 07,08 8 09,10 6 ns ns ns Output hold after address change tAVQX 9, 10, 11 All 3 ns Chip enable to 1/ 5/ output in low Z tELQX 9, 10, 11 All 3 ns Chip disable to output in high Z 1/ 5/ tEHQZ 9, 10, 11 01,02 25 03,04 20 05,06 12 07,08 10 09,10 6 ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 7 TABLE I. Electrical performance characteristics – Continued. Test Output enable 1/ 5/ to output in low Z Output disable to output in high Z 1/ 5/ Write cycle time Symbol Conditions 3/ 4/ Group A subgroups -55C TC +125C VSS = 0 V; 4.5 V ≤ VCC ≤ 5.5 V unless otherwise specified Device type Limits Min Unit Max tOLQX 9, 10, 11 All tOHQZ 9, 10, 11 01,02 25 03,04 20 05,06 10 07,08 8 09,10 5 tAVAV 9, 10, 11 0 01,02 45 03,04 35 05,06 25 07,08 20 09,10 15 ns ns ns Address setup to beginning of write tAVWL tAVEL 9, 10, 11 All 0 ns Data hold after end of write tWHDX tEHDX 9, 10, 11 All 0 ns Chip enable to end of write tELWH tELEH 9, 10, 11 01,02 35 ns 03,04 30 05,06 20 07,08 15 09,10 12 01,02 35 03,04 30 05,06 20 07,08 15 09,10 12 01,02 35 03,04 30 05,06 20 07,08 15 09,10 12 Write pulse width Address setup to end of write tWLWH tWLEH 9, 10, 11 tAVWH tAVEH 9, 10, 11 ns ns See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 8 TABLE I. Electrical performance characteristics – Continued. Test Symbol Conditions 3/ 4/ Group A subgroups -55C TC +125C VSS = 0 V; 4.5 V ≤ VCC ≤ 5.5 V unless otherwise specified Device type Limits Min Unit Max Address hold after end of write tWHAX tEHAX 9, 10, 11 All 0 ns Data setup to end of write tDVWH tDVEH 9, 10, 11 01, 02 25 ns 03, 04 20 05, 06 15 07, 08 12 09, 10 7 Write enable to output disable 1/ 5/ tWLQZ 9, 10, 11 01, 02 20 03, 04 15 05, 06 10 07, 08 8 09, 10 7 ns Output active after end of write 1/ 5/ tWHQX 9, 10, 11 All 3 ns Retention time 1/ tCDR 9, 10, 11 All 0 ns tR 9, 10, 11 01, 02 45 ns 03, 04 35 05, 06 25 07, 08 20 09, 10 15 Operation recovery time 1/ 1/ 2/ 3/ 4/ 5/ This parameter is tested initially and after any design or process change which could affect this parameter, and therefore shall be guaranteed to the limits specified in table I. Functional tests shall include the test table and other test patterns used for fault detection as approved by the qualifying activity. Outputs are measured at VOL < 1.5 V, VOH > 1.5 V. For timing waveforms see figure 4 and for output load circuits, see figure 5. AC measurements assume transition time 5 ns, input levels are from ground to 3.0 V, and output load C L 30 pF except as noted on figure 5. Timing reference levels are 1.5 V. Transition is measured ±500 mV from steady state voltage. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 9 Case X Millimeters Inches Symbol Min Max Min Max A --- 3.94 --- .155 b 0.41 0.51 .016 .020 b1 1.14 1.40 .045 .055 c 0.23 0.30 .009 .012 D --- 35.92 --- 1.414 E 9.83 10.23 .387 .403 E1 10.16 10.67 .400 .420 e .100 BSC L 3.18 4.45 .125 .175 L1 4.19 --- .165 --- Q 1.02 1.52 .040 .060 S 1.02 2.54 .040 .100 S1 0.13 --- .005 --- S2 0.13 --- .005 --- N Note: 2.54 BSC 28 28 The US government preferred system of measurement is the metric SI system. However, since this item was originally designed using inch-pound units of measurement in the event of conflict between the metric and inchpound units, the inch-pound units shall take precedence. FIGURE 1. Case outlines. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 10 Case Y Millimeters Inches Symbol Min Max Min Max A 2.77 3.94 .105 .155 A1 2.03 4.67 .080 .180 B 0.41 REF .016 REF B1 0.76R TYP .030R TYP B2 0.64 .889 .025 .035 D 18.08 18.49 .712 .728 E 10.92 11.17 .430 .440 E1 Note: 11.68 .460 E2 9.91 BSC .390 BSC e 1.27 BSC .050 BSC S 0.88 REF .035 REF N 28 28 The US government preferred system of measurement is the metric SI system. However, since this item was originally designed using inch-pound units of measurement in the event of conflict between the metric and inchpound units, the inch-pound units shall take precedence. FIGURE 1. Case outlines - continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 11 Case T Millimeters Inches Symbol Min Max Min Max A 1.78 2.36 .070 .093 D 11.28 11.58 .444 .456 D1 7.62 BSC .300 BSC e 1.27 BSC .050 BSC E E1 Note: 18.85 19.25 .742 10.16 BSC .758 .400 BSC L 1.14 1.40 .045 .055 L1 2.159 2.41 .085 .095 The US government preferred system of measurement is the metric SI system. However, since this item was originally designed using inch-pound units of measurement in the event of conflict between the metric and inchpound units, the inch-pound units shall take precedence. FIGURE 1. Case outlines - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 12 Case M Millimeters Inches Symbol Note: Min Max Min Max A 3.35 3.66 .132 .144 A2 0.66 0.91 0.026 .036 b 0.38 0.48 .015 .019 R 0.76 1.02 .030 .040 D 20.62 21.03 .812 .828 D1 18.80 19.30 .740 .760 E 10.29 10.54 .405 .415 E1 11.05 11.30 .435 .445 E2 9.14 9.85 .360 .380 e 1.27 BSC .050 BSC N 32 --- The US government preferred system of measurement is the metric SI system. However, since this item was originally designed using inch-pound units of measurement in the event of conflict between the metric and inchpound units, the inch-pound units shall take precedence. FIGURE 1. Case outlines - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 13 Device types All Case outlines X, Y, Z Terminal number U, M T Terminal symbol 1 A0 NC NC 2 A1 A0 A7 3 A2 A1 A8 4 A3 A2 A9 5 A4 A3 A10 6 A5 A4 A11 7 A6 A5 A12 8 A7 A6 A13 9 A8 A7 A14 10 A9 A8 A15 11 A10 A9 A16 12 CE A10 A17 13 OE NC CE 14 VSS CE NC 15 WE OE 16 I/O0 VSS OE VSS 17 I/O1 WE WE 18 I/O2 I/O0 I/O0 19 I/O3 I/O1 I/O1 20 NC I/O2 I/O2 21 A11 I/O3 I/O3 22 A12 NC NC 23 A13 A11 NC 24 A14 NC NC 25 A15 A12 A0 26 A16 A13 A1 27 A17 A14 A3 28 VCC A15 A4 29 ------ A16 A2 30 ------ NC A5 31 ------ A17 A6 32 ------ VCC VCC NC = No Connection FIGURE 2. Terminal Connections. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 14 Mode CE WE OE I/O Standby (ICC3) ≥ VCC – 0.2 V X X High Z Standby (ICC2) H X X High Z Read L H L DOUT Write L L X DIN Read L H H High Z H = logic "1" state, L = logic "0" state. X = logic "don't care" state, and Z = high impedance state. FIGURE 3. Truth table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 15 NOTES: 1. 2. 3. Use these output load circuits or equivalent for testing. Capacitance includes scope and jig. Minimum of 5 pF for tEHQZ, tOHQZ, tELQX, tOLQX, and tWHQX. AC Test Conditions Input pulse levels GND to 3.0 V Input rise and fall times (tr, tf) 5 ns Input timing reference levels 1.5 V Output reference levels 1.5 V FIGURE 4. Output load circuits and test conditions. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 16 NOTES: 1. WE is high for read cycle. 2. Device is continuously selected. CE = VIL. 3. OE = VIL. 4. Address valid prior to or coincident with CE transition low. FIGURE 4. Timing waveform diagrams. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 17 NOTE 2 NOTE 2 NOTES: 1. 2. A write occurs during the overlap of a low CE and a low WE. A write begins at the latest transition of CE going low and WE going low. A write ends at the earliest transition of CE going high and WE going high. During a WE controlled write cycle, write pulse low is tDVWH + tWLQZ to allow the I/O drivers to turn off and data to be placed on the bus for the required tDW. If OE is high during the WE controlled write cycle this requirement does not apply and the write pulse can be as short as the specified tWP. During this period, I/O pins are in the output state, therefore input signals of opposite phase must not be applied. FIGURE 4. Timing waveform diagrams - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 18 Low VCC data retention waveforms (see note) NOTES: 1. For tCDR and tR: CE VCC - 0.2 V, VIN VCC -2.0 V or VIN 0.2 V. FIGURE 4. Timing waveform diagrams - Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 19 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein. b. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table IIA herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections, and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 20 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. Subgroups 5 and 6 in table I of method 5005 of MIL-STD-883 shall be omitted. c. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. TABLE II. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ 6/ 7/ Test requirements Interim electrical parameters (see 4.2) Static burn-in I and II (method 1015 of MIL-STD-883) Interim electrical parameters (see 4.2) Dynamic burn-in (method 1015 of MIL-STD-883) Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) Subgroups (in accordance with MIL-STD-883, method 5005, table I) Device class M Subgroups (in accordance with MIL-PRF-38535, table III) Not required Required Device class Q 1, 7, 9 Device class V 1, 7, 9 Not required Not required 1, 7, 9 1, 7, 9 Required Required 1, 7, 9 1, 7, 9 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 Group A test requirements (see 4.4) Group C end-point electrical parameters (see 4.4) 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 2, 3, 7, 8A, 8B 1, 2, 3, 7, 8A, 8B Group D end-point electrical parameters (see 4.4) Group E end-point electrical parameters (see 4.4) 2, 3, 8A, 8B 2, 3, 8A, 8B 1, 2, 3, 7, 8A, 8B, 9, 10, 11 2, 3, 8A, 8B 1, 7, 9 1, 7, 9 1, 7, 9 1/ 2/ 3/ 4/ 5/ 6/ Blank spaces indicate tests are not applicable. Any or all subgroups may be combined when using high-speed testers. Subgroups 7 and 8 functional tests shall verify the truth table. * indicates PDA applies to subgroup 1 and 7. ** see 4.4.1e. Δ indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be computed with reference to the previous interim electrical parameters (see line 1). 7/ See 4.4.1d. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 21 d. O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may affect the performance of the device. For device class M, procedures and circuits shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity upon request. For device classes Q and V, the procedures and circuits shall be under the control of the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or acquiring activity upon request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be considered destructive. Information contained in JESD 78 may be used for reference. e. Subgroup 4 (CIN and COUT measurements) shall be measured only for initial qualification and after any process or design changes which may affect input or output capacitance. Capacitance shall be measured between the designated terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures, and all input and output terminals tested. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. Delta limits shall apply to group C inspection and shall consist of tests specified in table IIB herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. b. TA = +125C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25C 5C, after exposure, to the subgroups specified in table II herein. 4.5 Delta measurements for device class V. Delta measurements, as specified in table IIA, shall be made and recorded before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical parameters to be measured, with associated delta limits are listed in table IIB. The device manufacturer may, at his option, either perform delta measurements or within 24 hours after burn-in perform final electrical parameter tests, subgroups 1, 7, and 9. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 22 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108. 6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0540. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331, and as follows: CIN, COUT ................................. Input and bidirectional output, terminal-to-GND capacitance. GND ....................................... Ground zero voltage potential. ICC .......................................... Supply current. IIL ............................................ Input current low. IIH ........................................... Input current high. TC ........................................... Case temperature. TA .......................................... Ambient temperature. VCC ......................................... Positive supply voltage. VIC .......................................... Positive input clamp voltage. O/V ......................................... Latch-up over-voltage. O/I .......................................... Latch-up over-current. 6.5.1 Timing parameter abbreviations. All timing abbreviations use lower case characters with upper case character subscripts. The initial character is always "t" and is followed by four descriptors. These characters specify two signal points arranged in a "from-to" sequence that define a timing interval. The two descriptors for each signal specify the signal name and the signal transitions. Thus the format is: t Signal name from which interval is derived X X _ Signal name to which interval is defined _ Transition direction for second signal DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 X _ Transition direction for first signal STANDARD MICROCIRCUIT DRAWING X _ SIZE 5962-91612 A REVISION LEVEL C SHEET 23 a. Signal definitions: A = Address D = Data in Q = Data out W = Write enable E = Chip enable O = Output enable b. Transition definitions: H = Transition to high L = Transition to low V = Transition to valid X = Transition to invalid or don't care Z = Transition to off (high impedance) 6.5.2 Timing limits. The table of timing values shows either a minimum or a maximum limit for each parameter. Input requirements are specified from the external system point of view. For example, address setup time would be shown as a minimum since the system must supply at least that much time (even though most devices do not require it). On the other hand, responses from the memory are specified from the device point of view. For example, the access time would be shown as a maximum since the device never provides data later than that time. 6.5.3 Waveforms. WAVEFORM SYMBOL INPUT OUTPUT MUST BE VALID WILL BE VALID CHANGE FROM H TO L WILL CHANGE FROM H TO L CHANGE FROM L TO H WILL CHANGE FROM L TO H DON'T CARE ANY CHANGE PERMITTED CHANGING STATE UNKNOWN HIGH IMPEDANCE 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in MIL-HDBK-103 and QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DLA Land and Maritime-VA. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 24 APPENDIX A Appendix A forms a part of SMD 5962-91612 FUNCTIONAL ALGORITHMS A.1 SCOPE A.1.1 Scope. Functional algorithms are test patterns which define the exact sequence of events used to verify proper operation of a random access memory (RAM). Each algorithm serves a specific purpose for the testing of the device. It is understood that all manufacturers do not have the same test equipment; therefore, it becomes the responsibility of each manufacturer to guarantee that the test patterns described herein are followed as closely as possible, or equivalent patterns be used that serve the same purpose. Each manufacturer should demonstrate that this condition will be met. Algorithms shall be applied to the device in a topologically pure fashion. This appendix is a mandatory part of the specification. The information contained herein is intended for compliance. A.2 APPLICABLE DOCUMENTS. This section is not applicable to this appendix. A.3 ALGORITHMS A.3.1 Algorithm A (pattern 1). A.3.1.1 Checkerboard, checkerboard-bar. Step 1. Step 2. Step 3. Step 4. Load memory with a checkerboard data pattern by incrementing from location 0 to maximum. Read memory, verifying the output checkerboard pattern by incrementing from location 0 to maximum. Load memory with a checkerboard-bar pattern by incrementing from location 0 to maximum. Read memory, verifying the output checkerboard-bar pattern by incrementing from location 0 to maximum. A.3.2 Algorithm B (pattern 2). A.3.2.1 March. Step 1. Step 2. Step 3. Step 4. Step 5. Step 6. Step 7. Step 8. Step 9. Step 10. Step 11. Step 12. Step 13. Step 14. Step 15. Step 16. Step 17. Step 18. Load memory with background data, incrementing from minimum to maximum address locations (All "0's"). Read data in location 0. Write complement data to location 0. Read complement data in location 0. Repeat steps 2 through 4 incrementing X-fast sequentially, for each location in the array. Read complement data in maximum address location. Write data to maximum address location. Read data in maximum address location. Repeat steps 6 through 8 decrementing X-fast sequentially for, each location in the array. Read data in location 0. Write complement data to location 0. Read complement data in location 0. Repeat steps 10 through 12 decrementing X-fast sequentially for each location in the array. Read complement data in maximum address location. Write data to maximum address location. Read data in maximum address location. Repeat steps 14 through 16 incrementing X-fast sequentially for each location in the array. Read background data from memory, decrementing X-fast from maximum to minimum address locations. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 25 APPENDIX A - Continued. Appendix A forms a part of SMD 5962-91612 A.3.3 Algorithm C (pattern 3). A.3.2.1 XY March. Step 1. Step 2. Step 3. Step 4. Step 5. Step 6. Step 7. Step 8. Step 9. Step 10. Step 11. Step 12. Step 13. Step 14. Step 15. Step 16. Step 17. Step 18. Load memory with background data, incrementing from minimum to maximum address locations (All "0's"). Read data in location 0. Write complement data to location 0. Read complement data in location 0. Repeat steps 2 through 4 incrementing Y-fast sequentially, for each location in the array. Read complement data in maximum address location. Write data to maximum address location. Read data in maximum address location. Repeat steps 6 through 8 decrementing X-fast sequentially for each location in the array. Read data in location 0. Write complement data to location 0. Read complement data in location 0. Repeat steps 10 through 12 decrementing Y-fast sequentially for each location in the array. Read complement data in maximum address location. Write data to maximum address location. Read data in maximum address location. Repeat steps 14 through 16 incrementing X-fast sequentially for each location in the array. Read background data from memory, decrementing Y-fast from maximum to minimum address locations. A.3.4 Algorithm D (pattern 4). A.3.4.1 CEDES - CE deselect checkerboard, checkerboard-bar. Step 1. Step 2. Step 3. Step 4. Step 5. Step 6. Load memory with a checkerboard data pattern by incrementing from location 0 to maximum. Deselect device, attempt to load memory with checkerboard-bar data pattern by incrementing from location 0 to maximum. Read memory, verifying the output checkerboard pattern by incrementing from location 0 to maximum. Load memory with a checkerboard-bar pattern by incrementing from location 0 to maximum. Deselect device, attempt to load memory with checkerboard data pattern by incrementing from location 0 to maximum. Read memory, verifying the output checkerboard-bar pattern by incrementing from location 0 to maximum. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91612 A REVISION LEVEL C SHEET 26 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 15-07-02 Approved sources of supply for SMD 5962-91612 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number 5962-9161201MTA 3DTT2 3/ P4C1026L-45L32MB EDI84256LPS45L32B 5962-9161201MUA 3DTT2 3/ P4C1026L-45FSMB EDI84256LPS45F32B 5962-9161201MXA 3DTT2 3/ P4C1026L-45CMB EDI84256LPS45TB 5962-9161201MYA 3/ EDI84256LPS45NB 5962-9161201MZA 3/ EDI84256LPS45LB 5962-9161202MTA 3DTT2 3/ P4C1026-45L32MB EDI84256CS45L32B 5962-9161202MUA 3DTT2 3/ P4C1026-45FSMB EDI84256CS45F32B 5962-9161202MXA 3DTT2 3/ P4C1026-45CMB EDI84256CS45TB 5962-9161202MYA 3/ EDI84256CS45NB 5962-9161202MZA 3/ EDI84256CS45LB 5962-9161203MTA 3DTT2 3/ P4C1026L-35L32MB EDI84256LPS35L32B 5962-9161203MUA 3DTT2 3/ P4C1026L-35FSMB EDI84256LPS35F32B 5962-9161203MXA 3DTT2 3/ P4C1026L-35CMB EDI84256LPS35TB 5962-9161203MYA 3/ EDI84256LPS35NB 5962-9161203MZA 3/ EDI84256LPS35LB 5962-9161204MTA 3DTT2 3/ P4C1026-35L32MB EDI84256CS35L32B 5962-9161204MUA 3DTT2 3/ P4C1026-35FSMB EDI84256CS35F32B 5962-9161204MXA 3DTT2 3/ P4C1026-35CMB EDI84256CS35TB 5962-9161204MYA 3/ EDI84256CS35NB 5962-9161204MZA 3/ EDI84256CS35LB See footnotes at end of list. 1 of 3 Vendor similar PIN 2/ STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued DATE: 15-07-02 Standard microcircuit drawing PIN 1/ Vendor CAGE number 5962-9161205MTA 3DTT2 3/ P4C1026L-25L32MB EDI84256LPS25LF32B 5962-9161205MUA 3DTT2 3/ P4C1026L-25FSMB EDI84256LPS25F32B 5962-9161205MXA 3DTT2 3/ P4C1026L-25CM EDI84256LPS25TB 5962-9161205MYA 3/ EDI84256LPS25NB 5962-9161205MZA 3/ EDI84256LPS25LB 5962-9161206MTA 3DTT2 3/ P4C1026-25L32MB EDI84256CS25L32B 5962-9161206MUA 3DTT2 3/ P4C1026-25FSMB EDI84256CS25F32B 5962-9161206MXA 57300 3/ MT5C1005C-25/883C EDI84256CS25TB 5962-9161206MYA 3/ EDI84256CS25NB 5962-9161206MZA 3/ EDI84256CS25LB 5962-9161207MMA 3/ MT5C1005DCJ-20L/883C 5962-9161207MTA 3DTT2 3/ P4C1026L-20L32MB EDI84256LPS20L32B 5962-9161207MUA 3DTT2 0EU86 P4C1026L-20FSMB MT5C1005F-20L/883C 5962-9161207MXA 3DTT2 3/ 0EU86 P4C1026L-20CMB EDI84256LPS20TB MT5C1005C-20L/883C 5962-9161207MYA 3/ EDI84256LPS20NB 5962-9161207MZA 3/ EDI84256LPS20LB 5962-9161208MMA 3/ MT5C1005DCJ-20/883C 5962-9161208MTA 3DTT2 3/ P4C1026-20L32MB EDI84256CS20L32B 5962-9161208MUA 3DTT2 3/ P4C1026-20FSMB MT5C1005F-20/883C 5962-9161208MXA 3DTT2 57300 3/ P4C1026-20CMB MT5C1005C-20/883C EDI84256CS20TB 5962-9161208MYA 3/ EDI84256CS20NB 5962-9161208MZA 3/ EDI84256CS20LB 2 of 3 Vendor similar PIN 2/ STANDARD MICROCIRCUIT DRAWING BULLETIN – Continued DATE: 15-07-02 Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-9161209MMA 3/ 5962-9161209MTA 3DTT2 P4C1026L-15L32MB 5962-9161209MUA 3DTT2 3/ P4C1026L-15FSMB MT5C1005F-15L/883C 5962-9161209MXA 3DTT2 57300 P4C1026L-15CMB MT5C1005C-15L/883C 5962-9161210MMA 3/ 5962-9161210MTA 3DTT2 P4C1026-15L32MB 5962-9161210MUA 3DTT2 3/ P4C1026-15FSMB MT5C1005F-15/883C 5962-9161210MXA 3DTT2 57300 P4C1026-15CMB MT5C1005C-15/883C MT5C1005DCJ-15L/883C MT5C1005DCJ-15/883C 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source of supply. Vendor CAGE number Vendor name and address 3DTT2 Pyramid Semiconductor Corporation 1249 Reamwood Avenue Sunnyvale, CA 94089 57300 Micross Components 7725 N. Orange Blossom Trail Orlando, FL 32810-2696 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin. 3 of 3