95781

REVISIONS
LTR
DESCRIPTION
A
DATE (YR-MO-DA)
APPROVED
98-06-12
Raymond L. Monnin
04-02-26
Thomas M. Hess
14-10-25
Thomas M. Hess
Changes made in accordance with NOR 5962-R114-98
Incorporate revision A. Update boilerplate to MIL-PRF-38535 requirements.
Editorial changes throughout. – LTG
Update radiation features in section 1.5 and SEP table IB. Update boilerplate
paragraphs to MIL-PRF-38535. Update source of supply. - jw c
B
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PMIC N/A
PREPARED BY
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
Thanh V. Nguyen
STANDARD
MICROCIRCUIT
DRAWING
CHECKED BY
Thanh V. Nguyen
APPROVED BY
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
Monica L. Poelking
DRAWING APPROVAL DATE
MICROCIRCUIT, DIGITAL, RADIATION
HARDENED, HIGH SPEED CMOS, QUAD 2-INPUT
OR GATE, MONOLITHIC SILICON
95-09-14
AMSC N/A
REVISION LEVEL
C
SIZE
CAGE CODE
A
67268
5962-95781
SHEET 1 OF 22
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E139-14
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part
or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
R
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
95781
01
V
X
C
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
Circuit function
HCS32
Radiation hardened, SOS, high speed
CMOS, quad 2-input OR gate
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
Device requirements documentation
M
Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Q or V
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
C
X
Descriptive designator
Terminals
CDIP2-T14
CDFP3-F14
14
14
Package style
Dual-in-line
Flat pack
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
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REVISION LEVEL
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SHEET
2
1.3 Absolute maximum ratings. 1/ 2/ 3/
Supply voltage range (VCC) ...................................................................................................
DC input voltage range (VIN) .................................................................................................
DC output voltage range (VOUT)............................................................................................
DC input current, any one input (IIN)....................................................................................
DC output current, any one output (IOUT) ............................................................................
Storage temperature range (TSTG) .......................................................................................
Lead temperature (soldering, 10 seconds) .......................................................................
Thermal resistance, junction-to-case (θJC):
Case C..................................................................................................................................
Case X ..................................................................................................................................
Thermal resistance, junction-to-ambient (θJA):
Case C..................................................................................................................................
Case X ..................................................................................................................................
Junction temperature (TJ) .....................................................................................................
Maximum power dissipation at TA = +125°C (PD): 4/
Case C..................................................................................................................................
Case X ..................................................................................................................................
-0.5 V dc to +7.0 V dc
-0.5 V dc to VCC + 0.5 V dc
-0.5 V dc to VCC + 0.5 V dc
±10 mA
±25 mA
-65°C to +150°C
+265°C
24°C/W
30°C/W
74°C/W
116°C/W
+175°C
0.68 W
0.43 W
1.4 Recommended operating conditions. 2/ 3/
Supply voltage range (VCC) ...................................................................................................
Case operating temperature range (TC).............................................................................
Input voltage (VIN) ...................................................................................................................
Output voltage (VOUT) .............................................................................................................
Maximum low level input voltage (VIL) .................................................................................
Minimum high level input voltage (VIH)................................................................................
Maximum input rise and fall time at VCC = 4.5 V (tr, tf)......................................................
1.5 Radiation features. 5/
+4.5 V dc to +5.5 V dc
-55°C to +125°C
0 V to VCC
0 V to VCC
30% of VCC
70% of VCC
100 ns/V
Maximum total dose available (dose rate = 50 – 300 rads (Si)/s) .......................... 200 krads(Si)
Single event phenomenon (SEP):
No SEL occurs at effective LET (see 4.4.4.4)..........................................................≤ 100 MeV/(mg/cm 2)
No SEU occurs at effective LET (see 4.4.4.4) .........................................................≤ 100 MeV/(mg/cm 2)
1/
2/
3/
4/
5/
6/
7/
6/ 7/
6/
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
Unless otherwise specified, all voltages are referenced to GND.
The limits for the parameters specified herein shall apply over the full specified VCC range and case temperature range of
-55°C to +125°C unless otherwise noted.
If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is
based on θJA) at the following rate:
Case C..................................................................................................................................... 13.5 mW/°C
Case X ..................................................................................................................................... 8.6 mW/°C
Guaranteed by design or process but not tested.
Limits are guaranteed by design or process but not production tested unless specified by the customer through the
purchase order or contract.
Devices use Silicon on Sapphire (SOS) technology and latch-up is physically not possible.
STANDARD
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REVISION LEVEL
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2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in
the solicitation or contract.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order
Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.1.1 Microcircuit die. For requirements for microcircuit die, see appendix A to this document.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.
3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4.
3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document
revision level control and shall be made available to the preparing and acquiring activity upon request.
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REVISION LEVEL
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3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the
full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table IA.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space
limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the
RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking
for device class M shall be in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of
supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MILPRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of
product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535,
appendix A.
3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime's agent,
and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore
documentation shall be made available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 36 (see MIL-PRF-38535, appendix A).
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REVISION LEVEL
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TABLE IA. Electrical performance characteristics.
Test
Symbol
Test conditions 1/
-55°C ≤ TC ≤ +125°C
unless otherwise specified
Device
type
VCC
Group A
subgroups
Limits 2/
Min
High level output
voltage
VOH
For all inputs affecting
output under test
VIN = 3.15 V or 1.35 V
For all other inputs
VIN = VCC or GND
IOH = -50 µA
M, D, P, L, R 3/
For all inputs affecting
output under test
VIN = 3.85 V or 1.65 V
For all other inputs
VIN = VCC or GND
IOH = -50 µA
M, D, P, L, R 3/
Low level output
voltage
VOL
For all inputs affecting
output under test
VIN = 3.15 V or 1.35 V
For all other inputs
VIN = VCC or GND
IOL = 50 µA
M, D, P, L, R 3/
For all inputs affecting
output under test
VIN = 3.85 V or 1.65 V
For all other inputs
VIN = VCC or GND
IOL = 50 µA
M, D, P, L, R 3/
Input current high
IIH
For input under test, VIN = 5.5 V
For all other inputs
VIN = VCC or GND
M, D, P, L, R 3/
Input current low
IIL
For input under test, VIN = GND
For all other inputs
VIN = VCC or GND
M, D, P, L, R 3/
All
1, 2, 3
1
4.40
5.5 V
1, 2, 3
5.40
1
5.40
4.5 V
1, 2, 3
0.1
1
0.1
1, 2, 3
0.1
All
All
All
All
5.5 V
All
All
5.5 V
4.40
V
V
1
0.1
1
2, 3
+0.5
+5.0
1
+5.0
All
All
Max
4.5 V
All
All
Unit
5.5 V
1
-0.5
2, 3
-5.0
1
-5.0
All
µA
µA
See footnotes at end of table.
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TABLE IA. Electrical performance characteristics - Continued.
Test
Symbol
Test conditions 1/
-55°C ≤ TC ≤ +125°C
unless otherwise specified
Device
type
VCC
Group A
subgroups
Limits 2/
Min
Output current high
(Source)
IOH
For all inputs affecting
output under test
VIN = 4.5 V or 0.0 V
For all other inputs
VIN = VCC or GND
VOUT = 4.1 V
M, D, P, L, R 3/
Output current low
(Sink)
Quiescent supply
current
IOL
ICC
For all inputs affecting
output under test
VIN = 4.5 V or 0.0 V
For all other inputs
VIN = VCC or GND
VOUT = 0.4 V
VIN = VCC
M, D, P, L, R 3/
or GND
M, D, P, L, R 3/
Input capacitance
CIN
Power dissipation
capacitance 4/
CPD
Functional test 5/
tPHL
All
4.5 V
All
All
5.5 V
VIH = 3.15 V, VIL = 1.35 V
See 4.4.1b
All
tPLH
CL = 50 pF
All
M, D, P, L, R 3/
All
1
-4.0
1
4.8
2, 3
4.0
1
4.0
mA
mA
µA
200
200
5.0 V
4
10
pF
5.0 V
4
6
pF
4.5 V
5, 6
7, 8
L
11
H
7
L
H
9
10, 11
2.0
2.0
18.0
20.0
9
2.0
20.0
9
10, 11
2.0
2.0
20.0
22.0
9
2.0
22.0
4.5 V
All
RL = 500Ω
See figure 4
-4.0
10.0
RL = 500Ω
See figure 4
M, D, P, L, R 3/
-4.8
1
All
All
1
2, 3
Max
2, 3
1
All
All
CL = 50 pF
4.5 V
All
VIH = 5.0 V
VIL = 0.0 V
f = 1 MHz, see 4.4.1c
M, D, P, L, R 3/
Propagation delay
time, An or Bn
to Yn 6/
All
Unit
4.5 V
ns
See footnotes at end of table.
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TABLE IA. Electrical performance characteristics - Continued.
Test
Symbol
Test conditions 1/
-55°C ≤ TC ≤ +125°C
unless otherwise specified
Device
type
VCC
Group A
subgroups
Limits 2/
Min
Output transition
time 7/
tTHL,
tTLH
CL = 50 pF
RL = 500Ω
See figure 4
All
4.5 V
Unit
Max
9
15.0
10, 11
22.0
ns
1/ Each input/output, as applicable, shall be tested at the specified temperature, for the specified limits, to the tests in table IA
herein. Output terminals not designated shall be high level logic, low level logic, or open, except for the ICC test,
the output terminals shall be open. When performing the ICC test, the current meter shall be placed in the circuit
such that all current flows through the meter.
2/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and
the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum
and maximum limits, as applicable, listed herein.
3/ Devices supplied to this drawing meet all levels M, D, P, L, R of irradiation. However, this device is only tested at the 'R'
level. Pre and post irradiation values are identical unless otherwise specified in table IA. When performing post irradiation
electrical measurements for any RHA level, TA = +25°C.
4/ Power dissipation capacitance (C PD) determines both the power consumption (PD) and current consumption (IS).
Where
PD = (CPD + CL) (VCC x VCC)f + (ICC x VCC)
IS = (CPD + CL) VCCf + ICC
f is the frequency of the input signal.
5/ The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible
input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2 herein. For VOUT
measurements, L ≤ 0.5 V and H ≥ 4.0 V.
6/ AC limits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V. For propagation delay tests, all paths must be tested.
7/ This parameter is guaranteed but not tested. This parameter is characterized upon initial design or process changes
which affect this characteristic.
TABLE IB. SEP test limits. 1/ 2/ 3/
1/
2/
3/
Device
type
VDD = 4.5 V
No SEU occurs at
effective LET
Bias VDD = 5.5 V for SEL test 3/
No SEL occurs at
effective LET
01
LET ≤ 100 MeV/(mg/cm 2)
LET ≤ 100 MeV/(mg/cm 2)
For SEP test conditions, see 4.4.4.4 herein.
Technology characterization and model verification supplemented by in-line data
may be used in lieu of end-of-line testing. Test plan must be approved by TRB
and qualifying activity.
Tested for worst case operating temperature, TA = +25°C ± 10°C for SEU and for latch up
TA = +125°C ± 10°C.
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Device type
All
Case outlines
C and X
Terminal number
Terminal symbol
1
A1
2
B1
3
Y1
4
A2
5
B2
6
Y2
7
GND
8
Y3
9
A3
10
B3
11
Y4
12
A4
13
B4
14
VCC
FIGURE 1. Terminal connections.
Inputs
Outputs
An
Bn
Yn
L
L
L
L
H
H
H
L
H
H
H
H
H = High voltage level
L = Low voltage level
FIGURE 2. Truth table.
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FIGURE 3. Logic diagram.
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NOTES:
1. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance).
2. RL = 500Ω or equivalent.
3. Input signal from pulse generator: VIN = 0.0 V to VCC; PRR ≤ 10 MHz; tr ≤ 3.0 ns; tf ≤ 3.0 ns; tr and tf shall be measured
from 10% VCC to 90% VCC and from 90% VCC to 10% VCC, respectively.
FIGURE 4. Switching waveforms and test circuit.
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4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1015.
(2) TA = +125°C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B or as modified in the device manufacturer’s Quality Management (QM) plan.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535, or as specified in the QM plan, including groups A, B, C, D, and E inspections and as specified herein. Quality
conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein.
Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
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REVISION LEVEL
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4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table in figure 2 herein. For device
classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device.
c.
CIN and CPD shall be measured only for initial qualification and after process or design changes which may affect
capacitance. CIN shall be measured between the designated terminal and GND at a frequency of 1 MHz. For C IN
and CPD, tests shall be sufficient to validate the limits defined in table IA herein.
TABLE IIA. Electrical test requirements.
Test requirements
Subgroups
(in accordance with
MIL-STD-883, method
5005, table IA)
Subgroups
(in accordance with MIL-PRF-38535,
table III)
Device class M
Device class Q
Interim electrical parameters
(see 4.2)
1,7,9
Final electrical parameters
(see 4.2)
1,2,3,7,8,9,10,11
1/
Group A test requirements
(see 4.4)
1,2,3,4,5,6,7,8,9,10,11
Device class V
1,7,9
1,7,9
1,2,3,7,8,9,10,11
1/
1,2,3,7,8,9,10,11
2/ 3/
1,2,3,4,5,6,7,8,9,10,11 1,2,3,4,5,6,7,8,9,
10,11
Group C end-point electrical
parameters (see 4.4)
1,2,3,7,8,9,10,11
1,2,3,7,8,9,10,11
1,2,3,7,8,9,10,11
3/
Group D end-point electrical
parameters (see 4.4)
1,7,9
1,7,9
1,7,9
Group E end-point electrical
parameters (see 4.4)
1,7,9
1,7,9
1,7,9
1/ PDA applies to subgroups 1 and 7.
2/ PDA applies to subgroups 1, 7, 9, and deltas.
3/ Delta limits, as specified in table IIB, shall be required where specified, and the delta limits shall be completed
with reference to the zero hour electrical parameters (see table IA).
TABLE IIB. Burn-in and operating life test, Delta parameters (+25°C).
Parameter 1/
Symbol
Delta Limits
Supply current
ICC
+3 µA
Output current (sink)
IOL
-15%
Output current (source)
IOH
-15%
1/ These parameters shall be recorded before and after the required
burn-in and life test to determine delta limits.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95781
A
REVISION LEVEL
C
SHEET
13
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method
1005 of MIL-STD-883.
b.
TA = +125°C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MILSTD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured
(see 3.5 herein).
a.
End-point electrical parameters shall be as specified in table IIA herein.
b.
For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device
classes must meet the postirradiation end-point electrical parameter limits as defined in table I at
TA = +25°C ±5°C, after exposure, to the subgroups specified in table IIA herein.
c.
When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883,
method 1019, condition A, and as specified herein.
4.4.4.1.1 Accelerated aging test. Accelerated annealing tests shall be performed on all devices requiring a RHA level greater
than 5k rads (Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall be the
pre-irradiation end-point electrical parameter limit at +25°C ±5°C. Testing shall be performed at initial qualification and after any
design or process changes which may affect the RHA response of the device.
4.4.4.2 Dose rate induced latchup testing. When required by the customer, dose rate induced latchup testing shall be
performed in accordance with test method 1020 of MIL-STD-883 and as specified herein. Tests shall be performed on
devices, SEC, or approved test structures at technology qualification and after any design or process changes which may
affect the RHA capability of the process.
4.4.4.3 Dose rate upset testing. When required by the customer, dose rate upset testing shall be performed in accordance
with test method 1021 of MIL-STD-883 and herein.
a.
Transient dose rate upset testing shall be performed at initial qualification and after any design or process changes
which may affect the RHA performance of the devices. Test 10 devices with 0 defects unless otherwise specified.
b.
Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved
radiation hardness assurance plan and MIL-PRF-38535. Device parametric parameters that influence upset
immunity shall be monitored at the wafer level in accordance with the wafer level hardness assurance plan and MILPRF-38535.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95781
A
REVISION LEVEL
C
SHEET
14
4.4.4.4 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be performedon
class V devices. SEP testing shall be performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as
approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or
latch up characteristics. Test four devices with zero failures. ASTM F1192 may be used as a guideline when performing SEP
testing. The test conditions for SEP are as follows:
a.
The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive
(i.e. 0° ≤ angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related effects is allowed.
b.
7
2
The fluence shall be ≥ 100 errors or ≥ 10 ions/cm .
c.
The flux shall be between 102 and 105 ions/cm 2/s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates which differ by at least an order of magnitude.
d.
The particle range shall be ≥ 20 microns in silicon.
e.
The test temperature shall be +25°C for the upset measurements and the maximum rated operating temperature ±10°C
for the latchup measurements.
f.
Bias conditions shall be defined by the manufacturer for latchup measurements.
g. For SEP test limits, see table IB herein.
4.5 Methods of inspection. Methods of inspection shall be as specified as follows:
4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal.
Currents given are conventional current and positive when flowing into the referenced terminal.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes
Q and V or MIL-PRF-38535, appendix A for device class M.
STANDARD
MICROCIRCUIT DRAWING
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REVISION LEVEL
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6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application
requires configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of
users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering
microelectronic devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108.
6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA , Columbus, Ohio 43216-5000,
or telephone (614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime-VA and
have agreed to this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DLA Land and Maritime-VA.
6.7 Additional information. A copy of the following additional data shall be maintained and available from the device
manufacturer:
a. RHA levels test conditions (SEP).
b. Number of upsets (SEU).
c. Number of transients (SET).
d. Occurrence of latch-up (SEL)
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
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APR 97
SIZE
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REVISION LEVEL
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SHEET
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-95781
A.1 SCOPE
A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified
Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers
approved QM plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices using
chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of
military high reliability (device class Q) and space application (device class V) are reflected in the Part or Identification Number
(PIN). When available, a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN.
A.1.2 PIN. The PIN is as shown in the following example:
5962
R
Federal
stock class
designator
\
95781
RHA
designator
(see A.1.2.1)
01
V
9
A
Device
type
(see A.1.2.2)
Device
class
designator
(see A.1.2.3)
Die
code
Die
details
(see A.1.2.4)
/
\/
Drawing number
A.1.2.1 RHA designator. Device classes Q and V RHA identified die shall meet the MIL-PRF-38535 specified RHA levels. A
dash (-) indicates a non-RHA die.
A.1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type
Generic number
01
Circuit function
HCS32
Radiation hardened, SOS, high speed
CMOS, quad 2-input OR gate
A.1.2.3 Device class designator.
Device class
Q or V
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
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DSCC FORM 2234
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Device requirements documentation
Certification and qualification to the die requirements of MIL-PRF-38535.
SIZE
5962-95781
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REVISION LEVEL
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-95781
A.1.2.4 Die details. The die details designation shall be a unique letter which designates the die's physical dimensions,
bonding pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each
product and variant supplied to this appendix.
A.1.2.4.1 Die physical dimensions.
Die type
Figure number
01
A-1
A.1.2.4.2 Die bonding pad locations and electrical functions.
Die type
Figure number
01
A-1
A.1.2.4.3 Interface materials.
Die type
Figure number
01
A-1
A.1.2.4.4 Assembly related information.
Die type
Figure number
01
A-1
A.1.3 Absolute maximum ratings. See paragraph 1.3 herein for details.
A.1.4 Recommended operating conditions. See paragraph 1.4 herein for details.
A.2 APPLICABLE DOCUMENTS.
A.2.1 Government specification, standards, and handbooks. The following specification, standard, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in
the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARD
MIL-STD-883
-
Test Method Standard Microcircuits.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103
MIL-HDBK-780
-
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://quicksearch.dla.mil/ or from the Standardization Document Order
Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
A.2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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REVISION LEVEL
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-95781
A.3 REQUIREMENTS
A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit or function as described herein.
A.3.2 Design, construction and physical dimensions. The design, construction and physical dimensions shall be as specified
in MIL-PRF-38535 and the manufacturer’s QM plan, for device classes Q and V and herein.
A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figure A-1.
A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as
specified in A.1.2.4.2 and on figure A-1.
A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figure A-1.
A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and on figure A-1.
A.3.2.5 Truth table. The truth table shall be as defined in paragraph 3.2.3 herein.
A.3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be as defined within paragraph 3.2.6 of the body of
this document.
A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and post-irradiation parameter limits are as specified in table I of the body of this
document.
A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing
sufficient to make the packaged die capable of meeting the electrical performance requirements in table IA.
A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a
customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed
in A.1.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535.
A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a
QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate of
compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this appendix shall
affirm that the manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the
requirements herein.
A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535
shall be provided with each lot of microcircuit die delivered to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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REVISION LEVEL
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-95781
A.4 VERIFICATION
A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance
with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM
plan shall not affect the form, fit or function as described herein.
A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the
manufacturer’s QM plan. As a minimum it shall consist of:
a)
Wafer lot acceptance for class V product using the criteria defined in MIL-STD-883, test method 5007.
b)
100% wafer probe (see paragraph A.3.4 herein).
c)
100% internal visual inspection to the applicable class Q or V criteria defined in MIL-STD-883, test method 2010 or
the alternate procedures allowed in MIL-STD-883, test method 5004.
A.4.3 Conformance inspection.
A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see
A.3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of
packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified in paragraphs 4.4.4 herein.
A.5 DIE CARRIER
A.5.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or
as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and
electrostatic protection.
A.6 NOTES
A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with
MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications and
logistics purposes.
A.6.2 Comments. Comments on this appendix should be directed to DLA Land and Maritime-VA, Columbus, Ohio, 432165000 or telephone (614) 692-0547.
A.6.3 Abbreviations, symbols and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed within QML-38535 have submitted a certificate of compliance (see A.3.6 herein) to DLA Land and MaritimeVA and have agreed to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95781
A
REVISION LEVEL
C
SHEET
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-95781
The following metallization diagram supplies the locations and electrical functions of the bonding pads. The internal
metallization layout and alphanumeric information contained within this diagram may or may not represent the actual circuit
defined by this SMD.
NOTE: Pad numbers reflect terminal numbers when placed in case outlines C, X (see figure 1).
FIGURE A-1 Die bonding locations and electrical functions.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
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SIZE
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REVISION LEVEL
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-95781
Die physical dimensions.
Die size:
Die thickness:
2200 x 2240 microns.
21 ±2 mils.
Interface materials.
11.0kÅ ±1kÅ
Top metallization:
SiAl
Backside metallization:
None
Glassivation
Type:
Thickness:
SiO2
13kÅ ±2.6kÅ
Substrate:
Silicon on sapphire (SOS)
Assembly related information.
Substrate potential:
Insulator
Special assembly instructions:
Bond pad #14 (VCC) first
FIGURE A-1 Die bonding locations and electrical functions. - Continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-95781
A
REVISION LEVEL
C
SHEET
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STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 14-10-10
Approved sources of supply for SMD 5962-95781 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This bulletin is
superseded by the next dated revision of MIL-HDBK-103 and QML-38535. LA Land and Maritime maintains an online
database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/
Standard
microcircuit drawing
PIN 1/
5962R9578101VCC
5962R9578101VXC
5962R9578101V9A
Vendor
CAGE
number
34371
34371
34371
Vendor
similar
PIN 2/
HCS32DMSR
HCS32KMSR
HCS32HMSR
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
3/ Not available from an approved source of supply.
Vendor CAGE
number
34371
Vendor name
and address
Intersil Corporation
1001 Murphy Ranch Road
Milpitas, CA 95035-6803
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.