REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make title and symbol changes to both tests specified under the UVLO section in table I. - ro 00-12-18 R. MONNIN B Made a change to the minimum ambient operating temperature in 1.4 and table I. Changes also made to the delay to output test and PSRR test in table I. – rp 01-03-21 R. MONNIN C Add footnote to the error amp section as specified in table I and add footnote to figure 2. - ro 01-07-10 R. MONNIN D Make changes to output voltage test, total output variation test, and input voltage test as specified in table I. Also, make change to footnote 2/ as specified in table I and footnote 1/ as specified in figure 2. - ro 01-08-16 R. MONNIN E Add new footnote to figure 2 and to the Oscillator section as specified under table I. Make change to RTCT description as specified under figure 2. Make change to VIN test condition as specified under table I. - ro 03-09-19 R. MONNIN F Add a new footnote under paragraph1.5 and Table I. - ro 05-06-03 R. MONNIN G Add OSCGND and VC pin descriptions to figure 2. - ro 08-10-16 R. HEBER H Add block diagram. Add Table IB, paragraphs 2.2, 4.4.4.3, and 6.7. Make changes to footnote 3/ as specified under Table I. Add new footnote to PWM section as specified under Table I. Delete note 3 from figure 2. Delete the last sentence from the RTCT pin description under figure 2. - ro 10-07-14 C. SAFFLE J Add device type 02. Delete radiation exposure circuit and dose rate induced latch up testing paragraph. - ro 12-06-27 C. SAFFLE REV SHEET REV J J J J J J J J J J SHEET 15 16 17 18 19 20 21 22 23 24 REV STATUS REV J J J J J J J J J J J J J J OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY RICK OFFICER STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.landandmaritime.dla.mil CHECKED BY RAJESH PITHADIA APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A RAYMOND MONNIN DRAWING APPROVAL DATE 00-11-30 REVISION LEVEL J MICROCIRCUIT, DIGITAL-LINEAR, CURRENT MODE PULSE WIDTH MODULATOR, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 5962-01509 1 OF 24 5962-E325-12 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 F 01509 Federal stock class designator \ RHA designator (see 1.2.1) 01 V P C Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 IS-1845ASRH 02 IS-1845ASEH Circuit function High speed, current mode pulse width modulator High speed, current mode pulse width modulator 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter P X Descriptive designator Terminals CDIP2-T8 See figure 1 8 18 Package style Dual-in-line Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 2 1.3 Absolute maximum ratings. 1/ Supply voltage (VCC) .................................................................................................... Maximum storage temperature range ........................................................................... Lead temperature (soldering, 10 seconds) .................................................................... Power dissipation (PD) .................................................................................................. +35 V dc -65°C to +150°C +265°C 1.5 W Junction temperature (TJ) ............................................................................................. +175°C Thermal resistance, junction-to-case (θJC): Case P ....................................................................................................................... Case X ....................................................................................................................... Thermal resistance, junction-to-ambient (θJA): Case P ....................................................................................................................... Case X ....................................................................................................................... 25°C/W 8°C/W 100°C/W 90°C/W 1.4 Recommended operating conditions. Supply voltage (VCC) .................................................................................................... +12 V dc to +20 V dc Ambient operating temperature range (TA) ................................................................... -50°C to +125°C 1.5 Radiation features. Maximum total dose available (dose rate = 50 – 300 rads(Si)/s): Device type 01 ........................................................................................................... 300 krads(Si) 2/ Device type 02 ........................................................................................................... 300 krads(Si) 3/ Maximum total dose available (dose rate ≤ 0.01 rads(Si)/s): Device type 02 .......................................................................................................... 50 krads(Si) 3/ Single event phenomena (SEP) for device types 01 and 02: 2 No SEU occurs at an effective linear energy transfer (LET) (see 4.4.4.2) ................ ≤ 35 MeV / (mg/cm ) 4/ 6 2 (Fluence = 1x10 ions/cm ) Single event latchup (SEL) ........................................................................................ No latch up 5/ ______ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Device type 01 may be dose rate sensitive in a space environment and may demonstrate enhanced low dose rate effects. The radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in MIL-STD-883, method 1019, condition A to a maximum total dose of 300 krads(Si) . 3/ The device type 02 radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in MIL-STD-883, method 1019, condition A to a maximum total dose of 300 krads(Si), and condition D to a maximum total dose of 50 krads(Si). 4/ Limits are characterized at initial qualification and after any design or process changes which may affect the SEP characteristics but are not production tested. See manufacturer’s SEE test report for more information. 5/ Device types 01 and 02 use dielectrically isolated (DI) technology and latch-up is verified to be not possible. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at https://assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation or contract. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM F1192 – Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document is available online at http://www.astm.org/ or from ASTM International, P.O. Box C700, 100 Bar Harbor Drive, West Conshohocken, PA 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diagram. The block diagram shall be as specified on figure 3. 3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 4 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime’s agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 116 (see MIL-PRF-38535, appendix A). STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 5 TABLE IA. Electrical performance characteristics. Test Symbol Conditions 1/ -50°C ≤ TA ≤ +125°C unless otherwise specified Group A subgroups Device type Limits Unit Min Max 4.90 5.10 4.90 5.10 -20 20 -20 20 -25 25 2,3 -60 60 1 -60 60 4.82 5.18 4.82 5.18 -100 -30 -100 -30 47 57 47 57 -1 1 -1 1 7.5 14 7.5 14 Reference section. Output voltage VREF 1 IOUT = 1 mA M,D,P,L,R,F Line regulation VRLINE 1 12 V ≤ VCC ≤ 25 V 1,2,3 M,D,P,L,R,F Load regulation VRLOAD VWC 1 mA ≤ IO ≤ 20 mA 1 Line, Load, Temp 1,2,3 M,D,P,L,R,F Output short circuit 01, 02 1 M,D,P,L,R,F Total output variation 01, 02 01, 02 01, 02 1 1,2,3 ISC M,D,P,L,R,F 01, 02 1 V mV mV V mA Oscillator section. 2/ Initial accuracy IA 4 TA = 25°C M,D,P,L,R,F Voltage stability VS 4 12 V ≤ VCC ≤ 25 V 4,5,6 M,D,P,L,R,F Discharge current IDIS 01, 02 01, 02 4 1,2,3 VRT/CT = 2 V M,D,P,L,R,F 01, 02 1 kHz % mA See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 6 TABLE IA. Electrical performance characteristics – Continued. Test Error amp section. Symbol Conditions 1/ -50°C ≤ TA ≤ +125°C unless otherwise specified Group A subgroups Device type Limits Unit Min Max 2.42 2.58 2.42 2.58 -2 2 -2 2 3/ Input voltage VIN 1,2,3 VCOMP = 2.5 V M,D,P,L,R,F Input bias current 1 1,2,3 IIB M,D,P,L,R,F Open loop voltage gain AVOL 01, 02 01, 02 1 2 V ≤ VCOMP ≤ 4 V 4 M,D,P,L,R,F 01, 02 µA 65 5,6 60 4 60 V dB Unity gain bandwidth 4/ UGBW TA = +25°C 4 01, 02 2 MHz Power supply rejection ratio PSRR 12 V ≤ VCC ≤ 25 V 4 01, 02 60 dB (EA) M,D,P,L,R,F Output sink current ISINK M,D,P,L,R,F ISC VFB = 2.3 V, 55 01, 02 4.5 2,3 4.0 1 4.0 1,2,3 01, 02 mA -0.5 VOH(EA) 1 VFB = 2.3 V, IL = 500 µA 1,2,3 M,D,P,L,R,F Low output voltage 4 mA VCOMP = 5 V M,D,P,L,R,F High output voltage 55 1 VFB = 2.7 V, VCOMP = 1.1 V Output source current 5,6 VOL(EA) -0.5 01, 02 1 VFB = 2.7 V, IL = 500 µA 1,2,3 M,D,P,L,R,F 5 V 5 01, 02 1 1.1 V 1.1 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 7 TABLE IA. Electrical performance characteristics – Continued. Test Symbol Conditions 1/ -50°C ≤ TA ≤ +125°C unless otherwise specified Group A subgroups Device type Limits Min Unit Max Output section. Low output voltage VOL(OS) 1 ISINK = 20 mA M,D,P,L,R,F ISINK = 200 mA M,D,P,L,R,F High output voltage VOH(OS) M,D,P,L,R,F ISINK = 200 mA M,D,P,L,R,F 0.85 2,3 0.90 1 0.90 1 2.2 2,3 2.5 1 2.5 1,2,3 ISINK = 20 mA 01, 02 01, 02 13 16 1 13 16 1 12 16 2,3 11 16 1 11 16 3 4 3 4 0.8 1.1 0.8 1.1 V V Current sense section. AV Gain 5/ 4,5,6 M,D,P,L,R,F Maximum input signal voltage Input bias current VINS 4 1,2,3 VCOMP = 5 V M,D,P,L,R,F 1,2,3 M,D,P,L,R,F Power supply rejection ratio PSRR 01, 02 1 IIB Delay to output 4/ 01, 02 01, 02 1 4,5,6 01, 02 12 V ≤ VCC ≤ 25 V 1,2,3 01, 02 M,D,P,L,R,F V µA -10 -10 VISENSE = 0 V to 3 V (CS) V/V 1 125 70 ns dB 70 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 8 TABLE IA. Electrical performance characteristics – Continued. Test Symbol Conditions 1/ -50°C ≤ TA ≤ +125°C unless otherwise specified Group A subgroups Device type Limits Unit Min Max 7.0 8.2 7.0 8.2 7.8 9.0 7.8 9.0 47 50 47 50 Undervoltage lockout (UVLO) section. Stop threshold voltage 1,2,3 VSTOP M,D,P,L,R,F Start threshold voltage 01, 02 1 1,2,3 VSTART M,D,P,L,R,F 01, 02 1 V V Pulse width modulation (PWM) section. 6/ Maximum duty cycle 1,2,3 DCMAX M,D,P,L,R,F Minimum duty cycle 4/ 01, 02 1 DCMIN 1,2,3 01, 02 0 1 01, 02 0.5 % % Total standby current section. Startup current ISU M,D,P,L,R,F Operating supply current ICC VZ 1 1.0 01, 02 17 1 1,2,3 ICC = 25 mA M,D,P,L,R,F 1/ 1.0 1,2,3 VFB – VISENSE = 0 V M,D,P,L,R,F Zener voltage 2,3 mA mA 17 01, 02 1 30 V 30 RHA device type 01 supplied to this drawing will meet all levels M, D, P, L, R and F of irradiation. However, device type 01 is only tested at the “F” level accordance with MIL-STD-883 method 1019 condition A (see 1.5 herein). Device type 01 may be dose rate sensitive in a space environment and may demonstrate enhanced low dose rate effects. RHA device type 02 supplied to this drawing will meet all levels M, D, P, L, R, and F of irradiation for condition A and M, D, P, and L for condition D. However, device type 02 is only tested at the “F” level in accordance with MIL-STD-883, method 1019, condition A and tested at the “L” level in accordance with MIL-STD-883, method 1019, condition D (see 1.5 herein). Pre and post irradiation values are identical unless otherwise specified in table IA. When performing post irradiation electrical measurements for any RHA level, TA = +25°C. 2/ 3/ 4/ 5/ 6/ The device is tested with RT = 10 kΩ and CT = 3.3 nF. RT is connected from the RTCT pin to the VREF pin and CT is connected from the RTCT pin to the GND pin. Grounding the COMP pin does not disable the output. The output may be disabled by raising the voltage on the ISENSE pin to > 1.1 V. This parameter is guaranteed but not tested. This parameter is characterized upon initial design or process changes which affect this characteristic. Gain is defined as ∆VCOMP / ∆VCS, 0.1 ≤ VCS ≤ 0.8 V. To insure operation over the full duty cycle range, the peak amplitude of the current sense voltage appearing at the ISENSE pin at output pulse termination for the minimum current operation must be greater than the peak amplitude of any slope compensation voltage appearing at the ISENSE pin which is derived from the RTCT signal. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 9 TABLE IB. SEP test limits. 1/ 2/ 3/ Effective linear energy transfer (LET) Device types SEP Temperature (TC) VCC Fluence 01 and 02 No SEU +25°C 12 V 1x10 ions/cm 1/ 2/ 3/ 6 2 2 ≤ 35 MeV (mg/cm ) For SEP test conditions, see 4.4.4.2 herein. Technology characterization and model verification supplemented by in-line data may be used in lieu of end of line testing. Test plan must be approved by the technical review board and qualifying activity. Limits are characterized at initial qualification and after any design or process changes which may affect the SEP characteristics but are not production tested. See manufacturer’s SEE test report for more information. 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125°C, minimum. b. Interim and final electrical test parameters shall be as specified in table IIA herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 10 Case X FIGURE 1. Case outline. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 11 Case X -continued. Symbol Inches Millimeters Notes Min Max Min Max A 0.045 0.115 1.14 2.92 b 0.015 0.022 0.38 0.56 b1 0.015 0.019 0.38 0.48 c 0.004 0.009 0.10 0.23 c1 0.004 0.006 0.10 0.15 D 0.430 0.450 10.92 11.43 E 0.320 0.340 8.13 8.64 E1 --- 0.360 --- 9.14 E2 0.220 0.240 5.59 6.10 E3 0.030 --- 0.76 --- 7 2 e 0.050 BSC 3 1.27 BSC k 0.008 0.015 0.20 0.38 L 0.280 0.320 7.11 8.13 Q 0.026 0.045 0.66 1.14 S1 0.000 --- 0.00 --- M --- 0.0015 --- 0.04 N 3 18 8 18 NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. Alternately, a tab (dimension k) may be used to identify pin one. 2. If a pin one identification mark is used in addition to a tab, the limits of dimension k do not apply. 3. This dimension allows for off-center lid, meniscus, and glass overrun. 4. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finish lead surfaces, when solder dip or tin plate lead finish is applied. 5. N is the maximum number of terminal positions. 6. Measure dimension S1 at all four corners. 7. For bottom-brazed lead packages, no organic or polymeric materials shall be molded to the bottom of the package to cover the leads. 8. Dimension Q shall be measured at the point of exit (beyond the meniscus) of the lead from the body. Dimension Q minimum shall be reduced by 0.0015 inch (0.038 mm) maximum when solder dip lead finish is applied. 9. Dimensioning and tolerancing per ANSI Y14.5M – 1982. 10. Controlling dimension: INCH. FIGURE 1. Case outline – Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 12 Device types Case outlines Terminal number 01 and 02 P X Terminal symbol 1 COMP 1/ NC 2/ 2 VFB COMP 1/ 3 ISENSE VFB 4 RTCT NC 2/ 5 GND NC 2/ 6 OUTPUT NC 2/ 7 VCC ISENSE 8 VREF RTCT 9 --- NC 2/ 10 --- NC 2/ 11 --- OSCGND 12 --- GND 13 --- NC 2/ 14 --- OUTPUT 15 --- VC 16 --- VCC 17 --- VREF 18 --- NC 2/ NOTES 1/ Grounding the COMP pin does not disable the output. The output may be disabled by raising the voltage on the ISENSE pin to > 1.1 V. 2/ NC = No connection FIGURE 2. Terminal connections. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 13 Terminal symbol Description COMP This is the output of the error amplifier and is the difference between the sampled voltage on VFB and an internal 2.5 V reference voltage. This point is internally connected to the inverting input of the current sense comparator. VFB ISENSE This is the inverting input of the error amplifier. A scaled sample of the converter output voltage should be connected to this pin. The difference of this voltage and an internal 2.5 V reference is fed to the current sense comparator. This is the non-inverting input of the current sense comparator. A small series resistor used to sense the current through the switching FET should be connected to this input. The switch is turned off when this current reaches a peak controlled by the error amplifier. RTCT This is the connection for the resistor and capacitor timing components that set the frequency of the oscillator. GND This is the return for all of the internal circuitry. On the die, there is a double bond pad for the oscillator ground, a pad for the logic ground, and a pad for the output stage ground. These pads must all be bonded to ground in hybrid applications and are all bonded to the GND pin on the dual-in-line package. On the flat pack option, the oscillator ground is double bonded to OSCGND pin, while the logic and output stage grounds are bonded to the GND pin. OUTPUT This is the main pulse width modulator output for the FET control. VCC This is the supply voltage input pin. The device is specified for an operating supply range of 12 V to 25 V. An under voltage lockout circuit disables the outputs (tri-state) and prevents damage to the switching FET, if power-up voltage has not reached 8.2 V, or if the supply voltage drops below 9.0 V after start-up. VREF This is the reference voltage output. It is designed to provide an extremely stable 5 V reference voltage over temperature and post irradiation. The oscillator timing resistor (RT) is connected to this pin. OSCGND VC Ground of the internal oscillator. This pin should be connected to system ground. Open collector of the output stage. This pin should be connected to the VCC supply voltage. FIGURE 2. Terminal connections – Continued. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 14 FIGURE 3. Block diagram. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 15 TABLE IIA. Electrical test requirements. Test requirements Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) Group A test requirements (see 4.4) Group C end-point electrical parameters (see 4.4) Group D end-point electrical parameters (see 4.4) Group E end-point electrical parameters (see 4.4) Subgroups (in accordance with MIL-STD-883, method 5005, table I) Device class M 1,4 Subgroups (in accordance with MIL-PRF-38535, table III) 1,4 1,4 1,2,3,4,5,6 1/ 1,2,3,4,5,6 1/ 1,2,3,4,5,6 1,2,3,4,5,6 1,2,3, 2/ 3/ 4,5,6 1,2,3,4,5,6 1,2,3,4,5,6 1,2,3,4,5,6 1,4 1,4 1,2,3, 3/ 4,5,6 1,4 1,4 1,4 1,4 Device class Q Device class V 1/ PDA applies to subgroup 1. 2/ PDA applies to subgroup 1 and deltas. 3/ Delta limits as specified in table IIB herein shall be required where specified, and the delta values shall be completed with reference to the zero hour electrical parameters (see table IA). TABLE IIB. Burn-in and operating life test delta parameters. TA = +25°C. Parameters Symbol Delta limits Input bias current IIB ±0.1 µA Operating supply current ICC ±2.0 mA 1/ 1/ Deltas are performed at room temperature. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. Subgroups 7, 8, 9, 10, and 11 in table I, method 5005 of MIL-STD-883 shall be omitted. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 16 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. b. TA = +125°C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table IIA herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table IA at TA = +25°C ±5°C, after exposure, to the subgroups specified in table IIA herein. 4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883 method 1019, condition A and as specified herein for device types 01 and 02. In addition, for device type 02 a low dose rate test shall be performed in accordance with MIL-STD-883 method 1019, condition D and as specified herein. 4.4.4.1.1 Accelerated annealing test. Accelerated annealing tests shall be performed on all devices requiring a RHA level greater than 5 krads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall be the pre-irradiation end-point electrical parameter limit at 25°C ±5°C. Testing shall be performed at initial qualification and after any design or process changes which may affect the RHA response of the device. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 17 4.4.4.2 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be performed on class V devices. SEP testing shall be performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latchup characteristics. Test four devices with zero failures. ASTM F1192 may be used as a guideline when performing SEP testing. The recommended test conditions for SEP are as follows: a. The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive (i.e. 0° ≤ angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related affects is allowed. b. The fluence shall be ≥ 100 errors or ≥ 10 ions/cm . c. The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by measuring the cross-section at two flux rates which differ by at least an order of magnitude. d. The particle range shall be ≥ 20 micron in silicon. e. The test temperature shall be +125°C ±10% for SEL and 25°C ±10% for SEU. f. Bias conditions for VCC shall be as listed in Table IB. g. For SEU test limits, see Table IB herein. 6 2 5 2 2 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DLA Land and Maritime -VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime -VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0540. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 18 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime -VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DLA Land and Maritime -VA. 6.7 Additional information. When applicable, a copy of the following additional data shall be maintained and available from the device manufacturer: a. RHA upset levels. b. Test conditions (SEP). c. Number of upsets (SEU). STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 19 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-01509 A.1 SCOPE A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers approved QM plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices using chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of military high reliability (device class Q) and space application (device class V) are reflected in the Part or Identification Number (PIN). When available, a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN. A.1.2 PIN. The PIN is as shown in the following example: 5962 F Federal stock class designator \ RHA designator (see A.1.2.1) 01509 01 V 9 A Device type (see A.1.2.2) Device class designator (see A.1.2.3) Die code Die details (see A.1.2.4) / \/ Drawing number A.1.2.1 RHA designator. Device classes Q and V RHA identified die meet the MIL-PRF-38535 specified RHA levels. A dash (-) indicates a non-RHA die. A.1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 IS-1845ASRH 02 IS-1845ASEH Circuit function Radiation hardened current mode pulse width modulator Radiation hardened current mode pulse width modulator A.1.2.3 Device class designator. Device class Q or V STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 Device requirements documentation Certification and qualification to the die requirements of MIL-PRF-38535 SIZE 5962-01509 A REVISION LEVEL J SHEET 20 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-01509 A.1.2.4 Die details. The die details designation is a unique letter which designates the die's physical dimensions, bonding pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each product and variant supplied to this appendix. A.1.2.4.1 Die physical dimensions. Die type Figure number 01, 02 A-1 A.1.2.4.2 Die bonding pad locations and electrical functions. Die type Figure number 01, 02 A-1 A.1.2.4.3 Interface materials. Die type Figure number 01, 02 A-1 A.1.2.4.4 Assembly related information. Die type Figure number 01, 02 A-1 A.1.3 Absolute maximum ratings. See paragraph 1.3 herein for details. A.1.4 Recommended operating conditions. See paragraph 1.4 herein for details. A.1.5 Radiation features. See paragraph 1.5 herein for details. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 21 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-01509 A.2 APPLICABLE DOCUMENTS. A.2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARD MIL-STD-883 - Test Method Standard Microcircuits. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https://assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) A.2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. A.3 REQUIREMENTS A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. A.3.2 Design, construction and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein and the manufacturer’s QM plan for device classes Q and V. A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figure A-1. A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as specified in A.1.2.4.2 and on figure A-1. A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figure A-1. A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and on figure A-1. A.3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as defined in paragraph 3.2.4 herein. A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post-irradiation parameter limits are as specified in table IA of the body of this document. A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing sufficient to make the packaged die capable of meeting the electrical performance requirements in table IA. A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed in A.1.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 22 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-01509 A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this appendix shall affirm that the manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein. A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuit die delivered to this drawing. A.4 VERIFICATION A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM plan shall not affect the form, fit, or function as described herein. A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the manufacturer’s QM plan. As a minimum, it shall consist of: a. Wafer lot acceptance for class V product using the criteria defined in MIL-STD-883, method 5007. b. 100% wafer probe (see paragraph A.3.4 herein). c. 100% internal visual inspection to the applicable class Q or V criteria defined in MIL-STD-883, method 2010 or the alternate procedures allowed in MIL-STD-883, method 5004. A.4.3 Conformance inspection. A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see A.3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of packaged die shall be as specified in table II herein. Group E tests and conditions are as specified in paragraphs 4.4.4, 4.4.4.1, 4.4.4.1.1, and 4.4.4.2 herein. A.5 DIE CARRIER A.5.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and electrostatic protection. A.6 NOTES A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications, and logistics purposes. A.6.2 Comments. Comments on this appendix should be directed to DLA Land and Maritime -VA, Columbus, Ohio, 43218-3990 or telephone (614)-692-0540. A.6.3 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed within QML-38535 have submitted a certificate of compliance (see A.3.6 herein) to DLA Land and Maritime -VA and have agreed to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 23 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-01509 Die bonding pad locations and electrical functions Die physical dimensions. Die size: 121.6 mils x 159.0 mils. Die thickness: 19 ±1 mils Interface materials. Top metallization: Al Si Cu 16.0 kÅ ±2.0 kÅ Backside metallization: None (Silicon) Glassivation. Type: Phosphorus silicon glass (PSG) Thickness: 8 kÅ ± 1 kÅ Substrate: DI (dielectric isolation) Assembly related information. Substrate potential: Unbiased. Special assembly instructions: 1. Both the GND pads must be bonded to ground. 2. The OUTPUT double-sized bond pad must be double bonded for current sharing purposes. 3. The OSCGND double-sized bond pad must be double bonded to ground for current sharing purposes FIGURE A-1. Die bonding pad locations and electrical functions. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-01509 A REVISION LEVEL J SHEET 24 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 12-06-27 Approved sources of supply for SMD 5962-01509 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DLA Land and Maritime -VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962F0150901QPC 34371 IS7-1845ASRH-8 5962F0150901QXC 34371 IS9-1845ASRH-8 5962F0150901VPC 34371 IS7-1845ASRH-Q 5962F0150901VXC 34371 IS9-1845ASRH-Q 5962F0150901V9A 34371 IS0-1845ASRH-Q 5962F0150902VPC 34371 IS7-1845ASEH-Q 5962F0150902VXC 34371 IS9-1845ASEH-Q 5962F0150902V9A 34371 IS0-1845ASEH-Q 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number 34371 Vendor name and address Intersil Corporation 1001 Murphy Ranch Road Milpitas, CA 95035-6803 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.