® RT8202/A/B Single Synchronous Buck Controller General Description Features The RT8202/A/B PWM controller provides high efficiency, excellent transient response, and high DC output accuracy needed for stepping down high voltage batteries to generate low voltage CPU core, I/O, and chipset RAM supplies in notebook computers. Ultra-High Efficiency Resistor Programmable Current Limit by Low Side RDS(ON) Sense (Lossless Limit) or Sense Resistor (High Accuracy) Quick Load Step Response within 100ns 1% VOUT Accuracy over Line and Load Adjustable 0.75V to 3.3V Output Range 4.5V to 26V Battery Input Range Resistor Programmable Frequency Over/Under Voltage Protection 2 Steps Current Limit During Soft-Start Drives Large Synchronous-Rectifier FETs Power Good Indicator RoHS Compliant and 100% Lead (Pb)-Free Applications Notebook Computers CPU Core Supply Chipset/RAM Supply as Low as 0.75V Pin Configurations TON EN/DEM RT8202/A/B 16 15 14 13 1 12 UGATE 2 11 PHASE OC VDDP Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS8202/A/B-07 April 2014 7 PGND LGATE 8 TON VOUT VDD FB PGOOD 1 14 2 UGATE PHASE 11 OC 10 VDDP 9 LGATE 13 3 12 GND 4 15 5 6 7 8 PGND Suitable for use in SnPb or Pb-free soldering processes. 6 BOOT RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. 9 5 WQFN-16L 4x4/WQFN-16L 3x3 Richtek products are : 10 17 4 Lead Plating System P : Pb Free G : Green (Halogen Free and Pb Free) Note : GND 3 NC VOUT VDD FB PGOOD GND Package Type QW : WQFN-16L 4x4 (W-Type) (RT8202) QW : WQFN-16L 3x3 (W-Type) (RT8202A) QW : WQFN-14L 3.5x3.5 (W-Type) (RT8202B) NC BOOT (TOP VIEW) Ordering Information EN/DEM The RT8202/A/B achieves high efficiency at a reduced cost by eliminating the current sense resistor found in traditional current mode PWMs. Efficiency is further enhanced by its ability to drive very large synchronous rectifier MOSFETs. The buck conversion allows this device to directly step down high voltage batteries for the highest possible efficiency. The RT8202/A/B is intended for CPU core, chipset, DRAM, or other low voltage supplies as low as 0.75V. RT8202 is available in WQFN-16L 4x4, RT8202A is available in WQFN-16L 3x3 and RT8202B is available in WQFN-14L 3.5x3.5 packages. GND The constant on-time PWM control scheme handles wide input/output voltage ratios with ease and provides 100ns “instant-on” response to load transients while maintaining a relatively constant switching frequency. WQFN-14L 3.5x3.5 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT8202/A/B Typical Application Circuit VIN 4.5V to 26V D1 BAT254 VDDP 5V C1 1µF R3 1M R2 51k RT8202/A/B BOOT TON VDDP UGATE R1 10 C2 1µF C4 10µF R4 2.2 C3 0.1µF R5 0 VOUT Q1 AO4702 L1 2.4µH PHASE VDD LGATE PGOOD PGOOD OC CCM/DEM EN/DEM FB R6 10k C7 220µF R7 Q2 AO4702 GND C5 R8 12k C8 0.1µF R9 20k C6 VOUT PGND Figure 1. Output Voltage Setting for VOUT < 3.3V Application VIN 4.5V to 26V D1 BAT254 VDDP 5V C1 1µF R3 1M R2 51k RT8202/A/B BOOT TON VDDP C3 0.1µF R5 0 UGATE R1 10 C2 1µF C4 10µF R4 2.2 VDD VOUT L1 2.4µH PHASE LGATE PGOOD PGOOD OC CCM/DEM EN/DEM FB GND PGND Q1 AO4702 R6 10k Q2 AO4702 C7 220µF R7 C5 R8 C8 0.1µF R9 C6 R10 VOUT VOUT FB R11 Figure 2. Output Voltage Setting for VOUT > 3.3V Application Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS8202/A/B-07 April 2014 RT8202/A/B Functional Pin Description Pin No. Pin Name Pin Function RT8202/A RT8202B 1 3 VOUT VOUT Sense Input. Connect to the output of PWM converter. VOUT is an input of the PWM controller. 2 4 VDD Analog Supply Voltage Input for the internal analog integrated circuit. Bypass to GND with a 1F ceramic capacitor. 3 5 FB VOUT Feedback Input. Connect FB to a resistor voltage divider from VOUT to GND to adjust the output from 0.75V to 3.3V. 4 6 PGOOD 5, 14 -NC 6, 17 7, 15 GND (Exposed Pad) (Exposed Pad) 7 8 PGND Power Good Signal Open-Drain Output of PWM Converter. This pin will be pulled high when the output voltage is within the target range. No Internal Connection. Ground for Analog Circuitry. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Power Ground. Low side N-MOSFET Gate-Drive Output for PWM. This pin swings between GND and VDDP. 8 9 LGATE 9 10 VDDP 10 11 OC 11 12 PHASE 12 13 UGATE High Side N-MOSFET Floating Gate-Driver Output for the PWM converter. This pin swings between PHASE and BOOT. 13 14 BOOT Boost Capacitor Connection for PWM Converter. Connect an external ceramic capacitor to PHASE and an external diode to VDDP. 15 1 EN/DEM PWM Enable and Operation Mode Selection Input. Connect to VDD for diode-emulation mode, connect to GND for shutdown mode and floating the pin for CCM mode. 16 2 TON VIN Sense Input. Connect to VIN through a resistor. TON is an input of the PWM controller. VDDP is the gate driver supply for the external MOSFETs. Bypass to GND with a 1F ceramic capacitor. PWM Current Limit Setting and sense. Connect a resistor between OC to PHASE for current limit setting. Inductor Connection. This pin is not only the zero-current-sense input for the PWM converter, but also the UGATE high side gate driver return. Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS8202/A/B-07 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT8202/A/B Function Block Diagram TRIG On-time Compute 1-SHOT VOUT TON SS(Internal) R - + GM + - - BOOT Comp S + Q DRV UGATE PHASE Min. TOFF Q TRIG 0.75V VREF + 115% VREF 70% VREF Latch S1 Q UV Latch S1 Q VDDP 1-SHOT DRV - FB OV + PGND Diode Emulation - 90% VREF LGATE + 20uA VDD SS Timer Thermal Shutdown + GND EN/DEM Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 OC - PGOOD is a registered trademark of Richtek Technology Corporation. DS8202/A/B-07 April 2014 RT8202/A/B Absolute Maximum Ratings (Note 1) Input Voltage, TON to GND ---------------------------------------------------------------------------------------------BOOT to GND -------------------------------------------------------------------------------------------------------------PHASE to BOOT ---------------------------------------------------------------------------------------------------------VDD, VDDP, VOUT, EN/DEM, FB, PGOOD to GND -------------------------------------------------------------UGATE to PHASE -------------------------------------------------------------------------------------------------------OC to GND -----------------------------------------------------------------------------------------------------------------LGATE to GND ------------------------------------------------------------------------------------------------------------PGND to GND -------------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C WQFN-16L 4x4 -----------------------------------------------------------------------------------------------------------WQFN-16L 3x3 -----------------------------------------------------------------------------------------------------------WQFN-14L 3.5x3.5 ------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) WQFN-16L 4x4, θJA ------------------------------------------------------------------------------------------------------WQFN-16L 4x4, θJC -----------------------------------------------------------------------------------------------------WQFN-16L 3x3, θJA ------------------------------------------------------------------------------------------------------WQFN-16L 3x3, θJC -----------------------------------------------------------------------------------------------------WQFN-14L 3.5x3.5, θJA -------------------------------------------------------------------------------------------------WQFN-14L 3.5x3.5, θJC ------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Mode) ---------------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------------ Recommended Operating Conditions −0.3V to 32V −0.3V to 38V −6V to 0.3V −0.3V to 6V −0.3V to 6V −0.3V to 32V −0.3V to 6V −0.3V to 0.3V 1.852W 1.471W 1.667W 54°C/W 7°C/W 68°C/W 7.5°C/W 60°C/W 7°C/W 260°C 150°C −65°C to 150°C 2kV 200V (Note 4) Input Voltage, VIN ---------------------------------------------------------------------------------------------------------Supply Voltage, VDD, VDDP ---------------------------------------------------------------------------------------------Junction Temperature Range -------------------------------------------------------------------------------------------Ambient Temperature Range -------------------------------------------------------------------------------------------- 4.5V to 26V 4.5V to 5.5V −40°C to 125°C −40°C to 85°C Electrical Characteristics (VDD = VDDP = 5V, VIN = 15V, VOUT = 1.25V, EN/DEM = VDD, RTON = 1MΩ, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit PWM Controller Quiescent Supply Current VDD + VDDP, FB = 0.8V -- -- 1250 A TON Operating Current RTON = 1M -- 15 -- A Shutdown Current ISHDN VDD + VDDP -- 1 10 A TON -- 1 5 A 10 1 -- A EN/DEM = 0V Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS8202/A/B-07 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT8202/A/B Parameter Min Typ Max Unit 0.742 0.75 0.758 V 1 0.1 1 A 0.75 -- 3.3 V 267 334 401 ns 250 400 550 ns EN/DEM = GND -- 20 -- ILIM Source Current LGATE = High 18 20 22 A Current Comparator Offset GND OC 10 -- 10 mV 2.5 -- 10 k GND PHASE, EN/DEM = 5V 10 -- 5 mV GND PHASE, RILIM = 2.5k 35 50 65 GND PHASE, RILIM = 10k 170 200 230 60 70 80 % FB Reference Voltage Symbol VFB FB Input Bias Current Output Voltage Range Test Conditions VDD = 4.5 to 5.5V FB = 0.75V VOUT On-Time VIN = 15V, VOUT = 1.25V, RTON = 1M Minimum Off-Time VOUT Shutdown Discharge Resistance Current Sensing Current Limit Setting Range RILIM Zero Crossing Threshold Fault Protection Current Limit Sense Voltage VRILIM Output UV Threshold mV OVP Threshold With respect to error comparator threshold 10 15 20 % OV Fault Delay FB forced above OV threshold -- 20 -- s 4.1 4.3 4.5 V -- 1.35 -- ms -- 3.1 -- ms Thermal Shutdown -- 155 -- °C Thermal Shutdown Hysteresis -- 10 -- °C BOOT PHASE = 5V -- 1.5 5 RUGATEsk BOOT PHASE = 5V -- 1.5 5 VDD UVLO Threshold Soft-Start Ramp Time UV Blank Time Rising edge, Hysteresis = 20mV, PWM disabled below this level From EN high to internal VREF reach 0.71V (095%) From EN signal going high Driver On-Resistance UGATE Driver Pull Up UGATE Driver Sink LGATE Driver Pull Up LGATE, High State (Source) -- 1.5 5 LGATE Driver Pull Down LGATE, Low State (Sink) -- 0.6 2.5 UGATE Driver Source/Sink Current LGATE Driver Source Current UGATE PHASE = 2.5V, BOOT PHASE = 5V -- 1 -- A LGATE forced to 2.5V -- 1 -- A LGATE Driver Sink Current LGATE forced to 2.5V -- 3 -- A LGATE Rising (PHASE = 1.5V) -- 30 -- UGATE Rising -- 30 -- Dead Time ns Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS8202/A/B-07 April 2014 RT8202/A/B Parameter Symbol Test Conditions Min Typ Max Unit EN/DEM Logic Low Voltage -- -- 0.8 V EN/DEM Logic High Voltage 2.9 -- -- V EN/DEM Open -- 2 -- V EN/DEM = VDD -- 1 5 EN/DEM = 0 5 1 -- 13 10 7 % -- 2.5 -- s Logic I/O EN/DEM Floating Voltage Logic Input Current A PGOOD (upper side threshold decide by OV threshold) Trip Threshold (Falling) Fault Propagation Delay Measured at FB, with respect to reference, no load. Hysteresis = 3% Falling edge, FB forced below PGOOD trip threshold Output Low Voltage ISINK = 1mA -- -- 0.4 V Leakage Current High state, forced to 5.0V -- -- 1 A Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective four layers thermal conductivity test board of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS8202/A/B-07 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT8202/A/B Typical Operating Characteristics Efficiency vs. Output Current 90 275 Switching Frequency (kHz) 300 80 Efficiency (%) Switching Frequency vs. Output Current 100 DEM 70 PWM 60 50 40 30 20 10 0 0.001 0.1 1 PWM 225 200 175 150 DEM 125 100 75 50 25 VIN = 8V 0.01 250 VIN = 8V 0 0.001 10 0.01 Output Current (A) Efficiency vs. Output Current 275 Switching Frequency (kHz) 90 Efficiency (%) 80 DEM PWM 50 40 30 20 10 0 0.001 0.1 1 250 PWM 225 200 175 150 DEM 125 100 75 50 25 VIN = 12V 0.01 VIN = 12V 0 0.001 10 0.01 Output Current (A) Efficiency vs. Output Current 275 Efficiency (%) Switching Frequency (kHz) 90 DEM PWM 60 50 40 30 20 10 0 0.001 0.1 1 Output Current (A) Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 10 250 225 200 PWM 175 150 DEM 125 100 75 50 25 VIN = 24V 0.01 1 Switching Frequency vs. Output Current 300 70 0.1 Output Current (A) 100 80 10 Switching Frequency vs. Output Current 300 60 1 Output Current (A) 100 70 0.1 10 0 0.001 VIN = 24V 0.01 0.1 1 10 Output Current (A) is a registered trademark of Richtek Technology Corporation. DS8202/A/B-07 April 2014 RT8202/A/B Shutdown Current vs. Input Voltage Standby Current vs. Input Voltage 400 3.0 390 Shutdown Current (uA) Standby Current (uA) 380 370 360 350 340 330 320 310 300 290 2.5 2.0 1.5 1.0 0.5 EN = GND, No Load EN = 5V, No Load 280 0.0 7 9 11 13 15 17 19 21 23 7 25 9 11 13 15 17 19 Input Voltage (V) Input Voltage (V) Power On from EN Power On from EN PWM-Mode 21 23 25 DEM-Mode VOUT (1V/Div) VOUT (1V/Div) PHASE (10V/Div) PHASE (10V/Div) EN/DEM (2V/Div) EN/DEM (5V/Div) PGOOD (2V/Div) PGOOD (2V/Div) VIN = 12V, EN = Floating, No Load VIN = 12V, EN = 5V, No Load Time (800μs/Div) Time (800μs/Div) Power Off from EN VOUT Load Transient Response VOUT_ac (100mV/Div) VOUT (1V/Div) EN/DEM (2V/Div) I LOAD (5A/Div) UGATE (20V/Div) UGATE (20V/Div) LGATE (5V/Div) LGATE (5V/Div) VIN = 12V, EN = Floating, No Load Time (4ms/Div) Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS8202/A/B-07 April 2014 VIN = 12V, EN = Floating, IOUT = 0A to 6A Time (10μs/Div) is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT8202/A/B OVP UVP VOUT (1V/Div) VOUT (1V/Div) I LOAD (20A/Div) UGATE (10V/Div) UGATE (20V/Div) LGATE (5V/Div) LGATE (5V/Div) VIN = 12V, EN = 5V, No Load Time (40μs/Div) VIN = 12V, EN = Floating, No Load Time (20μs/Div) Power On in Short Condition VOUT (1V/Div) I LOAD (10A/Div) UGATE (20V/Div) LGATE (5V/Div) VIN = 12V, EN = Floating, VOUT Short Time (800μs/Div) Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS8202/A/B-07 April 2014 RT8202/A/B Application Information The RT8202/A/B PWM controller provides high efficiency, excellent transient response, and high DC output accuracy needed for stepping down high voltage batteries to generate low voltage CPU core, I/O, and chipset RAM supplies in notebook computers. Richtek Mach ResponseTM technology is specifically designed for providing 100ns “instant-on” response to load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. The topology circumvents the poor load transient timing problems of fixed-frequency current mode PWMs while avoiding the problems caused by widely varying switching frequencies in conventional constant-on-time and constantoff-time PWM schemes. The DRV TM mode PWM modulator is specifically designed to have better noise immunity for such a single output application. PWM Operation The Mach ResponseTM, DRVTM mode controller relies on the output filter capacitor's effective series resistance (ESR) to act as a current sense resistor, so the output ripple voltage provides the PWM ramp signal. Refer to the function diagrams of RT8202/A/B, the synchronous high side MOSFET is turned on at the beginning of each cycle. After the internal one-shot timer expires, the MOSFET is turned off. The pulse width of this one shot is determined by the converter's input and output voltages to keep the frequency fairly constant over the input voltage range. Another one-shot sets a minimum off-time (400ns typ.). On-Time Control (TON) The on-time one-shot comparator has two inputs. One input monitors the output voltage, while the other input samples the input voltage and converts it to a current. This input voltage proportional current is used to charge an internal on-time capacitor. The on-time is the time required for the voltage on this capacitor to charge from zero volts to VOUT, thereby making the on-time of the high side switch directly proportional to output voltage and inversely proportional to input voltage. The implementation results in a nearly constant switching frequency without the need a clock generator. And then the switching frequency is : Frequency = VOUT / (VIN x TON) RTON is a resistor connected from the input supply (VIN) to TON pin. Mode Selection (EN/DEM) Operation The EN/DEM pin enables the supply. When EN/DEM is tied to VDD, the controller is enabled and operates in diode-emulation mode. When the EN/DEM pin is floating, the RT8202/A/B will operate in forced-CCM mode. Diode-Emulation Mode (EN/DEM = High) In diode-emulation mode, RT8202/A/B automatically reduces switching frequency at light-load conditions to maintain high efficiency. This reduction of frequency is achieved smoothly and without increasing VOUT ripple or load regulation. As the output current decreases from heavy-load condition, the inductor current is also reduced, and eventually comes to the point that its valley touches zero current, which is the boundary between continuous conduction and discontinuous conduction modes. By emulation the behavior of diodes, the low-side MOSFET allows only partial of negative current when the inductor freewheeling current reach negative. As the load current is further decreased, it takes longer and longer to discharge the output capacitor to the level than requires the next “ON” cycle. The on-time is kept the same as that in the heavy-load condition. In reverse, when the output current increases from light load to heavy load, the switching frequency increases to the preset value as the inductor current reaches the continuous condition. The transition load point to the light load operation can be calculated as follows (Figure 3) : ILOAD (VIN VOUT ) TON 2L where TON is On-time. TON = 3.85p x RTON x VOUT / (VIN − 0.5) Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS8202/A/B-07 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT8202/A/B IL IL Slope = (V IN -V OUT) / L IL, peak iL, peak ILoad ILIM iLoad = iL, peak / 2 0 tON t 0 t Figure 4. Valley Current-Limit Figure 3. Boundary Condition of CCM/DEM The switching waveforms may appear noisy and asynchronous when light loading causes diode-emulation operation, but this is a normal operating condition that results in high light-load efficiency. Trade-offs in DEM noise vs. light-load efficiency are made by varying the inductor value. Generally, low inductor values produce a broader efficiency vs. load curve, while higher values result in higher full-load efficiency (assuming that the coil resistance remains fixed) and less output voltage ripple. The disadvantages for using higher inductor values include larger physical size and degrades load-transient response (especially at low input voltage levels). Current sensing of the RT8202/A/B can be accomplished in two ways. Users can either use a current sense resistor or the on-state of the low side MOSFET (RDS(ON)). For resistor sensing, a sense resistor is placed between the source of low-side MOSFET and PGND (Figure 5(a)). RDS(ON) sensing is more efficient and less expensive (Figure 5(b)). There is a compromise between current-limit accuracy and sense resistor power dissipation. PHASE PHASE LGATE LGATE OC RILIM RILIM Forced-CCM Mode (EN/DEM = floating) The low noise, forced-CCM mode (EN/DEM = floating) disables the zero-crossing comparator, which controls the low-side switch on-time. This causes the low side gatedrive waveform to become the complement of the high side gate-drive waveform. This in turn causes the inductor current to reverse at light loads as the PWM loop to maintain a duty ratio VOUT/VIN. The benefit of forced-CCM mode is to keep the switching frequency fairly constant, but it comes at a cost : The no-load battery current can be up to 10mA to 40mA, depending on the external MOSFETs. Current Limit Setting (OCP) RT8202/A/B has cycle-by-cycle current limiting control. The current limit circuit employs a unique “valley” current sensing algorithm. If the magnitude of the current-sense signal at OC is above the current limit threshold, the PWM is not allowed to initiate a new cycle (Figure 4). Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 OC (a) (b) Figure 5. Current-Sense Methods In both cases, the RILIM resistor between the OC pin and PHASE pin sets the over current threshold. This resistor RILIM is connected to a 20μA current source within the RT8202/A/B which is turned on when the low side MOSFET turns on. When the voltage drop across the sense resistor or low side MOSFET equals the voltage across the RILIM resistor, positive current limit will activate. The high side MOSFET will not be turned on until the voltage drop across the sense element (resistor or MOSFET) falls below the voltage across the RILIM resistor. Choose a current limit resistor by following Equation : RILIM = ILIMIT x RSENSE / 20μA Carefully observe the PC board layout guidelines to ensure that noise and DC errors do not corrupt the current-sense signal seen by OC and PGND. Mount the IC close to the is a registered trademark of Richtek Technology Corporation. DS8202/A/B-07 April 2014 RT8202/A/B low-side MOSFET and sense resistor with short, direct traces, making a Kelvin sense connection to the sense resistor. MOSFET Gate Driver (UGATE, LGATE) The high side driver is designed to drive high current, low RDS(ON) N-MOSFET(s). When configured as a floating driver, 5V bias voltage is delivered from VDDP supply. The average drive current is proportional to the gate charge at VGS = 5V times switching frequency. The instantaneous drive current is supplied by the flying capacitor between BOOT and PHASE pins. tolerances once more. In soft start, PGOOD is actively held low and is allowed to transition high until soft start is over and the output reaches 93% of its set voltage. There is a 2.5μs delay built into PGOOD circuitry to prevent false transition. POR, UVLO and Soft-Start Power on reset (POR) occurs when VDD rises above to approximately 4.3V, the RT8202/A/B will reset the fault latch and preparing the PWM for operation. Below 4.1V(MIN), the VDD under voltage-lockout (UVLO) circuitry inhibits switching by keeping UGATE and LGATE low. A dead time to prevent shoot through is internally generated between high side MOSFET off to low side MOSFET on, and low side MOSFET off to high side MOSFET on. A built-in soft-start is used to prevent surge current from power supply input after EN/DEM is enabled. It clamps the ramping of internal reference voltage which is compared with FB signal. The typical soft-start duration is 1.35ms. The low side driver is designed to drive high current, low RDS(ON) N-MOSFET(s). The internal pull-down transistor that drives LGATE low is robust, with a 0.6Ω typical onresistance. A 5V bias voltage is delivered form VDDP supply. The instantaneous drive current is supplied by the flying capacitor between VDDP and PGND. Furthermore, the maximum allowed current limit is segment in 2 steps during 1.35ms period. For high current applications, some combinations of high and low side MOSFETs might be encountered that will cause excessive gate-drain coupling, which can lead to efficiency killing, EMI producing shoot through currents. This is often remedied by adding a resistor in series with BOOT, which increases the turn-on time of the high side MOSFET without degrading the turn-off time (Figure 6). +5V BOOT V IN R UGATE PHASE Figure 6. Reducing the UGATE Rise Time Power Good Output (PGOOD) The power good output is an open-drain output and requires a pull up resistor. When the output voltage is 15% above or 10% below its set voltage, PGOOD gets pulled low. It is held low until the output voltage returns to within these Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS8202/A/B-07 April 2014 Output Over Voltage Protection (OVP) The output voltage can be continuously monitored for over voltage protection. When the output voltage exceeds 15% of the its set voltage threshold, over voltage protection is triggered and the low side MOSFET is latched on. This activates the low side MOSFET to discharge the output capacitor. RT8202/A/B is latched once OVP is triggered and can only be released by VDD or EN/DEM power on reset. There is 20us delay built into the over voltage protection circuit to prevent false transitions. Output Under Voltage Protection (UVP) The output voltage can be continuously monitored for under voltage protection. When the output voltage is less than 70% of its set voltage threshold, under voltage protection is triggered and then both UGATE and LGATE gate drivers are forced low. In order to remove the residual charge on the output capacitor during the under voltage period, if PHASE is greater than 1V, the LGATE is forced high until PHASE is lower than 1V. There is 2.5us delay built into the under voltage protection circuit to prevent false transitions. During soft-start, the UVP will be blanked around 3.1ms. is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT8202/A/B V IN Output Voltage Setting (FB) The output voltage can be adjusted from 0.75V to 3.3V by setting the feedback resistor R1 and R2 (Figure 7). Choose R2 to be approximately 10kΩ, and solve for R1 using the equation: V OUT UGATE PHASE Z1 BOOT C1 R1 C2 VOUT VOUT = VFB 1 R1 R2 FB R2 where VFB is 0.75V. GND Note that in order for the device to regulate in a controlled manner, the ripple content at the feedback pin, VFB, should be approximately 15mV at minimum VBAT, and worst case no smaller than 10mV. If Vripple at minimum VBAT is less than 15mV, the above component values should be revisited in order to improve this. Quite often a small capacitor, C1, is required in parallel with the top feedback resistor, R1, in order to ensure that VFB is large enough. The value of C1 can be calculated as follows, where R2 is the bottom feedback resistor. R2 V ripple_VBAT(MIN) 0.015 0.015 Secondly calculating the value of C1 required to achieve this : C1 = Z11 R11 2 fSW_VBAT(MIN) For application that output voltage is higher than 3.3V, user can also use a voltage divider to keep VOUT pin voltage within 0.75V to 2.8V as shown in Figure 8. For this case, TON can be determined as below : RTON VOUT_FB If RTON < 2M then TON = 3.85p VIN 0.5 RTON VOUT_FB If RTON 2M then TON = 3.55p VIN 0.4 Where RTON is TON set resistor and the VOUT_FB is the output signal of resistor divider. Since the switching frequency is Firstly calculating the value of Z1 required : Z1 = Figure 7. Setting The Output Voltage FS = VOUT VIN TON For a given switching frequency, we can obtain the RTON as below If RTON < 2M then F RTON = Finally using the equation as follows to verify the value of VFB : R2 1 R2+ 1 2 f SW_VBAT(MIN) C1 R1 If RTON 2M then RTON = VFB_VBAT(MIN) = Vripple_VBAT(MIN) VOUT 0.5 VOUT 1 VIN VOUT_FB FS 3.85p VOUT 0.4 VOUT 1 VIN VOUT_FB FS 3.55p V IN V VIN R TON V OUT UGATE PHASE BOOT where Vripple_VBAT(MIN) is the output ripple voltage in minimum VBAT; VOUT fsw_VBAT(MIN) is the switching frequency in minimum VBAT; FB VFB_VBAT(MIN) is the ripple voltage into FB pin in minimum VBAT. GND R3 V OUT_FB R1 C2 R4 R2 Figure 8. Output Voltage Setting for VOUT > 3.3V Application Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 is a registered trademark of Richtek Technology Corporation. DS8202/A/B-07 April 2014 RT8202/A/B Output Inductor Selection The switching frequency (on-time) and operating point (% ripple or LIR) determine the inductor value as follows : L= TON (VIN - VOUT ) LIR ILOAD(MAX) Find a low pass inductor having the lowest possible DC resistance that fits in the allowed dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200kHz. The core must be large enough and not to saturate at the peak inductor current (IPEAK) : IPEAK = ILOAD(MAX) + [(LIR / 2) x ILOAD(MAX)] Output Capacitor Selection The output filter capacitor must have ESR low enough to meet output ripple and load transient requirement, yet have high enough ESR to satisfy stability requirements. Also, the capacitance value must be high enough to absorb the inductor energy going from a full load to no load condition without tripping the OVP circuit. For CPU core voltage converters and other applications where the output is subject to violent load transient, the output capacitor's size depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance : ESR VP-P ILOAD(MAX) In non-CPU applications, the output capacitor's size depends on how much ESR is needed to maintain at an acceptable level of output voltage ripple : ESR VP-P LIR ILOAD(MAX) Organic semiconductor capacitor(s) or specially polymer capacitor(s) are recommended. Output Capacitor Stability Stability is determined by the value of the ESR zero relative to the switching frequency. The point of instability is given by the following equation : fESR = Do not put high value ceramic capacitors directly across the outputs without taking precautions to ensure stability. Large ceramic capacitors can have a high ESR zero frequency and cause erratic and unstable operation. However, it is easy to add sufficient series resistance by placing the capacitors a couple of inches downstream from the inductor and connecting VOUT or FB divider close to the inductor. There are two related but distinct ways including double pulsing and feedback loop instability to identify the unstable operation. Double-pulsing occurs due to noise on the output or because the ESR is too low that there is not enough voltage ramp in the output voltage signal. The “fools” the error comparator into triggering a new cycle immediately after 400ns minimum off-time period has expired. Doublepulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. However, it may indicate the possible presence of loop instability, which is caused by insufficient ESR. Loop instability can result in oscillation at the output after line or load perturbations that can trip the over voltage protection latch or cause the output voltage to fall below the tolerance limit. The easiest method for stability checking is to apply a very zero-to-max load transient and carefully observe the output-voltage-ripple envelope for overshoot and ringing. It helps to simultaneously monitor the inductor current with AC probe. Do not allow more than one ringing cycle after the initial step-response under- or over-shoot. Thermal Considerations For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) − TA ) / θJA f 1 SW 2 ESR COUT 4 Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS8202/A/B-07 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 15 RT8202/A/B Where T J(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. The junction to ambient thermal resistance θJA is layout dependent. For WQFN-16L 3x3 packages, the thermal resistance θJA is 68°C/W on the standard JEDEC 51-7 four layers thermal test board. For WQFN-14L 3.5x3.5 package, the thermal resistance θJA is 60°C/W on the standard JEDEC 51-7 four layers thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : Layout Considerations Layout is very important in high frequency switching converter design. If designed improperly, the PCB could radiate excessive noise and contribute to the converter instability. Certain points must be considered before starting a layout for RT8202/A/B. Connect RC low pass filter from VDDP to VDD, 1uF and 10Ω are recommended. Place the filter capacitor close to the IC. Keep current limit setting network as close as possible to the IC. Routing of the network should avoid coupling to high voltage switching node. Connections from the drivers to the respective gate of the high side or the low side MOSFET should be as short as possible to reduce stray inductance. All sensitive analog traces and components such as VOUT, FB, GND, EN/DEM, PGOOD, OC, VDD, and TON should be placed away from high voltage switching nodes such as PHASE, LGATE, UGATE, or BOOT nodes to avoid coupling. Use internal layer(s) as ground plane(s) and shield the feedback trace from power traces and components. Current sense connections must always be made using Kelvin connections to ensure an accurate signal, with the current limit resistor located at the device. Power sections should connect directly to ground plane(s) using multiple vias as required for current handling (including the chip power ground connections). Power components should be placed to minimize loops and reduce losses. P D(MAX) = (125°C − 2°C) / (68°C/W) = 1.471W for WQFN-16L 3x3 packages PD(MAX) = (125°C − 25°C) / (54°C/W) = 1.852W for WQFN-16L 4x4 packages PD(MAX) = (125°C − 25°C) / (60°C/W) = 1.667W for WQFN-14L 3.5x3.5 packages The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 9 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. Maximum Power Dissipation (W) 2.0 Four Layer PCB 1.8 1.6 WQFN -16L 4x4 1.4 WQFN -14L 3.5x3.5 1.2 1.0 WQFN -16L 3x3 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 9. Derating Curve of Maximum Power Dissipation Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 16 is a registered trademark of Richtek Technology Corporation. DS8202/A/B-07 April 2014 RT8202/A/B Outline Dimension D SEE DETAIL A D2 L 1 E E2 b e A A1 1 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options A3 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 2.950 3.050 0.116 0.120 D2 1.300 1.750 0.051 0.069 E 2.950 3.050 0.116 0.120 E2 1.300 1.750 0.051 0.069 e L 0.500 0.350 0.020 0.450 0.014 0.018 W-Type 16L QFN 3x3 Package Copyright © 2014 Richtek Technology Corporation. All rights reserved. DS8202/A/B-07 April 2014 is a registered trademark of Richtek Technology Corporation. www.richtek.com 17 RT8202/A/B D SEE DETAIL A D2 L 1 E E2 b e A A1 1 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options A3 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.250 0.380 0.010 0.015 D 3.950 4.050 0.156 0.159 D2 2.000 2.450 0.079 0.096 E 3.950 4.050 0.156 0.159 E2 2.000 2.450 0.079 0.096 e L 0.650 0.500 0.026 0.600 0.020 0.024 W-Type 16L QFN 4x4 Package Copyright © 2014 Richtek Technology Corporation. All rights reserved. www.richtek.com 18 is a registered trademark of Richtek Technology Corporation. DS8202/A/B-07 April 2014 RT8202/A/B 1 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 3.400 3.600 0.134 0.142 D2 1.950 2.150 0.077 0.085 E 3.400 3.600 0.134 0.142 E2 1.950 2.150 0.077 0.085 e 0.500 0.020 e1 1.500 0.060 L 0.300 0.500 0.012 0.020 W-Type 14L QFN 3.5x3.5 Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. DS8202/A/B-07 April 2014 www.richtek.com 19