AN4273 Application note STEVAL-ISA114V1: 5 V/0.8 W 30 kHz buck with the VIPer06XS Introduction This document describes a 5 V-0.16 A power supply set in buck topology with the VIPer06XS, a new offline high voltage converter by STMicroelectronics, specifically developed for non-isolated SMPS. The features of the device include: • 800 V avalanche rugged power section • PWM operation at 30 kHz with frequency jittering for lower EMI • Limiting current with adjustable set point • On-board soft-start • Safe auto-restart after a fault condition and low standby power consumption The available protection includes thermal shutdown with hysteresis, delayed overload protection and open loop failure protection. All protections are in auto-restart mode. Figure 1. STEVAL- ISA114V1 demonstration board AM16668v1 December 2014 DocID024355 Rev 2 1/29 www.st.com Contents AN4273 Contents 1 Adapter features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Testing the board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 7 5.1 Typical waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.2 Line/load regulation and output voltage ripple . . . . . . . . . . . . . . . . . . . . . . 9 5.3 Burst mode and output voltage ripple . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.4 Efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.5 Light load performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Functional check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.1 Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6.2 Overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Feedback loop calculation guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.1 Transfer function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.2 Compensation procedure for a DCM buck . . . . . . . . . . . . . . . . . . . . . . . . 18 8 Thermal measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9 EMI measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Appendix A Test equipment and measurement of efficiency and light load performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 A.1 10 Measuring input power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 2/29 DocID024355 Rev 2 AN4273 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. STEVAL- ISA114V1 demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Layout (top). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Layout (bottom). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Waveforms at VIN = 115 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Waveforms at VIN = 230 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Waveforms at VIN = 80 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Waveforms at VIN = 265 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Line regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Output voltage ripple at 115 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Output voltage ripple at 230 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Output voltage ripple at 115 VAC, no load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Output voltage ripple at 230 VAC, no load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Active mode efficiency vs. VIN and comparison with CoC4 and DOE . . . . . . . . . . . . . . . . 11 PIN vs. VIN @ no load and light load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 PIN @ POUT = 0.25 W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Startup at VIN = 115 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Startup at VIN = 115 VAC, full load, zoom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Startup at VIN = 230 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Startup at VIN = 230 VAC, full load, zoom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Output short-circuit applied: OLP tripping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Output short-circuit maintained: OLP steady-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Output short-circuit maintained: OLP steady-state (zoom) . . . . . . . . . . . . . . . . . . . . . . . . . 16 Output short-circuit removal and converter restart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Control loop block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Thermal measurement @ VIN = 80 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Thermal measurement @ VIN = 115 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Thermal measurement @ VIN = 230 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Thermal measurement @ VIN = 265 VAC, full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Average measurement at full load, 115 VAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Average measurement at full load, 230 VAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Connections of the UUT to the wattmeter for power measurements . . . . . . . . . . . . . . . . . 24 Switch in position 1 - setting for standby measurements . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Switch in position 2 - setting for efficiency measurements . . . . . . . . . . . . . . . . . . . . . . . . . 25 DocID024355 Rev 2 3/29 Adapter features 1 AN4273 Adapter features The electrical specifications of the demonstration board are listed in Table 1 Table 1. Electrical specifications Parameter Symbol Value VIN [80 VAC; 265 VAC] Output voltage VOUT 5V Max. output current IOUT 0.16 A Precision of output regulation ΔVOUT_LF ±5% High frequency output voltage ripple ΔVOUT_HF 50 mV Max. ambient operating temperature TAMB 60 ºC Input voltage range 2 Circuit description The converter schematic is given in Figure 2. The input section includes a resistor R1 for inrush current limiting, a diode D1 and a Pi filter (C1, L1, C2) for rectification and EMC suppression. The FB pin is the inverting input of the internal transconductance error amplifier, internally referenced to 3.3 V. This allows the output voltage value to be set in a simple way through the R4-R5 voltage divider between the output terminal and the FB pin, according to the following equation: Equation 1 R5 V OUT = 3.3V ⋅ 1 + -------- R4 where R4 has been split into R4a and R4b; and R5 into R5a and R5b so to allow a better tuning of the output voltage value. The compensation network is connected between the COMP pin (which is the output of the error amplifier) and the GND pin and is made up of Cc, R3 and C7. The bleeder resistor Rbl provides about 1 mA minimum load, in order to avoid overvoltage when the output load is disconnected. Its value is a trade-off between output voltage increase and power consumption rise in no load. At power-up the DRAIN pin supplies the internal HV startup current generator which charges the C3 capacitor up to VDDon (13 V typical). At this point, the power MOSFET starts switching, the generator is turned off and the IC is powered by the energy stored in C3, waiting for VOUT reaches its steady-state value. In this demonstration board, the IC is biased through the internal high voltage startup current generator, which is automatically turned on as the VDD voltage drops down to VDDCSon and switched off as VDD is charged up to VDDon. 4/29 DocID024355 Rev 2 AN4273 Circuit description This is referred to "self-biasing" and leads to higher power dissipation, but reduces the overall BOM cost. Figure 2. Application schematic AC IN R1 D1 L1 R5a R5b DRAIN DRAIN DRAINDRAIN DRAIN R4a C8 VIPer06XS C1 D3 C2 GND VDD LIM FB COMP R4b CFB C3 Cf Cc R6 C7 D4 GND R3 L2 Vout C9 Rbl GND AM16669v1 DocID024355 Rev 2 5/29 Bill of material 3 AN4273 Bill of material Table 2. Bill of material 6/29 Name Value Description C1 2.2 µF, 400 V Electrolytic capacitor Saxon C2 2.2 µF, 400 V Electrolytic capacitor Saxon C3 2.2 µF, 25 V Ceramic capacitor SMD: 0805 CFB not mounted Ceramic capacitor SMD: 0805 Cf 100 nF, 50 V Ceramic capacitor SMD: 0805 Cc n.c Ceramic capacitor SMD: 0805 C7 22 nF, 25 V Ceramic capacitor SMD: 0805 Murata C8 100 nF, 50 V Ceramic capacitor SMD: 0805 Murata C9 100 µF, 25 V Electrolytic capacitor D1 1N4007 High voltage rectifier DO-41 Fairchild D3 STTH1L06 High voltage ultra fast rectifier SMB (SOD87) ST D4 STTH1L06 High voltage ultra fast rectifier SMB (SOD87) ST Daux not mounted Small signal diode IC VIPer06XS High voltage converter SSO-10 ST L1 1 mH Input filter inductor SMD Epcos L2 RFB0810-681 0.68 mH power inductor Coilcraft R1 22 ohm 1 W resistor Panasonic R3 1 kohm, 1% 1/4 W resistor SMD: 0805 Panasonic R4a 1.5 kohm, 1% 1/4 W resistor SMD: 0805 Panasonic R4b 22 kohm 1/4 W resistor SMD: 0805 R5a 15 kohm 1/4 W resistor SMD: 0805 R5b 0 ohm, 1% 1/4 W resistor SMD: 0805 R6 not mounted 1/4 W resistor SMD: 0805 Rbl 10 kohm, 1% 1/4 W resistor SMD: 0805 DocID024355 Rev 2 Footprint Manufacturer Murata Murata Rubycon, ZL series Panasonic Panasonic AN4273 4 Layout Layout Figure 3. Layout (top) AM16670v1 Figure 4. Layout (bottom) AM16671v1 DocID024355 Rev 2 7/29 Testing the board AN4273 5 Testing the board 5.1 Typical waveforms GND voltage and the current across the inductor L2 (I_L2) in full load condition are shown for the two nominal input voltages in Figure 5 and Figure 6, and for minimum and maximum input voltage in Figure 7 and Figure 8 respectively. Figure 5. Waveforms at VIN = 115 VAC, full load I_L2 Figure 6. Waveforms at VIN = 230 VAC, full load I_L2 AM16673v1 AM16672v1 Figure 7. Waveforms at VIN = 80 VAC, full load I_L2 Figure 8. Waveforms at VIN = 265 VAC, full load I_L2 AM16674v1 8/29 DocID024355 Rev 2 AM16675v1 AN4273 Testing the board 5.2 Line/load regulation and output voltage ripple The output voltage of the board has been measured in different lines and load conditions. The results are shown in Figure 9 and Figure 10. Figure 10. Load regulation Line regulation 7 6.8 6.6 6.4 6.2 6 5.8 5.6 5.4 5.2 5 4.8 4.6 0 25% 50% 75% 100% 80 105 130 155 180 VIN[V AC ] 205 230 255 VOUT [V] VOUT [V] Figure 9. Line regulation Load regulation 7 6.8 6.6 6.4 6.2 6 5.8 5.6 5.4 5.2 5 4.8 4.6 AM16676v1 90 115 230 265 0 0.05 0.1 0.15 IOUT [A] AM16677v1 The output voltage ripple in full load condition is shown in Figure 11 at VIN = 115 VAC and Figure 12 at VIN = 230 VAC. Figure 11. Output voltage ripple at 115 VAC, full Figure 12. Output voltage ripple at 230 VAC, full load load AM16778v1 DocID024355 Rev 2 AM16679v1 9/29 Testing the board 5.3 AN4273 Burst mode and output voltage ripple When the converter is lightly loaded, the COMP pin voltage decreases. As it reaches the shutdown threshold, VCOMPL (1.1 V, typical), the switching is disabled and no more energy is transferred to the secondary side. So, the output voltage decreases and the regulation loop makes the COMP pin voltage increase again. As it rises 40 mV above the VCOMPL threshold, the normal switching operation is resumed. This results in a controlled on/off operation (referred to as "burst mode”) as long as the output power is so low that it requires a turn-on time lower than the minimum turn-on time of the VIPER06XS. This mode of operation keeps the frequency-related losses low when the load is very light or disconnected, making it easier to comply with energy-saving regulations. The figures below show the output voltage ripple when the converter is no/lightly loaded and supplied with 115 VAC and with 230 VAC respectively. Figure 13. Output voltage ripple at 115 VAC, no load Figure 14. Output voltage ripple at 230 VAC, no load AM16680v1 5.4 AM16681v1 Efficiency The active mode efficiency is defined as the average of the efficiencies measured at 25%, 50%, 75% and 100% of maximum load, at nominal input voltage (VIN = 115 VAC and VIN = 230 VAC). External power supplies (the power supplies which are contained in a separate housing from the end-use devices they are powering) need to comply with the Code of Conduct, version 4 “Active Mode Efficiency” criterion, which states an active mode efficiency higher than 54.4% for a power throughput of 0.8 W. Another standard to be applied to external power supplies in the coming years is the DOE (department of energy) recommendation, whose active mode efficiency requirement for the same power throughput is 58.9%. In Figure 15 the average efficiencies of the board at 115 VAC (57.4%) and at 230 VAC (45.9%) are represented by dotted lines, and, along with the above limits, show that the STEVAL-ISA114V1 demonstration board is compliant with Code of Conduct (version 4) only 10/29 DocID024355 Rev 2 AN4273 Testing the board at 115 VAC and is not compliant with DOE. In the same figure the efficiency at 25%, 50%, 75% and 100% of maximum load for both input voltages is also shown. Such a low efficiency is due to the high consumption from the HV startup, which increases losses especially at high line. eff [%] Figure 15. Active mode efficiency vs. VIN and comparison with CoC4 and DOE 66 64 62 60 58 56 54 52 50 48 46 44 42 40 38 36 34 32 30 DOE limit CoC 4 limit 115 230 av @ 115 Vac av @ 230 Vac 0.2 0.4 0.6 0.8 IOUT [% IOUT] 1 AM16682v1 5.5 Light load performance The input power of the converter has been measured in no load condition for different input voltages and the results are reported in Table 3. Table 3. No load input power VIN [VAC] PIN [mW] 90 65 115 81 150 104 180 121 230 152 265 174 DocID024355 Rev 2 11/29 Testing the board AN4273 In version 4 of the Code of Conduct, the power consumption of the power supply, when it is no loaded, is also considered. The criteria to be compliant with are reported in Table 4: Table 4. Energy consumption criteria for no load Nameplate output power (Pno) Maximum power in no load for AC-DC EPS 0 to ≤ 50 W < 0.3 W > 50 W < 250 W < 0.5 W The power consumption of the presented board is about two times lower than the limit fixed by version 4 of the Code of Conduct. It is worth noting that often AC-DC adapter or battery charger manufacturers have very strict requirements about no load consumption and if the converter is used as an auxiliary power supply, the line filter is often the main line filter of the entire power supply which greatly increases the standby consumption. Even though version 4 of the Code of Conduct does not have other requirements regarding light load performance, in order to give a more complete overview, the consumption of the demonstration board in two other light load cases (POUT = 25 mW and POUT = 50 mW) has also been measured. The results versus line voltage are plotted in Figure 16, together with the no load measurements reported in Table 3. Figure 16. PIN vs. VIN @ no load and light load 800 0 PIN [mW] 700 25mW 600 50mW 500 400 300 200 100 0 80 105 130 155 180 VIN [VAC ] 205 230 255 AM16883v1 The consumption of the demonstration board when the output is 250 mW is shown, in the entire input voltage range in Figure 17. 12/29 DocID024355 Rev 2 AN4273 Testing the board Figure 17. PIN @ POUT = 0.25 W 0.7 0.65 PIN [W] 0.6 0.55 0.5 0.45 0.4 80 110 140 170 VIN [VAC] DocID024355 Rev 2 200 230 260 AM16884v1 13/29 Functional check AN4273 6 Functional check 6.1 Startup The startup phase at maximum load is shown in Figure 18 and Figure 20 at both nominal input voltages (115 VAC and 230 VAC). Figure 18. Startup at VIN = 115 VAC, full load Figure 19. Startup at VIN = 115 VAC, full load, zoom I_L2 AM16685v1 Figure 20. Startup at VIN = 230 VAC, full load AM16686v1 Figure 21. Startup at VIN = 230 VAC, full load, zoom I_L2 AM16687v1 14/29 DocID024355 Rev 2 AM16688v1 AN4273 Functional check 6.2 Overload protection In case of overload or short-circuit (see Figure 22), the drain current reaches the IDLIM value. In every cycle where this condition is met, a counter is incremented; if it is maintained continuously for the time tOVL (50 msec typical, internally set) the overload protection is tripped, the power section is turned off and the converter is disabled for a tRESTART time (1 sec typical). After this time has elapsed, the IC resumes switching and, if the short is still present, the protection occurs indefinitely in the same way (Figure 23). This ensures restart attempts of the converter with low repetition rate, so that it works safely with extremely low power throughput and avoids the IC overheating in case of repeated overload events. Moreover, every time the protection is tripped, the internal soft-start function is implemented, in order to reduce the stress on the secondary diode. After the short removal, the IC resumes working normally. If the short is removed during tSS or tOVL, before the protection tripping, the counter is decremented on a cycle-by-cycle basis down to zero and the protection is not tripped. If the short-circuit is removed during tRESTART, the IC must wait for the tRESTART period to elapse before switching is resumed (Figure 25). Figure 22. Output short-circuit applied: OLP tripping Figure 23. Output short-circuit maintained: OLP steady-state Output is shorted here Normal operation tRESTART tOVL I_L2 tRESTART I_L2 AM16689v1 DocID024355 Rev 2 AM16690v1 15/29 Functional check AN4273 Figure 24. Output short-circuit maintained: OLP steady-state (zoom) Figure 25. Output short-circuit removal and converter restart Output short is removed here tOVL tRESTART I_L2 I_L2 AM16692v1 16/29 Normal operation DocID024355 Rev 2 AM16693v1 AN4273 Feedback loop calculation guidelines 7 Feedback loop calculation guidelines 7.1 Transfer function The set PWM modulator + power stage is indicated with G1(f), while C(f) is the "controller", the network in charge of ensuring the stability of the system. Figure 26. Control loop block diagram ∆ V OUT ∆δ ∆ V OUT ∆δ G1(f) ∆δ C(f) 1/HCOMP ∆ V COMP ∆ V COMP ∆ V OUT AM16764v1 The mathematical expression of the power plant G1(f) in DCM is the following: Equation 2 j⋅f 1 + ------ΔV OUT fz G1 ( f ) = ------------------ = G10 ⋅ ----------------Δ∂ j⋅f 1 + ------fp where fz is the zero due to the ESR of the output capacitor: Equation 3 1 fz = -----------------------------------------------2 ⋅ π ⋅ C OUT ⋅ ESR and fp is the pole due to the output load Equation 4 1 + β ⋅ R OUT fp = ------------------------------------------------------------------------------------------------------------------------2 ⋅ π ⋅ C OUT ⋅ ( ESR + R OUT + ESR ⋅ β ⋅ R OUT ) with: Equation 5 V IN + Vγ Ipk α = -------------------------------- ⋅ -------( VOUT + Vγ ) 2 DocID024355 Rev 2 17/29 Feedback loop calculation guidelines AN4273 Equation 6 V IN + Vγ Ipk β = ----------------------------------2- ⋅ -------- ⋅ ∂ 2 ( V OUT + Vγ ) Equation 7 Ipk ( V OUT + Vγ ) ⋅ ( VIN + Vγ ) ⋅ -------- ⋅ R OUT α ⋅ R OUT 2 G10 = -------------------------------- = ------------------------------------------------------------------------------------------------------1 + β ⋅ R OUT 2 Ipk ( V OUT + Vγ ) ⋅ ( V IN + Vγ ) ⋅ --------∂ ⋅ R OUT 2 In the above formulas, COUT and ESR are the capacitance and the equivalent series resistance of the output capacitor respectively, Vy is the forward drop of the free-wheeling diode, ROUT = VOUT/IOUT is the output load, Ipk is the drain peak current at full load and ∂ = Ton*fsw is the duty cycle. If just an RC series between COMP and GND is chosen as a compensation network, as shown in Figure 2 (in fact Cc and CFB are not mounted), the mathematical expression of the compensator C(f) is: Equation 8 j ⋅ f 1 + ------ C0 fzc C ( s ) = ------------------- ⋅ ----------------------H COMP j ⋅ 2 ⋅ π ⋅ f where: Equation 9 L ⋅ fsw – Gm R4 C 0 = ------------------------------ ⋅ ---------------- ⋅ ---------------------VIN – V OUT C7 R4 + R5 and: Equation 10 1 fzc = -----------------------------------2 ⋅ π ⋅ R3 ⋅ C7 they are chosen in order to censure the stability of the overall system. The values of HCOMP = δVCOMP/δICOMP and of Gm (error amplifier transconductance) are specified in the VIPER06 datasheet. 7.2 Compensation procedure for a DCM buck The first step is to choose the pole and zero of the compensator and the crossing frequency. In this case C(f) has only a zero (fzc) and a pole at the origin, thus a possible setting is: 18/29 • fzc = k*fp • fcross = fcross_sel ≤ fsw/10 DocID024355 Rev 2 AN4273 Feedback loop calculation guidelines Where k is arbitrarily chosen. A starting point could be k = 5. After setting fcross_sel, G1(fcross_sel) can be calculated from Equation 2 and, since by definition it is ⏐C(fcross_sel)*G1(fcross_sel)⏐= 1, C0 can be calculated as follows: Equation 11 H COMP j ⋅ 2 ⋅ π ⋅ fcross_sel C 0 = ----------------------------------------------------- ⋅ --------------------------------------------G1 ( fcross_sel ) j ⋅ fcross_sel 1 + ---------------------------------fzc At this point the Bode diagram of G1(f)*C(f) can be plotted, in order to check the phase margin for the stability. If the margin is not high enough, another choice should be made for k and fcross_sel, and the procedure is repeated. When the stability is ensured, the next step is to find the values of the schematic components, which can be calculated as follows: from Equation 9 Equation 12 L ⋅ fsw – Gm R4 C7 = ------------------------------ ⋅ ---------------- ⋅ ---------------------V IN – V OUT C 0 R4 + R5 and from Equation 10 Equation 13 1 R3 = -----------------------------------2 ⋅ π ⋅ fzc ⋅ C7 The quantities found in Equation 12 and Equation 13 are suggested values. Commercial values are chosen, let us call them C7_act, R7_act, resulting into fzc_act. Equation 14 1 fzc_act = ----------------------------------------------------------2 ⋅ π ⋅ R3_act ⋅ C7_act C0 value is also recalculated from Equation 9 Equation 15 L ⋅ fsw R4_act – Gm ⋅ ----------------------------------------------------C 0_act = ------------------------------ ⋅ ------------------V IN – VOUT C7_act R4_act + R5 ( 4 )_act and the compensator becomes: DocID024355 Rev 2 19/29 Thermal measurements AN4273 Equation 16 f 1 + ------------------- C 0_act fzc_act C_act(f) = ------------------- ⋅ ----------------------------------H COMP j⋅2⋅π⋅f At this point the Bode diagram of G1(f)*C_act(f) should be plotted, and check if the phase margin for the stability is maintained. 8 Thermal measurements A thermal analysis of the demonstration board in full load condition at TAMB = 25 °C has been performed using an IR camera. The results are shown in the following figures. Figure 27. Thermal measurement @ VIN = 80 VAC, full load AM16695v1 20/29 DocID024355 Rev 2 AN4273 Thermal measurements Figure 28. Thermal measurement @ VIN = 115 VAC, full load AM16696v1 Figure 29. Thermal measurement @ VIN = 230 VAC, full load AM16697v1 DocID024355 Rev 2 21/29 Thermal measurements AN4273 Figure 30. Thermal measurement @ VIN = 265 VAC, full load AM16698v1 22/29 DocID024355 Rev 2 AN4273 9 EMI measurements EMI measurements A pre-compliant test to EN55022 (Class B) European normative has been performed using an EMC analyzer and an LISN. The average EMC measurements at 115 VAC/full load and 230 VAC/full load have been performed and the results are shown in Figure 31 and Figure 32. Figure 31. Average measurement at full load, 115 VAC AM16699v1 Figure 32. Average measurement at full load, 230 VAC AM16700v1 DocID024355 Rev 2 23/29 Test equipment and measurement of efficiency and light load performance Appendix A AN4273 Test equipment and measurement of efficiency and light load performance The converter input power has been measured using a wattmeter. The wattmeter measures simultaneously the converter input current (using its internal ammeter) and voltage (using its internal voltmeter). The wattmeter is a digital instrument so it samples the current and voltage and converts them to digital forms. The digital samples are then multiplied giving the instantaneous measured power. The sampling frequency is in the range of 20 kHz (or higher depending on the instrument used). The display provides the average measured power, averaging the instantaneous measured power in a short period of time (1 sec typ.). Figure 33 shows how the wattmeter is connected to the UUT (unit under test) and to the AC source and the wattmeter internal block diagram. Figure 33. Connections of the UUT to the wattmeter for power measurements Switch 1 WATT METER 2 U.U.T (Unit Under test) Voltmeter AC SOURCE + V Multiplier Ammeter A INPUT OUTPUT AVG X DISPLAY AM16701v1 An electronic load has been connected to the output of the power converter (UUT), allowing the converter load current to be set and measured, while the output voltage has been measured by a voltmeter. The output power is the product between load current and output voltage. The ratio between the output power, calculated as previously stated, and the input power, measured by the wattmeter, is the converter's efficiency, which has been measured in different input/output conditions. A.1 Measuring input power With reference to Figure 33, the UUT input current causes a voltage drop across the ammeter's internal shunt resistance (the ammeter is not ideal as it has an internal resistance higher than zero) and across the cables connecting the wattmeter to the UUT. If the switch of Figure 33 is in position 1 (see also the simplified scheme of Figure 34), this voltage drop causes an input measured voltage higher than the input voltage at the UUT input that, of course, affects the measured power. The voltage drop is generally negligible if the UUT input current is low (for example when we are measuring the input power of UUT in light load condition). 24/29 DocID024355 Rev 2 AN4273 Test equipment and measurement of efficiency and light load performance Figure 34. Switch in position 1 - setting for standby measurements Wattmeter Ammeter AC SOURCE ~ A + U.U.T. AC INPUT V - UUT Voltmeter AM16788v1 In the case of high UUT input current (i.e. for measurements in heavy load conditions), the voltage drop can be relevant compared to the UUT real input voltage. If this is the case, the switch in Figure 33 can be changed to position 2 (see simplified scheme of Figure 35) where the UUT input voltage is measured directly at the UUT input terminal and the input current does not affect the measured input voltage. Figure 35. Switch in position 2 - setting for efficiency measurements Wattmeter Ammeter A AC SOURCE + ~ V - U.U.T. AC INPUT UUT Voltmeter AM16789v1 On the other hand, the position of Figure 35 may introduce a relevant error during light load measurements, when the UUT input current is low and the leakage current inside the voltmeter itself (which is not an ideal instrument and doesn't have infinite input resistance) is not negligible. This is the reason why it is recommended the setting of Figure 34 to be used for light load measurements and Figure 35 for heavy load measurements. If it is not clear which measurement scheme has the lesser effect on the result, try with both and register the lower input power value. As noted in IEC 62301, instantaneous measurements are appropriate when power readings are stable. The UUT is operated at 100% of nameplate output current output for at least 30 minutes (warm-up period) immediately prior to conducting efficiency measurements. DocID024355 Rev 2 25/29 Test equipment and measurement of efficiency and light load performance AN4273 After this warm-up period, the AC input power is monitored for a period of 5 minutes to assess the stability of the UUT. If the power level does not drift by more than 5% from the maximum value observed, the UUT can be considered stable and the measurements can be recorded at the end of the 5-minute period. If AC input power is not stable over a 5minute period, the average power or accumulated energy is measured overtime for both AC input and DC output. Some wattmeter models allow integration of the measured input power in a time range and then measure the energy absorbed by the UUT during the integration time. The average input power is calculated dividing by the integration time itself. 26/29 DocID024355 Rev 2 AN4273 10 References References [1] Code of Conduct on energy efficiency of external power supplies, version 4 [2] VIPER06 datasheet DocID024355 Rev 2 27/29 Revision history AN4273 Revision history Table 5. Document revision history 28/29 Date Revision Changes 01-Aug-2013 1 Initial release. 15-Dec-2014 2 Updated: Equation 8, Equation 11 and Equation 16. DocID024355 Rev 2 AN4273 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2014 STMicroelectronics – All rights reserved DocID024355 Rev 2 29/29