Application Note 1053 Design Consideration with AP3039A Prepared by Shanshan Yuan System Engineering Dept. protection to limit the output voltage. The OVP voltage can be set through external resistors. If the output voltage is higher than the OVP high threshold point, it will disable the driver, when the output voltage drops to the OVP low threshold point, it will enable the driver. It also features a soft start to reduce the inrush current when power on, the soft start time can be set through an external capacitor. 1. Introduction AP3039A is a current mode high voltage low-side Nchannel MOSFET controller which is ideal for boost regulators. It contains all the features needed to implement single ended primary topology DC/DC converters. The input voltage range of AP3039A is from 5V to 27V Its operation frequency is adjustable from 150kHz to 1MHz. 2. Functional Block Description The pin configuration and the representative block diagram of the AP3039A are respectively shown in Figure 1 and Figure 2. The AP3039A has UVLO (Under Voltage Lock Out) circuit. It uses two external resistors to set the UVLO voltage. The AP3039A also has an over output voltage SOIC-14 UVLO 1 14 SS OV 2 13 COMP EN 3 12 FB VIN 4 11 SHDN VCC 5 10 GND OUT 6 9 CS GND 7 8 RT Figure 1. Pin Configuration of AP3039A (Top View) Jul. 2010 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 1 Application Note 1053 REFERENCE VIN EN UVLO 4 3 5 1 R 22 µA CLK DRIVER Q 6 7 S 2 500mV 22 µA VCC 3V REFERENCE EN 1.25V SHDN BYPASS SWITCH REGULATOR 1.25V OV 1.25V 9 LOGIC OUT GND CS + LEB 11 SAW + Σ 13 COMP OSTD 0.5V EA 12 12 µA 14 RT 8 OSL FB SS CLK 10 GND SAW Figure 2. Functional Block Diagram of AP3039A Jul. 2010 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 2 Application Note 1053 3. Operation In Figure 3, input capacitor CIN, output capacitor COUT, inductor L, switch Q1 and diode D1 build a typical boost converter. The output voltage is decided by R5, R6 and internal 0.5V reference. The output voltage accuracy is determined by the accuracy of R5 and R6, for which the precise resistors are preferred. (The external function will be introduced in Section 6 Application Hints) AP3039A is a boost DC-DC controller with adjustable operation frequency. Current mode control scheme provides excellent line and load regulation. Operation can be best understood by referring to the Figure 2. At the start of each oscillator cycle, the SR latch is set and external power switch Q1 (refer to Figure 3) turns on. The switch current will increase linearly. The voltage on external sense resistor RCS (refer to Figure 3), which connected from CS pin to GND, is proportional to the switch current. This voltage is added to a stabilizing ramp and the result is fed into the non-inversion input of the PWM comparator. When this non-inversion input voltage exceeds inversion input voltage of PWM comparator, which is the output voltage level of the error amplifier EA, the SR latch is reset and the external power switch turns off. VOUT= 0.5V * (R5 + R6 ) R6 Figure 4 is the application of driving a single 1W or 3W LED lighting. In this application, the LED current is controlled by the feedback resistor R5. LEDs current accuracy is determined by regulator‘s feedback threshold accuracy and is independent of the LEDs‘ forward voltage variation. So the precise resistors are the better choices. The resistance of R5 is in inverse proportion to the LED current since the feedback reference is fixed at 0.5V. The relation of R5 and the LED current can be expressed as below: It is clear that the voltage level at inversion input of PWM comparator sets the peak current level to keep the output in regulation. The output voltage level is the amplified signal of the voltage difference between feedback voltage and reference voltage of 0.5V. So, a constant output current can be provided by this operation mode. R5= 0.5V ILED Figure 5 is the application circuit of backlight driver. The summation of LED current is determined by R5 and internal 0.5V reference same as the illustration in Figure 4. 4. Typical Application V IN : 6V to 27V L V OUT D1 C IN R1 COUT VIN R2 UVLO OUT VCC CS CV Q1 R5 R CS R4 EN OFF ON RT C SS RC R3 RT OV SS FB SHDN COMP OFF ON R6 GND CC U1 AP3039A Figure 3. AP3039A Application Circuit Jul. 2010 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 3 Application Note 1053 4. Typical Application (Continued) L VIN:6V to 27V D1 CIN R1 VIN R3 Q1 OUT 1W or 3W LED UVLO CS VCC CV R2 RCS OFF ON EN R4 COUT OV RT RT SHDN SS ON OFF CSS FB COMP U1 AP3039A GND RC R5 CC Figure 4. Application Circuit 2 of AP3039A (Driving Single 1W or 3W LED Lighting) L VIN: 6V to 27V D1 CIN R1 VIN Q1 OUT R3 UVLO CS VCC CV R2 RCS OFF ON EN R4 COUT OV RT RT SS SHDN ON OFF CSS FB COMP RC GND U1 AP3039A R5 CC Figure 5. Application Circuit 3 of AP3039A (Backlight Driver) Jul. 2010 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 4 Application Note 1053 VIN : 6V to 27 V CIN1 10µF COUT 10µF R1 VIN UVLO R2 OFF ON RT RT 10k CS RCS 200m Ω A P 3 OV 0 3 9 SHDN A FB EN SS CSS 0.1µF R3 OUT 10* 8 R4 CH1 10* 8 CH2 SDBX 1 # AP3608E FB CH 1 CH8 SDB CH 2 CH8 SDB FBX FB SDBX N # AP3608E EN COMP RC 10k GND CC 10nF VCC VCC CV CIN2 0.1µF EN VCC PWM GND ISET ISET AP3608E VCC 5.0V External FBX PWM GND VCC PWM Dimming OFF ON Figure 6. AP3039A + AP3608E (Eight Channels Current Sink) Application Circuit 5. Components selection Another application of AP3039A is introduced in Figure 6. Inductor Selection When choosing an inductor, the first step is to determine the operating mode: continuous conduction mode (CCM) or discontinuous conduction mode (DCM). When CCM mode is chosen, the ripple current and the peak current of the inductor can be minimized. If a small-size inductor is required, DCM mode can be chosen. In DCM mode, the inductor ripple current and peak current are higher than those in CCM. The application circuit in Figure 6 is AP3039A works with AP3608E to drive LED array. The AP3608E acts as an eight-channel constant current sink with current match to drive the LEDs. The FB, FBX, SDB and SDBX pins of AP3608E are the interface terminals to coordinate with the AP3039A. The FB/FBX pin of AP3608E samples voltage of each channel, and outputs the lowest voltage of all the strings to AP3039A. When the value of inductor is less than LCCM(MIN), the system operates in DCM mode. When there is a shutdown signal on EN pin of AP3608E or all LED channels are inactive, the SDB/ SDBX pin of AP3608E outputs a low logic signal to turn off AP3039A. LCCM(MIN) ⎛V = ⎜⎜ IN ⎝VOUT ⎞ ⎟⎟ ⎠ 2 ⎛VOUT −V IN ⎜⎜ ⎝ I OUT * f OSC ⎞ η ⎟⎟* ⎠ 2 The expected efficiency (η) is taken from an appropriate curve in datasheet. If AP3608E is on PWM dimming mode, the SDB/ SDBX pin of AP3608E outputs a signal to AP3039A, which is synchronous with PWM. Jul. 2010 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 5 Application Note 1053 capacitor (or two 4.7µF ceramic capacitors in parallel) is recommended in the typical application. Current Resistor Selection An external resistor RCS is connected from CS pin to GND to detect switch current signal for current-mode boost converter. The current-limit threshold voltage VCS of AP3039A is fixed at 500mV. The required resistance of RCS is based on the peak inductor current at the end of the switch on-time, and can be calculated by the following equations: R CS_MAX < ΔI L = VC S ΔI L + I IN 2 (VOUT in which, I RMS_ON Power MOSFET Selection When selecting the power MOSFET Q, some tradeoffs between cost, size, and efficiency should be made. The losses in the MOSFET can be calculated by: −VIN )* VIN L * fOSC * VOUT PRCS = I RMS _ON 2 * RCS 2 VCC Decoupling Capacitor Selection The VCC pin of AP3039A should be decoupled with a ceramic capacitor placed as close to the AP3039A as possible. This capacitor keeps VCC voltage steady when the system operates at a high frequency. The decoupling capacitor should adopt X5R or X7R ceramic capacitor because of their good thermal stability, and the capacitance of 0.47µF is recommended. in which, V −VIN ⎛⎜ 2 ΔI L = OUT * I IN + ⎜ 12 VOUT ⎝ PMOS = PCONDUCTION + PG + PSW 2 ⎞ ⎟ ⎟ ⎠ Where PCONDUCTION is conduction loss, PG is Gate charging loss, and PSW is switching loss. PCONDUCTION = KTH * I RMS _ ON 2 * RDSON Output Capacitor Selection The output capacitor of the boost converter is used for output filtering and keeping the loop stable. The ESR value is the most important parameter of the COUT, because it directly affects the system stability and the output ripple voltage. Where KTH is the factor for the increase in on resistance of MOSFET due to heating. For an approximate analysis, the factor can be ignored and the maximum on resistance of the MOSFET can be used. The total output ripple can be calculated by the following the equations: Gate charging loss, PG, results from the current required to charge and discharge the Gate capacitance of the power MOSFET and is approximated as: ΔVo = ΔVO(CO) + ΔVO(ESR) ΔVO(CO) = I OUT * CO ⎛ VOUT - V IN ⎜⎜ ⎝VOUT * f OSC PG = Qg *VCC * f OSC ⎞ ⎟⎟ ⎠ Where Qg is the total Gate charge of the MOSFET. Power of VCC is applied by VIN and the MOSFET driving current flows through VCC regulator. The loss PVCC is estimated as: ΔVO(ESR) = I L _ PEAK * R ESR(CO) The small size and high temperature rating of ceramic capacitors is a good choice. PVCC = (VIN − VCC ) ∗ Qg ∗ f OSC Input Capacitor Selection The input capacitor (CIN) of AP3039A filters the current peaks drawn from the input supply and reduces noise injection into the IC. A 10µF ceramic So the total Gate charging loss is PG_TOTAL = PG + PVCC Jul. 2010 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 6 Application Note 1053 ters RCOMP and CCOMP in different operating frequency (as shown in Figure 4) are shown in table 1. The total Gate charging loss occurs in IC but not in the MOSFET itself only actually. Switching loss, PSW, occurs in transition period as the MOSFET turns on and off. This loss is consisted of turn on loss and turn off loss. Operating Frequency (kHz) ΔI L 1 PTURN_ON = (I IN ) * VOUT * t r * fOSC 6 2 1 ΔI L PTURN_OFF = (I IN + ) * VOUT * t F * fOSC 6 2 ΔI L = (VOUT −VIN )* VIN CCOMP (nF) 200 15 3.3 400 15 3.3 600 22 3.3 800 36 3.3 1000 51 2.2 6. Application Hints Input Under-Voltage Detector AP3039A contain an Under Voltage Lock Out (UVLO) circuit. Two resistors R1, R2 are connected from UVLO pin to ground and the VIN pin (refer to Figure 3.). The resistor divider must be designed such that the voltage on the UVLO pin is higher than 1.25V when VIN is in the desired operating range. If this under voltage threshold is not met., all functions of AP3039A are disabled and system remains in a low power standby state. UVLO hysteresis is accomplished through an internal 22µA current Source that is switched on or off into the impedance of the set-point divider. When the UVLO threshold is exceeded, the current Source is activated to instantly raise the voltage on the UVLO pin. When the UVLO pin voltage falls below the threshold the current Source is turned off, causing the voltage on the UVLO pin to fall. The formula for UVLO can be expresses as blow: For Input Threshold Voltage PSW = PTURN _ ON + PTURN _ OFF Where tR and tF are the rise and fall times of the MOSFET. When MOSFET turns off, the VDS (the stress voltage on Drain to Source ) of MOSFET is VOUT plus the ringing. The MOSFET selected must be able to withstand VOUT plus any ringing from drain to Source, and VCC plus ringing from Gate to Source. The MOSFET with VDS =60V and VGS> 10V is recommended. Diode Selection The boost converter requires a diode D to carry the inductor current during the MOSFET off time. Schottky diodes are recommended due to their fast recovery time and low forward. D should be rated to handle the maximum output voltage (plus switching node ringing) and the peak switch current. The conduction loss of diode is calculated by: VIN_THRESHOLD = 1.25V * ((R1 + R2)) R2 For Input Hysteresis Voltage in which, VIN_HYSTERESIS = 22µA*R1 1 I RMS_OFF RCOMP (kΩ) Table 1. Compensation Selection L * fOSC * V OUT PDIODE = I RMS _ OFF *VF Compensation Parameter ⎡V ⎛ ΔI L 2 ⎞⎟ ⎤ 2 2 = ⎢ IN * ⎜⎜ I I N + ⎥ 12 ⎟⎠ ⎥⎦ ⎢⎣V OUT ⎝ Over-Voltage Protection AP3039A has an over voltage protection (OVP) circuit. The OV Pin is connected to the center tap of a resistive voltage-divider from the high voltage output to GND (refer to Figure 3.). When the loop is open or the output voltage becomes excessive in any case, result the voltage on OV pin exceeds 1.25V, all functions of AP3039A are disabled, and the output voltage will fall. OVP hysteresis is accomplished with the VF is the forward voltage of Schottky diode. RCOMP and CCOMP Selection AP3039A adopts current mode PWM control to improve transient response and achieve simple loop compensation circuit. The loop compensation parame- Jul. 2010 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 7 Application Note 1053 MOSFET driver. On the condition that VIN≥13.5V, the regulator generates a 10V supply. If 6V≤VIN≤12.5V, the VCC is equal to VIN minus drop voltage across bypass switch. When VIN is less than 6V, connect VCC to VIN. an internal 22µA current Source and the operation mode is the same as UVLO. The formula for OVP can be expresses as blow: For OVP Voltage VOVP =1.25V ∗( (R3 + R4) ) R4 7. PCB Layout Guideline Boost converter performance can be seriously affected by poor layout. To produce an optimal solution for system, good layout and design of the PCB are as important as the component selection. The following PCB layout guideline should be considered: For OVP Hysteresis Voltage: VOVP_HYSTERESIS = 22µA*R3 Frequency Selection An external resistor RT connected from RT pin to GND to set the operating frequency (refer to Figure 3). Operation frequency range is from 150kHz to 1MHz (as shown in Table 2). High frequency operation optimizes the regulator for the smallest component size, while low frequency operation can reduce the switch losses. RT (kΩ) Operating Frequency (kHz) 470 150 390 200 147 400 95 600 68 800 51 1000 1. There are two high-current loops in the solution. One is the high-current input loop, and the other is the high-current output loop. The high-current input loop goes from the positive terminal of the CIN to the inductor, to the MOSFET, then to the current-sense resistor, and to the CIN’s negative terminal. The highcurrent output loop goes from the positive terminal of the CIN1 to the inductor, to the diode, to the positive terminal of the COUT, reconnecting between the COUT and the CIN ground terminals. Minimize the area of the two high-current loops to avoid excessive switching noise. The trace connected these two high-current loops must be short and thick. 2. Create two ground islands. One is called Power Ground Island (P Island), the other is called Analog Ground Island (A Island). The P Island consists of CIN and COUT ground connections and negative terminal of the current-sense resistor RCS. Maximizing the width of the P Island traces will improve efficiency and reduces output voltage ripple and noise spike. The A Island is the connection of the OV and UVLO detection-divider ground, RT resistor ground, CV, CSS, Table 2. Frequency Selection Soft Start The AP3039A has a soft start circuit to limit the inrush current during startup. The soft start feature allows the boost converter output to gradually reach the initial steady state output voltage, thereby reducing start-up stresses and current surges. The time of startup time is controlled by an internal 12µA current Source and an external soft start capacitor CSS which connected from SS pin to GND (refer to Figure 4). At power on, after the VIN UVLO threshold is reached, the internal 12µA current Source charges the external capacitor CSS. The capacitor voltage will ramp up slowly and will limit COMP pin voltage and the switch current. and CCOMP ground and the device’ s exposed backside pad. Connect the P Island and A Island directly to the exposed backside pad. Make no other connections between these separate ground planes. 3. Place the bypass capacitor CV as close to the device as possible. The ground connection of these capacitors should be connected directly to GND pins with a thick trace. VCC Pin Application Description The AP3039A includes an internal low dropout linear regulator with the output pin VCC. This pin is used to power internal PWM controller, control logic and Jul. 2010 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 8