timing selector guide

Timing Solutions
PRODUCT SELECTOR GUIDE
Timing
The industry’s broadest portfolio
of oscillators, clock buffers, clock
generators, PCI Express (PCIe)
clocks and jitter attenuators.
www.silabs.com/timing | Smart. Connected. Energy-Friendly.
Timing Solutions
Comprehensive
- Crystal oscillators
- Clock buffers
- Clock generators
- Jitter attenuators
Flexible
- Simplifies clock generation with any-frequency synthesis
- Minimizes BOM cost and complexity
Performance
- Highly integrated to simplify design
- Ultra-low jitter optimizes system performance
Customized
- Web-customizable clocks and oscillators
- Quick-turn samples available in days
Featured Product
Silicon Labs’ next-generation Si534x “clock-tree-on-a-chip” portfolio includes high-performance clock
generators and highly integrated multi-PLL jitter attenuators. These single-chip, ultra-low-jitter timing devices
lead the industry in jitter performance and frequency flexibility. Designed to meet the exacting specifications and
high-performance requirements of Internet Infrastructure, these best-in-class, ultra-low-jitter clock devices reduce
cost and complexity for a wide range of timing applications.
1 Timing Solutions Selector Guide
Timing Products
Crystal Oscillators
Clock Buffers
Clock Generators
XO
VCXO
Non-PLL
PLL
Crystal
Oscillators
(XO)
VoltageControlled
Crystal
Oscillators
(VCXO)
Universal
Buffers/Level
Translators
PCIe Zero
Delay Buffers
I 2C
Programmable
Oscillators
(XO)
I 2C
Programmable
Oscillators
(VCXO)
PCI Express
Buffers
LVCMOS Zero
Delay Buffers
Jitter Attenuators
Internet
Infrastructure
IoT / Industrial
Control
Internet
Infrastructure
Network
Synchronizers
Any-Frequency
Differential/
CMOS Clocks
Tiny CMOS
IoT Clocks
Any-Frequency
1-DSPLL
Clocks
SyncE Clocks
Any-Frequency
Multi-DSPLL
Clocks
SyncE +
1588 Clocks
PCI Express
Clocks
Embedded
Intel x86
Clocks
EMI
Reduction
Clocks
Any
Frequency
CMOS Clocks
LTE (JESD204B)
Wireless Clocks
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Crystal Oscillators (XO/VCXO)
REQUEST CUSTOM PART NUMBERS AND SAMPLES AT: www.silabs.com/oscillators
Silicon Labs’ crystal oscillators and voltage-controlled crystal oscillators (XO/VCXOs) leverage advanced DSPLL® circuitry to provide a
low jitter clock at any frequency from 100 kHz to 1.4 GHz. Unlike a traditional XO, where a different crystal is required for each output
frequency, Silicon Labs’ XO/VCXOs use a fixed frequency crystal and DSPLL clock synthesis IC to generate any output frequency.
This IC-based approach delivers exceptional frequency stability and reliability, while providing best-in-class jitter performance and
supply noise rejection, simplifying the task of generating low-jitter clocks in noisy environments. All devices are factory configurable
for a wide variety of user specifications, including frequency, supply voltage, output format and stability, thereby eliminating long lead
times associated with custom oscillators.
XO/VCXO FEATURES
• Wide frequency range: 100 kHz to 1.4 GHz
• Samples of any XO/VCXO available in 2 weeks
• Superior jitter performance: <0.3 ps rms
• Excellent frequency stability,
superior initial accuracy and PSRR
• Single, dual, quad, I2C programmable options
Cable
Equalizer
12G/6G/3G/
HD/SD-SDI
Si512 Dual
Frequency XO
Si554 VCXO
SDI Reclocker
YCbCr
SDI Deserializer
Sync Separator
• 100% Electrical testing = guaranteed startup
• LVPECL, LVDS, CML, HCSL, CMOS options
• 1.8, 2.5, and 3.3 V options
• 5 x 7 mm, 3.2 x 5 mm options
• -40 to 85 °C operation
Sync Input
Pclk,
HVF
Video
Processor
Scaling &
Aspect Ratio
Conversion
YCbCr
SDI
Serializer
Genlock
HSYNC
Si5344
Jitter
Attenuator
Master Sync Generator
Cable
Driver
12G/6G/3G/
HD/SD-SDI
Audio
Video
Processor Clocks
VIDEO FORMAT CONVERTER
Crystal Oscillator (XO)
PART NUMBER
NUMBER OF
FREQUENCIES
FREQUENCY RANGE
JITTER
(ps RMS)
STABILITY/APR
(PPM)
FORMAT
VOLTAGE (V)
TEMP (ºC)
PACKAGE SIZE
(MM)
Si535/36
Single
select freq. 100 - 312 5 MHz
0.2
±20, ±31.5
LVDS, LVPECL
3.3, 2.5
-40 to 85
5x7
Si530/31
Single
Si532/33
Dual
Si534
Quad
10 - 1417 MHz
0.3
±20, ±31.5, ±61.5
CMOS,
LVPECL,
LVDS,
CML
3.3
2.5
1.8
-40 to 85
5x7
Si570
Any (I2C Prog)
Si590/91
Single
10 - 810 MHz
0.5
±20, ±30, ±50, ±100
5x7
Any (I C Prog)
3.3
2.5
1.8
-40 to 85
Si598
CMOS,
LVPECL,
LVDS,
CML
Si510/11
Single
Si512/13
Dual
0.1 - 250 MHz
0.8
±30, ±50, ±100
5x7
3.2 x 5
Any (I2C Prog)
3.3
2.5
1.8
-40 to 85
Si514
CMOS,
Dual CMOS,
LVPECL,
LVDS, HCSL
2
Voltage-Controlled Oscillator (VCXO)
PART NUMBER
NUMBER OF CENTER
FREQUENCIES
Si550
Single
Si552
Dual
Si554
Quad
Si571
Any (I2C Prog)
Si595
Single
Si597
Quad
Si599
Any (I2C Prog)
Si515
Single
Si516
Dual
3 Timing Solutions Selector Guide
FREQUENCY RANGE
JITTER
(ps RMS)
STABILITY/APR
(PPM)
FORMAT
VOLTAGE (V)
TEMP (ºC)
PACKAGE
SIZE (MM)
10 - 1417 MHz
0.5
±12 to ±375
CMOS,
LVPECL,
LVDS,
CML
3.3
2.5
1.8
-40 to 85
5x7
10 - 810 MHz
0.7
±10 to ±370
CMOS,
LVPECL,
LVDS,
CML
3.3
2.5
1.8
-40 to 85
5x7
0.1 - 250 MHz
1.0
±30to ±100
CMOS, Dual CMOS,
LVPECL, LVDS, HCSL
3.3
2.5
-40 to 85
5x7
3.2 x 5
Clock Buffers / Level Translators
WEB-CONFIGURABLE CUSTOM CLOCK BUFFERS AVAILABLE AT: www.silabs.com/clock-buffers
Universal Clock Buffers / Level Translators
Silicon Labs’ Universal family of low-jitter clock buffers and level translators (Si533XX) delivers multiple output clock formats
from any input clock format (supports LVDS, LVPECL, CML, LVCMOS, SSTL, HCSL and HSTL). This flexibility reduces BOM
complexity by allowing the same device to be used across multiple projects and platforms.
UNIVERSAL BUFFER FEATURES
100/125 MHz 2.5 V LVDS
• Pin-selectable signal format (LVPECL, low-power LVPECL, LVDS, CML, HCSL, LVCMOS)
• Wide operating frequency DC - 1.25 GHz
• 2-10 differential or 4-20 LVCMOS outputs
• Accepts any differential or single-ended input
• Low additive jitter: 45 fs rms (12 kHz - 20 MHz)
• Glitchless clock switching
• Synchronous output enable/Individual output enable
• Integrated voltage level translation
• Selectable drive strength to tailor jitter/EMI performance
• Optional output clock division: div-1, div-2, div-4
• Low output-output skew: <50 ps
• Excellent PSRR
• Independent VDD and VDDO: 1.8, 2.5 or 3.3 V
Si5340
Any
Frequency
Clock
125 MHz 2.5 V CMOS
Communications
Processor
125 MHz 2.5 V CMOS
Control
Plane
PCIe
SATA
USB
RS-232
Memory
66.666 MHz 3.3 V CMOS
156.25 MHz 3.3 V LVDS
10 GbE Switch
Octal
PHY
Si53306 1:4
Universal
Clock
Buffer
Octal
PHY
156.25 MHz 1.8 V LVDS
Data Path
Octal
PHY
10G ETHERNET SWITCH
PART NUMBER
CLOCK
INPUT/
OUTPUTS
ADDITIVE
JITTER
(RMS)
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
VDD (V)
VDDO (V)
OUTPUT
PACKAGE
Si53306
1/4
45 fs
1 - 725 MHz
1 - 725 MHz
1.8, 2.5, 3.3 V
1.2, 1.8, 2.5, 3.3 V
LVPECL, LVDS, HCSL, LVCMOS, CML
QFN16
Si53301
2/6
45 fs
1 - 725 MHz
1 - 725 MHz
1.8, 2.5, 3.3 V
1.2, 1.8, 2.5, 3.3 V
LVPECL, LVDS, HCSL, LVCMOS, CML
QFN32
Si53302
2/10
45 fs
1 - 725 MHz
1 - 725 MHz
1.8, 2.5, 3.3 V
1.2, 1.8, 2.5, 3.3 V
LVPECL, LVDS, HCSL, LVCMOS, CML
QFN44
Si53320
2/10
45 fs
1 - 725 MHz
1 - 725 MHz
2.5, 3.3 V
2.5, 3.3 V
LVPECL
TSSOP20
Si53321
2/10
45 fs
DC - 1250 MHz
DC - 1250 MHz
2.5, 3.3 V
2.5, 3.3 V
LVPECL
QFN32, QFP32
Si53322
1/2
45 fs
DC - 1250 MHz
DC - 1250 MHz
2.5, 3.3 V
2.5, 3.3 V
LVPECL
QFN16
Si53323
2/4
45 fs
DC - 1250 MHz
DC - 1250 MHz
2.5, 3.3 V
2.5, 3.3 V
LVPECL
QFN16
Si53340
2/4
45 fs
DC - 1250 MHz
DC - 1250 MHz
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
LVDS
QFN16
Si53360
1/8
100 fs
1 - 200 MHz
1 - 200 MHz
1.8, 2.5, 3.3 V
1.8, 2.5 V
LVCMOS
TSSOP16
Si5330
1/4
150 fs
5 - 710 MHz
5 - 710 MHz
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
LVPECL, LVDS, HCSL, SSTL, HSTL
QFN24
SL18860DC
1/3
—
10 - 52 MHz
10 - 52 MHz
1.8, 2.5, 3.3 V
—
LVCMOS (TCXO)
TDFN10
8TSSOP/8SOIC
SL2304NZ
1/4
—
1 - 140 MHz
1 - 140 MHz
3.3
—
LVCMOS
SL23EP04NZ
1/4
—
DC - 220 MHz
DC - 220 MHz
2.5, 3.3 V
—
LVCMOS
TSSOP8
SL2305NZ
1/5
—
1 - 140 MHz
1 - 140 MHz
3.3 V
—
LVCMOS
TSSOP8/SOIC8
SL2309NZ
1/9
—
DC - 140 MHz
DC - 140 MHz
3.3 V
3.3 V
LVCMOS
SOIC16
SL23EP09NZ
1/9
—
1 - 220 MHz
1 - 220 MHz
2.5 V, 3.3 V
—
LVCMOS
TSSOP16/SOIC16
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PCI Express (PCIe) Zero Delay Buffers
Silicon Labs offers a portfolio of low-power zero delay buffers meeting PCI-Express Gen1/2/3 specifications. All devices feature
low power push-pull output buffer technology, providing benefits of low power consumption, reduced external terminating
resistors and small packaging. Devices in this family are ideal for server, storage and data center applications requiring a high
number of PCI-Express clocks. The Si53108, Si53112 and Si53019 are fully qualified by Intel for DB800ZL, DB1200ZL and
DB1900Z clock specifications respectively.
PCIE CLOCK BUFFER/ZERO DELAY BUFFER FEATURES
• Complete portfolio of PCI Express Gen 1/2/3 buffers/
zero-delay buffers
• Push-pull HCSL output buffer technology
• Integrated termination resistors
• Low power consumption
• I2C/SMBus programmable
• Supports optional LVPECL, LVDS, or CML levels
• -40 to 85 °C operation
• Individual output enable control
• Small form factor QFN packaging
• Intel Qualified
CONTROL
CLOCK
INPUT/
OUTPUTS
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
PHASE
JITTER
(RMS)
VDD
VDDO
OUTPUT
PACKAGE
Si53106
Pin/I2C
1/6
100 MHz, 133 MHz
100 MHz, 133 MHz
0.6 ps
—
—
Push-Pull HCSL
QFN40
Si53108
Pin/I2C
1/8
100 MHz, 133 MHz
100 MHz, 133 MHz
0.45 ps
—
—
Push-Pull HCSL
QFN48
Si53112
Pin/I2C
1 / 12
100 MHz, 133 MHz
100 MHz, 133 MHz
0.45 ps
—
—
Push-Pull HCSL
QFN64
Si53115
Pin/I2C
1 / 15
100 MHz, 133 MHz
100 MHz, 133 MHz
0.45 ps
—
—
Push-Pull HCSL
QFN64
Si53119
Pin/I2C
1 / 19
100 MHz, 133 MHz
100 MHz, 133 MHz
0.5 ps
—
—
Push-Pull HCSL
QFN72
Si53019
Pin/I2C
1 / 19
100 MHz, 133 MHz
100 MHz, 133 MHz
0.6 ps
—
—
Constant Current HCSL
QFN72
Si53102
—
1/2
100 MHz
100 MHz
0.2 ps
2.5, 3.3 V
—
Push-Pull HCSL
TDFN8
Si53152
Pin/I2C
1/2
100 MHz
100 MHz
0.1 ps
3.3 V
3.3 V
Push-Pull HCSL
QFN24
Si53154
Pin/I2C
1/4
100 MHz
100 MHz
0.1 ps
3.3 V
3.3 V
Push-Pull HCSL
QFN24
Si53156
Pin/I2C
1/6
100 MHz
100 MHz
0.1 ps
3.3 V
3.3 V
Push-Pull HCSL
QFN32
Si53159
Pin/I2C
1/9
100 MHz
100 MHz
0.1 ps
3.3 V
3.3 V
Push-Pull HCSL
QFN48
PCIe
PART NUMBER
Processor/
Chipset
Processor/
Chipset
PCIe Buffer
PCIe
PCIe
Switch
PCIe Slots
Co-Processor
FPGA
FPGA
PCIe
PCIe
PCIe
PCIe
SERVER
5 Timing Solutions Selector Guide
LVCMOS Zero Delay Buffers
Silicon Labs’ zero delay clock buffers are used in applications that require zero propagation delay between the input and output
clocks. These devices provide low power consumption and simplify the distribution of spread spectrum clocks.
ZERO DELAY BUFFER FEATURES
• Low propagation delay
• Low output-to-output skew
• Low device-to-device skew
• Low output jitter
• Supports spread spectrum clock distribution
• Wide operation frequency from 10 to 220 MHz
• 3.3 V to 2.5 V power supply range
• Low power dissipation
PART NUMBER
CONTROL
CLOCK
INPUT/
OUTPUTS
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
PHASE
JITTER
(RMS)
VDD
VDDO
OUTPUT
PACKAGE
SL2305
Pin
1/5
10 - 140 MHz
10 - 140 MHz
—
3.3 V
—
LVCMOS
TSSOP8/SOIC8
SL2309
Pin
1/9
10 - 140 MHz
10 - 140 MHz
—
3.3 V
—
LVCMOS
TSSOP16/SOIC16
SL23EP04
Pin
1/4
10 - 220 MHz
10 - 220 MHz
—
2.5 , 3.3 V
—
LVCMOS
SOIC8
SL23EP05
Pin
1/5
10 - 220 MHz
10 - 220 MHz
—
2.5 , 3.3 V
—
LVCMOS
TSSOP8/SOIC8
SL23EP08
Pin
1/8
10 - 220 MHz
10 - 220 MHz
—
2.5 , 3.3 V
—
LVCMOS
TSSOP16/SOIC16
SL23EP09
Pin
1/9
10 - 220 MHz
10 - 220 MHz
—
2.5 , 3.3 V
—
LVCMOS
TSSOP16/SOIC16
Ethernet
Switch
Controller
25 MHz
XO
SL2305
Zero
Delay
Buffer
25 MHz
Quad Ethernet
PHY
RJ-45 Port 1
RJ-45 Port 2
25 MHz
Quad Ethernet
PHY
25 MHz
Quad Ethernet
PHY
25 MHz
Quad Ethernet
PHY
RJ-45 Port 15
RJ-45 Port 16
ETHERNET SWITCH
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Clock Generation
WEB-CONFIGURABLE FACTORY-CUSTOMIZED CLOCK GENERATORS AVAILABLE AT: www.silabs.com/custom-timing
Any-Frequency, Any-Output CMOS Clock Generators (Si5350A/C, Si5351A/C)
Silicon Labs’ highly flexible factory and I2C programmable LVCMOS clock generators can be customized to generate multiple,
independent non-integer-related frequencies with equivalent frequency synthesis capability of 8 PLLs, with exact frequency
synthesis (0 ppm error), significantly lower jitter, lower power and smaller size than competing solutions. Factory customization
options are available to minimize EMI, including configurable edge rates, output impedance, output skew and spread spectrum.
These flexible devices are perfect for low-cost consumer/embedded applications and can provide a complete clock tree on
one chip.
Si5350A/C, Si5351A/C FEATURES
• Generates any frequency on any output,
2.5 kHz to 200 MHz
• Exact clock synthesis: 0 ppm error
• Similar frequency flexibility as 8 independent PLLs
• Crystal and/or clock input
• <70 ps pk-pk period jitter, typical
• Glitchless switching between output frequencies
• I2C programmable (Si5351) or pin-controlled (Si5350)
• Excellent PSRR: no discrete components
• Two-week sample lead time for any custom clock
• Spread spectrum clock generation
-0.1 to -2.5% down, ±0.1 to ±1.5% center
• User-definable control pins Powerdown,
Output Enable, Spread Enable, Frequency
Select control pins
• Small form factor; MSOP10 (3 outputs), QFN20 (8 outputs)
PART NUMBER
CONTROL
CLOCK
INPUT/
OUTPUTS
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
PERIOD
JITTER
(PP)
VDD
VDDO
OUTPUT
PACKAGE
Si5350A
Pin
1/ 3 or 8
25/27 (Xtal)
2.5 kHz - 200 MHz
70 ps
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS
MSOP10, QFN20
Si5350C
Pin
1/ 3 or 8
10 - 100 (Clock),
25/27 (Xtal)
2.5 kHz - 200 MHz
70 ps
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS
MSOP10, QFN20
Si5351A
I2C
1/ 3 or 8
25/27 (Xtal)
2.5 kHz - 200 MHz
70 ps
2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS
MSOP10, QFN20
Si5351C
I2C
1/ 3 or 8
10 - 100 (Clock), 25/27
(Xtal)
2.5 kHz - 200 MHz
70 ps
2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS
MSOP10, QFN20
74.25 MHz
33.3333 MHz
CPU
27 MHz
Video
Processor
24.576 MHz
Si5350/
Si5351
27 MHz
USB
Controller
Ethernet
PHY
7 Timing Solutions Selector Guide
22.5792 MHz
Audio
Processor
48 MHz
28.322 MHz
125 MHz
HDMI Port
AUDIO/VIDEO RECEIVER
Any-Frequency CMOS Clock Generators with Integrated VCXOs (Si5350B, Si5351B)
These integrated clock generator + VCXO devices feature an integrated voltage controlled oscillator (VCXO), while eliminating
the need for custom, pullable crystals. Free-running and VCXO clocks can be generated by one device, making them ideal for
cost-sensitive consumer applications.
Si5350B, Si5351B FEATURES
• Generates any frequency on any output, 2.5 kHz to 200 MHz
• Exact clock synthesis: 0 ppm error
• Similar frequency flexibility as 8 independent PLLs
• Accepts crystal and analog control voltage input (VCXO)
• <70 ps pk-pk period jitter for any configuration
• Glitchless switching between output frequencies
• Integrated VCXO uses standard non-pullable crystal
• I2C programmable (Si5351) or pin-controlled (Si5350)
• Excellent PSRR: no discrete components
• Two week sample lead time for any custom clock
• Spread spectrum clock generation
-0.5 to -2.5% down, ±0.1 to ±1.5% center
• User-definable control pins Powerdown,
Output Enable, Spread Enable or Frequency
Select control pins
• Small form factor; MSOP10 (3 outputs), QFN20 (8 outputs)
PART NUMBER
CONTROL
CLOCK
INPUT/
OUTPUTS
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
PERIOD
JITTER
(PP)
VDD
VDDO
OUTPUT
PACKAGE
Si5350B
Pin
1/ 3 or 8
25/27 (Xtal)VCXO
2.5 kHz - 200 MHz
70 ps
2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS
MSOP10, QFN20
Si5351B
I2C
1/8
25/27 (Xtal)VCXO
2.5 kHz - 200 MHz
70 ps
2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS
QFN20
Satellite
Tuner
Antenna —OR— Cable
Satellite
Si47xx
AM/FM
Receiver
Si218x
Digital TV
Demod
Si21x4
TV Tuner
—OR—
Si2185/
Si211x
TV Receiver
Remote Control
Si401x
Wireless
Transmitter
SOC
+
Video
Processor
Si431x
Wireless
Receiver
Si1120/40
Proximity
Sensor/ALS
AC/DC
Supply
Si8xxx Digital
Isolators
Si5350
Clock
Generator
C8051F7xx
Capacitive
Touch MCU
TELEVISION WITH REMOTE CONTROL
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Any-Frequency, Any-Output Differential/CMOS Clock Generators (Si5340/41, Si5335/38)
Silicon Labs’ differential + LVCMOS clock generators provide any rate, any output frequency synthesis, enabling a single
device to replace multiple crystal oscillator and fixed-frequency clock generators. Any combination of output frequencies
can be generated exactly with 0 ppm error. Independent signal format and VDDO options provide integrated level
translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps rms phase jitter.
Si5340/41 FEATURES
• Up to 10 independent clock outputs
• MultiSynth technology delivers any frequency on any output
• SPI or I2C programmable
• Any format, any output: LVPECL, LVDS, HCSL, LVCMOS, HSTL, SSTL and CML
• Clockbuilder Pro simplifies configuration
• Independent Output clock supply pins eliminate external
level translator
• Low phase jitter: < 100 fs
• Si5341: 4-input, 10 output in 9x9mm 64-QFN (3.3, 2.5, 1.8 V)
• Si5340: 4-input, 4 output in 7x7mm 74-QFN
www.silabs.com/custom-timing
www.silabs.com/CBPro
Si5335/38 FEATURES
• Generates any frequency on any output, from 160 kHz
to 350 MHz and select frequencies to 710 MHz
• Exact clock synthesis (0 ppm error)
• Crystal or clock input
• 4 differential outputs or 8 single-ended outputs
• Any format, any output: LVPECL, LVDS, HCSL,
LVCMOS, HSTL, SSTL and CML
• Independent VDDO per output eliminates external
level translators (1.5, 1.8, 2.5, 3.3 V)
• Low phase jitter: 1 ps rms
• I2C programmable or pin-controlled
• Excellent PSRR, no discrete components
• Spread spectrum clock generation
• User-definable control pins: Powerdown,
Output Enable, Frequency Select, Spread Select
• Factory-customizable clocks with two-week lead times
www.silabs.com/custom-timing
PART NUMBER
CONTROL
CLOCK
INPUT/
OUTPUTS
INPUT
FREQUENCY
(MHZ)
OUTPUT
FREQUENCY
(MHZ)
PHASE
JITTER
(RMS)
VDD (V)
VDDO (V)
OUTPUT
PACKAGE
Si5340
I2C
1/4
10 - 750 (Clock),
25, 48-54 (Crystal)
100 Hz - 712.5 MHz
0.1 ps
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS, LVDS, LVPECL, HCSL,
SSTL, HSTL, CML
QFN44
Si5341
I2C
1/10
10 - 750 (Clock),
25, 48-54 (Crystal)
100 Hz - 712.5 MHz
0.1 ps
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS, LVDS, LVPECL, HCSL,
SSTL, HSTL, CML
QFN64
Si5335
Pin
1/4
10 - 350 (Clock),
25/27 (Xtal)
1 - 350 MHz
1.0 ps
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS, LVDS, LVPECL, HCSL,
SSTL, HSTL, CML
QFN24
Si5338
I2C
1/4
5 - 710 (Clock),
8 - 30 (Xtal)
0.16 - 710 MHz
0.16 - 350 MHz
0.16 - 200 MHz
1.0 ps
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS, LVDS, LVPECL, HCSL,
SSTL, HSTL, CML
QFN24
Silicon Labs Solution
Conventional Approach
XO
XO
66.666 MHz 3.3 V CMOS
50 MHz 2.5 V LVPECL
XO
100 MHz 3.3 V HCSL
Si5340
Si5338
100 MHz 3.3 V HCSL
FPGA
PCIe Gen 1/2/3
PCIe Gen 1/2/3
100 MHz 2.5 V LVDS
Processor
50 MHz 2.5 V LVPECL
FPGA
XO
66.666 MHz 3.3 V CMOS
Processor
GbE PHY
100 MHz 2.5 V LVDS
GbE PHY
CLOCK TREE SIMPLIFIED
9 Timing Solutions Selector Guide
PCI Express Clock Generators (PCIe)
Silicon Labs offers the lowest power, highest performance PCI-Express clock generators on the market. All devices feature
low-power push-pull output buffer technology, providing benefits of low power consumption, reduced external terminating
resistors and smaller packaging. To optimize performance, the devices support programmable drive strength, rise/fall times
and output impedance. Down spread spectrum clock generation is also supported. The devices support the standard PCIe
HCSL signaling format and can be externally terminated to support LVPECL, LVDS or CML levels.
PCIe CLOCK GENERATOR FEATURES
• Complete portfolio of PCI Express Gen 1/2/3 clocks/buffers
• Push-pull HCSL output buffer technology
• Fully integrated termination resistors on PCIe outputs
• Low power consumption
• Programmable spread spectrum
• Pin strapping to enable spread spectrum
• I2C/SMBus programmable
• Supports optional LVPECL, LVDS, or CML levels
• -40 to 85 °C operation
• Individual output enable control
• Small form factor QFN and TDFN packaging
PART NUMBER
CONTROL
CLOCK
INPUT/
OUTPUTS
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
PHASE
JITTER
(RMS)
VDD
VDDO
OUTPUT
PACKAGE
Si52111
—
1/1
25 MHz
100 MHz
1.0 ps
3.3 V
3.3 V
HCSL
TDFN10
Si52112
—
1/2
25 MHz
100 MHz
1.0 ps
3.3 V
3.3 V
HCSL
TDFN10
Si52142
Pin/I C
1/3
25 MHz
100 MHz, 25 MHz
1.0 ps
3.3 V
3.3 V
HSCL, LVCMOS
QFN24
Si52143
Pin/I2C
1/5
25 MHz
100 MHz, 25 MHz
1.0 ps
3.3 V
3.3 V
HSCL, LVCMOS
QFN24
Si52144
Pin/I2C
1/4
25 MHz
100 MHz
1.0 ps
3.3 V
3.3 V
HSCL
QFN24
Si52146
Pin/I2C
1/6
25 MHz
100 MHz
1.0 ps
3.3 V
3.3 V
HSCL
QFN32
Si52147
2
Pin/I C
1/9
25 MHz
100 MHz
1.0 ps
3.3 V
3.3 V
HSCL
QFN48
Si5335
Pin
1/4
10 - 350 (Clock),
25/27 (Xtal)
1 - 350 MHz
1.0 ps
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS, LVDS, LVPECL, HCSL, SSTL,
HSTL, CML
QFN24
Si5338
I2C
1/4
5 - 710 (Clock)
8 - 30 (Xtal)
0.16 - 710 MHz
1.0 ps
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
LVPECL, LVDS, LVCMOS, HCSL, SSTL,
HSTL
QFN24
2
Network
Processor
Network
Processor
PCIe
Switch
100 MHz
PCIe Slot
PCIe Slot
100 MHz
100 MHz
Si52144
100 MHz
SATA
Controller
IP GATEWAY
www.silabs.com | Smart. Connected. Energy-Friendly. 10
Embedded Intel x86 Clock Generators
Silicon Labs offers a family of Intel-compliant x86 clocks for embedded computing, communications and industrial applications.
These devices provide all necessary clock generation for the CPU, memory controller (chipset north bridge), I/O controller
(chipset south bridge) as well as the latest timing requirements for industry standards such as SATA, USB, LAN, PCI Express
and legacy PCI.
EMBEDDED INTEL x86 CLOCK GENERATOR FEATURES
• Clocking support for Intel processors
• Multi-PLL architecture for flexible, independent clocking
• Low-power push-pull differential buffers
• Available true differential current steering buffers
• Signal power management for notebook applications
• Dynamic enable/disable for PCIe hot plug applications
• Integrated voltage regulator and damping resistors
on differential clocks
• Integrates external graphics clocking requirements
• Available center spread LCD clock for optimized
display screen EMI reduction
• Integrated LAN clock for cost/component savings
• Integrated IEEE1394 clock for cost/space
component savings
• 8-step programmable slew rate control for rise
time and fall time control
• Dynamic independent PLL overclocking for
enthusiast applications
• Underclocking capabilities for power management
support and debugging
• Industry-best spread spectrum technology
for optimum system EMI reduction
PART NUMBER
CONTROL
CLOCK
INPUT/
OUTPUTS
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
VDD
VDDO
OUTPUT
PACKAGE
SL28EB717
Pin/I2C
1/13
25 MHz
12 MHz, 14.318 MHz, 25 MHz,
33 MHz, 48 MHz, 75 MHz, 96 MHz,
83.33 MHz-166 MHz, 100 MHz
3.3 V
3.3 V
LVCMOS, HCSL
48QFN
SL28EB740
Pin/I2C
1/16
25 MHz
12 MHz, 14.318 MHz, 25 MHz,
33 MHz, 48 MHz, 75 MHz, 96 MHz,
83.33 MHz-166 MHz, 100 MHz
3.3 V
3.3 V
LVCMOS, HCSL
TSSOP56
SL28EB742
Pin/I2C
1/16
14.318 MHz
14.3 MHz, 18 MHz, 33 MHz, 48 MHz,
96 MHz, 100 MHz, 133 MHz, 166 MHz
3.3 V
3.3 V
LVCMOS, HCSL
QFN56
SL28748
I2C
1/7
14.318 MHz
14.3 MHz, 27 MHz, 96 MHz, 100 MHz, 133 MHz
3.3 V
3.3 V
LVCMOS, HCSL
QFN32
LVDS
SDVO
BCLK/HPLL, 100 MHz
CPU
DOT 96, 96 MHz
SL28EB717
Embedded
Intel x86
Clock
5
SATA75, 75 MHz
PCI, 33.3 MHz
2
PCI Devices
SIO
PCIe
PCIe
2 SATA II
USB-48, 48 MHz
SYSCLK-25, 25 MHz
3 PCIe x 1
DDR II
PCIe x 1
HCSL
PCIe, 100 MHz
LPC
I/O
Hub
USB 2.0
Ethernet
SD/MMC
EMBEDDED PC
11 Timing Solutions Selector Guide
Tiny IoT Clock Generators
Silicon Labs’ highly flexible, factory programmable tiny clock LVCMOS generators can be customized to generate multiple
frequencies with significantly lower jitter, lower power and smaller size than competing solutions, making them an ideal fit
for Internet of Things (IoT) applications. Customization options are available for frequency selection, output enable control or
minimizing EMI, including customizable spread percentage, modulation rate, output impedance and rise time/fall time.
Si512xx TINY IoT CLOCK GENERATOR FEATURES
• Up to three customizable output frequencies: 3 to 200 MHz
• Accepts 8 to 48 MHz crystal or 3 to 166 MHz reference clock
• Low cycle-to-cycle jitter: <150 ps
• Low power: 2.3 mA (typ) at 48 MHz output,
25 MHz xtal, VDD = 3.3 V
• Center spread modulation from 0.25 to 1.0%,
(0.125% resolution)
• 4 custom drive strength options for each output
• Customizable control pins (PD#/OE/SSON#/FS)
• Independent VDD and VDDO — 1.8, 2.5; 3.3 V
• Ultra-compact packages
• 6-pin TDFN (1.2 mm x 1.4 mm x 0.75 mm)
• 8-pin TDFN (1.6 mm x 1.4 mm x 0.75 mm)
• Factory programmable OTP
• Two week sample lead time
PART NUMBER
CONTROL
CLOCK
INPUT/
OUTPUTS
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
PERIOD
JITTER
(PP)
VDD
VDDO
OUTPUT
PACKAGE
Si51210
Pin
1/2
3 - 166 (Clock), 8 - 48 (Xtal)
3 to 200 MHz
—
2.5 to 3.3 V
—
LVCMOS
TDFN6
Si51211
Pin
1/3
3 - 166 (Clock), 8 - 48 (Xtal)
3 to 200 MHz
—
2.5 to 3.3 V
1.8, 2.5, 3.3 V
LVCMOS
TDFN8
Si51214
Pin
1/2
3 - 166 (Clock), 8 - 48 (Xtal)
3 to 133 MHz
—
1.8 V
—
LVCMOS
TDFN6
Si51218
Pin
1/3
3 - 166 (Clock), 8 - 48 (xtal)
32 kHz to 200 MHz
—
2.5 to 3.3 V
1.8, 2.5, 3.3 V
LVCMOS
TDFN8
Si51219
Pin
1/3
3 - 166 (Clock), 8 - 48 (Xtal)
3 to 200 MHz
—
2.5 to 3.3 V
1.8, 2.5, 3.3 V
LVCMOS
TSSOP8
38 MHz/
40 MHz
CMOS/
CCD Driver/
AFE
Si51210
Tiny Clock
Generator
27 MHz
Memory
WLAN
12
MHz
Si51211
Tiny Clock
Generator
12 MHz
IP Streaming
Set Top Box
74.25 MHz/
74.1758 MHz
USB
HDMI Cable
LCD Driver
SET TOP BOX
www.silabs.com | Smart. Connected. Energy-Friendly. 12
EMI Reduction Clock Generators
Silicon Labs’ programmable spread spectrum clock generators feature a wide range of programming options, allowing system
designers to minimize EMI at the application level. Configurable parameters include spread spectrum percentage/modulation
rate, programmable edge rates, programmable output impedance and programmable skew.
EMI REDUCTION CLOCK GENERATOR FEATURES
• Output frequencies from 1 to 350 MHz
• CLKOUT, REFCLK or SSCLK output options
• CLKIN or XO input options
• 8 to 48 MHz crystal input range
• 1 to 166 MHz clock input range
• Spread percent from 0 to 5.0%
• Down or center spread options
• Spread modulation frequency from 16 to 128 kHz
• On-chip load caps 8 to 20 pF
• User-definable control pins Powerdown,
Output Enable, Spread Enable, Frequency
Select, Spread Select control pins
• 7 programmable tr/tf options
• Industry’s smallest SSCG: 1.2 mm x 1.4 mm
PART NUMBER
CONTROL
CLOCK
INPUT/
OUTPUTS
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
PHASE
JITTER
(RMS)
VDD
VDDO
OUTPUT
PACKAGE
SL16020DC
Pin/I2C
1/2
27 (Xtal)
27 MHz, 100 MHz
—
3.3 V
—
LVCMOS
TDFN10
Si5335
Pin
1/4
10 - 350 (Clock), 25/27 (Xtal)
1 - 350 MHz
1.0 ps
1.8, 2.5, 3.3 V
1.8, 2.5, 3.3 V
LVCMOS, LVDS, LVPECL,
HCSL, SSTL, HSTL, CML
QFN24
Si51210
Pin
1/2
3 - 166 (Clock), 8 - 48 (Xtal)
3 - 200 MHz
—
2.5 - 3.3 V
—
LVCMOS
TDFN6
Si51211
Pin
1/3
3 - 166 (Clock), 8 - 48 (Xtal)
3 - 200 MHz
—
2.5 - 3.3 V
1.8, 2.5, 3.3 V
LVCMOS
TDFN8
Si51214
Pin
1/2
3 - 166 (Clock), 8 - 48 (Xtal)
3 - 133 MHz
—
1.8 V
—
LVCMOS
TDFN6
Si51219
Pin
1/3
3 - 166 (Clock), 8 - 48 (Xtal)
3 - 200 MHz
—
2.5 - 3.3 V
1.8, 2.5, 3.3 V
LVCMOS
TSSOP8
Si52142
Pin/I2C
1/3
25 MHz
100 MHz, 25 MHz
1.0 ps
3.3 V
3.3 V
HSCL, LVCMOS
QFN24
Si52143
Pin/I2C
1/5
25 MHz
100 MHz, 25 MHz
1.0 ps
3.3 V
3.3 V
HSCL, LVCMOS
QFN24
Si52144
Pin/I C
1/4
25 MHz
100 MHz
1.0 ps
3.3 V
3.3 V
HSCL
QFN24
Si52146
Pin/I C
1/6
25 MHz
100 MHz
1.0 ps
3.3 V
3.3 V
HSCL
QFN32
Si52147
Pin/I2C
1/9
25 MHz
100 MHz
1.0 ps
3.3 V
3.3 V
HSCL
QFN48
2
2
Ethernet
Low Power
Wake-on-LAN
Si51219
Tiny Clock
Generator
IEEE 1384
Processor
WLAN
USB
8-bit USB MCU
Print Head
Paper Tray
Photos
DDR
—OR—
LCD Panel
32-bit MCU
HDD
SATA
Controller
SL28SRC02
Clock
Generator
PRINTER
13 Timing Solutions Selector Guide
Jitter Attenuators
REQUEST SAMPLES AND DOWNLOAD DOCUMENTATION AT: www.silabs.com/clocks
Single / Multi-DSPLL Jitter Attenuators
Silicon Labs’ jitter attenuators generate any combination of output frequencies from any input frequency with industry-leading
jitter performance (100 fs RMS). Based on Silicon Labs’ innovative 4th-generation DSPLL architecture, these devices simplify
clock tree design by replacing multiple clocks and oscillators, thereby minimizing BOM count and complexity.
JITTER ATTENUATOR FEATURES
• Generates any frequency on any output (1 kHz - 712.5 MHz)
• Ultra-low jitter: 100 fs RMS (12 kHz - 20 MHz)
• Integrated loop filter with selectable loop bandwidth
• Hitless switching with phase buildout (auto/manual)
• Synchronous, freerun and holdover modes
• Best-in-class PSRR
• Dynamically reconfigurable output frequency (per output)
• Fast-lock: <100 ms
• Serially programmable via I2C/SPI
• Any format, any output: LVPECL, CML, LVDS,
HCSL, LVCMOS
• Independent VDDO
• In-circuit programmable
• Easy-to-use ClockBuilder Pro* configuration software
*see page 19 for more about ClockBuilder Pro
PART
NUMBER
# OF
PLLS
CONTROL
CLOCK
INPUTS /
OUTPUTS
INPUT
FREQUENCY
(MHz)
Si5317
1
I2C/SPI
1/1
0.002 - 710
0.002 - 710
0.3
60 Hz - 8 kHz
Si5319
1
I2C/SPI
1/1
0.002 - 710
0.002 - 1417
0.3
60 Hz - 8 kHz
√
Si5326
1
I2C/SPI
2/2
0.002 - 710
0.002 - 1417
0.3
60 Hz - 8 kHz
√
Si5342
1
I C/SPI
4/2
0.002 - 710
0.001 - 712.5
0.1
0.1 Hz - 4 kHz
2
OUTPUT
FREQUENCY
(MHz)
JITTER
(PS)
PLL
BANDWIDTH
HITLESS
SWITCHING
DIGITAL
HOLD
SIGNAL FORMAT
PACKAGE
LVPECL, LVDS, CML, LVCMOS
QFN36
LVPECL, LVDS, CML, LVCMOS
QFN36
√
LVPECL, LVDS, CML, LVCMOS, HCSL
QFN36
√
√
LVPECL, LVDS, CML, LVCMOS, HCSL
QFN44
Si5344
1
I C/SPI
4/4
0.008 - 750
0.001 - 712.5
0.1
0.1 Hz - 4 kHz
√
√
LVPECL, LVDS, CML, LVCMOS, HCSL
QFN64
Si5345
1
I2C/SPI
4/10
0.008 - 750
0.001 - 712.5
0.1
0.1 Hz - 4 kHz
√
√
LVPECL, LVDS, CML, LVCMOS, HCSL
QFN64
Si5346
2
I2C/SPI
4/4
0.008 - 750
0.001 - 712.5
0.1
0.1 Hz - 4 kHz
√
√
LVPECL, LVDS, CML, LVCMOS, HCSL
QFN44
Si5347
4
I2C/SPI
4/8 or 4
0.008 - 750
0.001 - 712.5
0.1
60 Hz - 4 kHz
√
√
LVPECL, LVDS, CML, LVCMOS, HCSL
QFN64
Si5375
4
IC
4/4
0.002 - 710
0.002 - 808
0.4
60 Hz - 8 kHz
√
LVPECL, LVDS, CML, LVCMOS, HCSL
BGA80
2
2
Si5347 Quad DSPLL
Jitter Attenuator
100G
Optical
Module
Gearbox
4 x 25G to
10 x 10G
Si5341
AnyFrequency
Clock
Generator
OTN
Processing
100G
Optical
Module
Network
Processor
FPGA
100G OTN TRANSPONDER
www.silabs.com | Smart. Connected. Energy-Friendly. 14
4G/LTE JESD204B-Compliant Jitter Attenuating Clock Multipliers
REQUEST SAMPLES AND DOWNLOAD DOCUMENTATION AT: www.silabs.com/clocks
The Si5380 wireless clock generator leverages Silicon Labs’ latest 4th-generation DSPLL technology to address the stringent
form factor, power and performance requirements demanded by small cell and remote radio head (RRH) applications. The
Si5380 is the industry’s first wireless clock generator capable of replacing discrete high-performance VCXO-based clocks with
a fully integrated CMOS IC solution. The resulting solution is optimized for small form factor base station designs in terms of
integration, size and power while delivering unparalleled performance and ease of use.
PART
NUMBER
# OF
PLLS
CONTROL
CLOCK
INPUTS / OUTPUTS
INPUT
FREQUENCY
(MHz)
OUTPUT
FREQUENCY
(MHz)
JITTER
(PS)
PLL
BANDWIDTH
HITLESS
SWITCHING
DIGITAL
HOLD
SIGNAL
FORMAT
PACKAGE
Si5380
1
I2C/SPI
4/12
10-750
0.480 - 1474
0.07
0.1 Hz - 100 Hz
√
√
LVDS, LVPECL, CML,
HCSL, LVCMOS
QFN64
REFCLK
DCLK
Si5380
JESD204B Clock
SYSREF
GbE
PHY
PoE
WiFi
DCLK SYSREF
JESD204B
Baseband
Processing
RX AFE
+ ADCs
RX
TX AFE
+ DACs
TX
JESD204B
SYSREF
DCLK
4G/LTE SMALL CELL
15 Timing Solutions Selector Guide
Network Synchronizers
REQUEST SAMPLES AND DOWNLOAD DOCUMENTATION AT: www.silabs.com/netsync
Silicon Labs Synchronous Ethernet (SyncE) jitter attenuating clock synthesizers provide full compliance with SyncE specifications
(ITU G.8262 EEC Options 1 & 2) while providing any-frequency synthesis, jitter cleaning and wander filtering down to 0.1 Hz. The
Si5342/44/45 are the industry’s lowest jitter SyncE clocks, making them ideal for clocking Ethernet PHYs from GbE to 100 GbE.
SYNCE CLOCK FEATURES
• Fully compliant with SyncE (ITU-T G.8262) clock requirements
• Generates all SyncE rates (25, 125, 156.25 MHz) from any
input frequency
• Integrated loop filter w/ selectable loop bandwidth:
0.1 Hz, 1-10 Hz
• < 0.1 ps RMS jitter
• In-circuit programmable
• Serially programmable via I2C/SPI
• Ideal for Ethernet PHYs from GbE to 100 GbE
The Si5348 provides both SyncE (frequency) and IEEE 1588v2 PTP (time) synchronization for Telecom Boundary Clock (ITU-T
G.8273.2 T-BC) and slave clocks. With a programmable loop bandwidth down to 1 mHz, the Si5348’s three independent
PLLs can be used to support legacy network synchronization as defined by Stratum 3/3E, G.812, G.813.
SYNCE/IEEE1588 CLOCK FEATURES
• Fully compliant with SyncE (ITU-T G.8262)
• Fully compliant with Telecom Boundary (ITU-T 8273.2) and slave clock requirements
• Generates all SyncE rates (examples are 25, 125, 156.25 MHz) from any input frequency, as well as 1 pps
• Integrated loop filter w/ selectable loop bandwidth to 0.001 Hz
• Three high-performance DCOs with 1 ppt step resolution
• Universal reference input supports any frequency TCXO/OCXO
• < 0.1 ps RMS jitter
• Serially programmable via I2C/SPI
• Ideal for Ethernet PHYs from GbE to 100 GbE
PART NUMBER
CLOCK INPUTS/
OUTPUTS
INPUT CLOCK
FREQUENCY RANGE
OUTPUT CLOCK
FREQUENCY RANGE
TYP RMS PHASE JITTER
(PS)
SyncE
COMPLIANT
IEE 1588v2
COMPLIANT
PACKAGE
Si5328B
2/2
8 kHz - 710 MHz
8 kHz - 808 MHz
0.3
√
-
QFN36
Si5328C
2/2
8 kHz - 346 MHz
8 kHz - 346 MHz
0.3
√
-
QFN36
Si5342
4/2
0.008 - 750 MHz
0.001 - 712.5 MHz
0.1
√
-
QFN44
Si5344
4/4
0.008 - 750 MHz
0.001 - 712.5 MHz
0.1
√
-
QFN64
Si5345
4/10
0.008 - 750 MHz
0.001 - 712.5 MHz
0.1
√
-
QFN64
Si5348
5/7
0.008 - 750 MHz
1 pps to 712.5 MHz
0.1
√
√
QFN64
Telecom or Ethernet System switch backplane
Backplane Clocks
12C/SPI DCO
control
for 1588
1 pps
REFCLK
156.25 MHz
GPS
Si5348
SyncE/
1588
Clock
TCXO/
OCXO
Switch Fabric SoC, ASIC, FPGA
RX/
REFCLK
MUX
RXCLK
RXCLK
156.25 MHz TX CLK
MCU
RXCLK
10G
PHY
RXCLK
10G
PHY
10G
PHY
Packets Packets Packets
10G
PHY
Packets
10G SYNCE/IEEE 1588 ETHERNET SWITCH
www.silabs.com | Smart. Connected. Energy-Friendly. 16
Silicon Labs Can Help With Every Stage of the Design Process
ACCESS ALL THESE TOOLS ON OUR WEBSITE AT www.silabs.com/timing-tools
Discover
Parametric Search Online and iPad App
Quickly jump between clock and oscillator product families. Filter results using common technical and application
requirements. Access data sheets and other documentation directly in the app and download to iBooks for offline
access. Browse detailed product information – features, applications, block diagrams and even order samples and
development kits, all from within the app. Offline access available – refresh data the next time you’re connected to
the Internet. www.silabs.com/parametric-search
Phase Noise to Jitter Calculator
Need to quickly determine the jitter requirements for a clock? This tool converts phase noise to phase jitter, period
jitter and cycle-to-cycle jitter. The resulting jitter values can be used to easily identify clocks and oscillators that meet
the requirement. www.silabs.com/jitter-calculator
Look Up or Customize an Oscillator, Clock or Buffer
Generate new part numbers and look up existing part numbers/device specifications. www.silabs.com/custom-timing
Custom Clock Trees
Clock Tree Expert is a web-based application
that generates a clock tree bill-of-material based
on your requirements. Simply enter a list of your
clocking requirements and Clock Tree Expert will
guide you to a complete timing solution in minutes.
https://design.silabs.com/
17 Timing Solutions Selector Guide
Customize and Evaluate
ClockBuilder Pro Software
Use ClockBuilder Pro for Si534x and Si538x device configuration, evaluation and generating custom part numbers.
ClockBuilder Go is a mobile app that can be used to verify the device settings for a given set of input/output
frequencies. ClockBuilder Go provides a great way to jump-start the device configuration process.
ClockBuilder Go provides an output file that can be used by ClockBuilder Pro to finish the configuration process.
www.silabs.com/CBPro
SOFTWARE
SUPPORTED DEVICES
ClockBuilder Pro
Si5340/1/2/4/5/6/7/8, Si5380
ClockBuilder Go App for iOS
Si5340/1/2/4/5/6/7
ClockBuilder Desktop Software
Si5338/51/56
ClockBuilder Web Utility
Si5335/50/55
DSPLLsim
Si531x/2x/6x/7x
www.silabs.com | Smart. Connected. Energy-Friendly. 18
Develop
ACCESS ALL THESE TOOLS ON OUR WEBSITE AT www.silabs.com/timing-devkits
Si5345 1-PLL JITTER ATTENUATING CLOCK
EVALUATION BOARD
Si5341 CLOCK GENERATOR
EVALUATION BOARD
Si5350 CLOCK GENERATOR
EVALUATION BOARD
CLOCKBUILDER PRO™ FIELD
PROGRAMMER KIT
19 Timing Solutions Selector Guide
Si5347 MULTI-PLL JITTER ATTENUATING
EVALUATION BOARD
Si5338 CLOCK GENERATOR
EVALUATION BOARD
Si52144 PCI EXPRESS BUFFER
EVALUATION BOARD
Si570 I2C OSCILLATOR
EVALUATION BOARD
Timing Solutions for Freescale QorIQ
Silicon Labs frequency flexible timing products provide clock-tree-on-a-chip functionality, simplifying interfacing with Freescale
PowerQUICC, QorIQ and LayerScape communications processors.
Freescale QorlQ
P2020
100/125 MHz 2.5v LVDS
Si5335
Any
Frequency
Clock
125 MHz 2.5v CMOS
125 MHz 2.5v CMOS
66.666 MHz 3.3V CMOS
Control Plane
SD_REFCLK
PCle
EC1_GTX
SATA
EC2_GTX
USB
SYSCLK
RS-232
Memory
125 MHz 3.3V LVDS
GbE Switch
Octal PHY
Si53306
1:4 Universal
Clock Buffer
Octal PHY
125 MHz 1.8V LVDS x 3
APPLICATION
Data Path
Octal PHY
FREESCALE QorIQ
SILICON LABS TIMING SOLUTION
P20xx, P40xx, B4xxx
•Si5345/44/42 Jitter Attenuators
•Si5341/40/38/35 Any-Frequency Clock Generators
•Si5xx XOs, Si5330x Universal Clock Buffers
Enterprise/Data Center
• Routers, switches, WLAN
• NAS, security routers
• Application delivery controller
P10xx, T10xx, P20xx, T20xx,
QorIQ LS1, QorIQ LS2
•Si521xx/Si531xx PCIe Clocks/Buffers
•Si5341/40/38/35 Any-Frequency Clock Generators
•Si5xx XOs, Si5330x Universal Clock Buffers
Industrial
• Single-board computers
• Industrial switches, routers
• Medical imaging
P10xx, T10xx, P20xx, T20xx
•Si521xx/Si531xx PCIe Clocks/Buffers
•Si5335/38 Any-Frequency Clock Generators
•Si5xx XOs, Si5330x Universal Clock Buffers
Service Provider
• Base stations
• Routers, switches
www.silabs.com | Smart. Connected. Energy-Friendly. 20
Timing Solutions for Broadcom
The Si5345/44/42 fully support ITU-T G.8262 Synchronous Ethernet clock requirements and meet the stringent jitter requirements
of Broadcom switches/PHYs for GbE, 10 GbE, 40 GbE and 100 GbE applications. No additional jitter clean-up PLLs are
necessary to achieve these requirements. With industry-leading jitter performance, the Si5345/44/42 are ideal solutions for
BCM56xxx, BCM88xxx and BCM53xxx.
Octal GbE PHY
Downlink
Octal GbE PHY
Downlink
Octal GbE PHY
Downlink
3 x 125 MHz
Si5345
Any-Frequency
Clock
25, 125, 156.25 MHz
SyncE, backplane clocks
2 x 156.25 MHz
100 MHz
25 MHz
100 MHz
PCIe 3.0
2 x 156.25 MHz
10G PHY Uplink
10G PHY Uplink
Ethernet Switch IC
CPU
APPLICATION
BROADCOM PRODUCT
FAMILY
SILICON LABS XO
SILICON LABS
CLK BUFFER
SILICON LABS
CLK GEN
Set-Top Boxes
BCM33xx
BCM7xxx
Si500
Si531xx
Si5330
Si5121x
Si521xx
DSL/G.fast/PON CPE
BCM63xx
BCM63xxx
BCM68xx
Si51x
Si531xx
Si5330
Si5121x
Si521xx
DSL CO
BCM65xx
BCM65xxx
Si51x
Si57x
Si5330x
Si533x
Si534x
xPON OLT
BCM68xxxx
BCM5553x
Si51x
Si5330x
Si533x
Si534x
CMTS
BCM3xxx
Si51x
Si5330x
Si533x
Si534x
Knowledge-Based
Processors
NLxxxx
NLSxxx
BCM12xxxx
Si51x
Si5330x
Si533x
Small Cells
BCM616xx
Si51x
Si5330x
Si521xx
Si534x
Si538x
DFE Processors
BCM510xx
Si53x
Si5330x
Si534x
Si538x
Microwave/
Mobile Backhaul
BCM85xxx
Si53x
Si5330x
Si534x
Si538x
GbE/FE PHY
BCM54xxx
Si51x
Si5330x
Si533x
Si534x
GbE/FE Switch
BCM53xxx
Si51x
Si5330x
Si533x
10/40GbE PHY
BCM8xxx
BCM84xxx
Si53x
Si5330x
Si534x
10/40/100GbE Switch
BCM56xxx
Si53x
Si5330x
Si534x
BROADBAND
ACCESS
ENTERPRISE +
NETWORK
PROCESSORS
WIRELESS
INFRASTRUCTURE
ETHERNET
COMMUNICATION +
SWITCHING
21 Timing Solutions Selector Guide
Timing Solutions for Altera and Xilinx
GENERAL
PURPOSE
WIRED
COMM.
WIRELESS
AUDIO &
VIDEO
PROTOCOL
ALTERA
STRATIX
ALTERA
ARRIA
ALTERA
CYCLONE
XILINX 7
SERIES
XILINX
ULTRASCALE
SILICON
LABS XOS
SILICON
LABS CLK
BUFFER
SILICON
LABS
CLK GEN
PCI Express
√
√
√
√
√
Si51x
Si5315x
Si5214x
QPI
√
-
-
√
√
Si51x
Si5330x
Si533x
Fibre Channel
√
√
-
√
√
Si51x
Si5330x
Si533x
SAS/SATA
√
√
√
√
√
Si51x
Si5315x
Si533x
Gigabit Ethernet
√
√
√
√
√
Si51x
Si5330x
Si533x
10G Ethernet
√
-
-
√
√
Si53x
Si5330x
Si534x
40G Ethernet
√
-
-
√
√
Si53x
Si5330x
Si534x
100G Ethernet
√
-
-
√
√
Si53x
Si5330x
Si534x
OTN
√
-
-
√
√
Si53x
Si5330x
Si534x
SONET
√
√
√
√
√
Si53x
Si5330x
Si534x
SFI
√
√
-
√
√
Si53x
Si5330x
Si534x
Interlaken
√
√
-
√
√
Si53x
Si5330x
Si534x
CEI
√
√
-
√
√
Si53x
Si5330x
Si534x
PON
√
√
-
√
√
Si51x
Si5330x
Si533x
CPRI
√
√
√
√
√
Si53x
Si5330x
Si534x
SRIO
√
√
√
√
√
Si51x
Si5330x
Si534x
JESD204B
√
√
-
√
√
Si53x
Si5330x
Si538x
3G-SDI
√
√
√
√
√
Si51x
Si5330x
Si534x
Display Port
-
√
√
-
-
Si51x
Si5330x
Si535x
www.silabs.com | Smart. Connected. Energy-Friendly. 22
Smart. Connected. Energy-Friendly.
©2015, SILICON LABORATORIES INC. SILICON LABS AND THE SILICON LABS LOGO ARE TRADEMARKS OR REGISTERED TRADEMARKS OF SILICON LABORATORIES INC. ALL OTHER PRODUCT
OR SERVICE NAMES ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. FOR THE MOST UP-TO-DATE INFORMATION, PLEASE SEE YOUR SALES REPRESENTATIVE OR VISIT OUR WEBSITE AT
WWW.SILABS.COM. PRINT. CSI 1000. SEPTEMBER 2015, REV K SEL-TIMING.