Si88xxxISO-EVB S I8 8 X X X I S O - E V B U S E R ’S G U I D E Description Si88xxxISO-EVB Overview This document describes Si88xxxISO-EVB. the operation of the Kit Contents The Si88xxxISO Evaluation Kit contains the following items: Si88xxxISO-EVB Si88241ED-IS installed on the evaluation board. Hardware Overview and Setup Power the EVB by applying a 3.0 to 5.5 V dc supply to terminal block J1. The isolated output is available at terminal block J2. Test points for these are available at the upper edge of the EVB. The default EVB configuration has the header JP13 shorted, so the dc-dc output powers the VDDB supply (U1 pin 19) of the Si88241ED-IS. The acceptable input voltage to the VDDB supply pin is 3.0 to 5.5 V. If the user chooses to generate an output voltage outside this voltage range, the jumper at JP13 must be removed and a separate supply source connected to VDDB through JP13. To measure input supply current, clip a differential probe across JP12 to access each side of sense resistor R20. The SH input (U1 pin 7) disables the dc-dc converter function. Install a jumper across JP9 to pull the SH input high and disable the dc-dc converter. If interfacing to an external controller board through the JP9 header, the controller must drive SH low for normal operation and high to disable the dc-dc. The EVB has a series of headers for connecting to each digital channel. The inside conductor of each 2x1 header is connected to the device pin and the outer conductor is tied to ground through a protection resistor. Connect to each side of the Si88xxxISO-EVB to external controllers through a two-row ribbon cables with one row grounded. Rev. 0.1 Copyright © 2015 by Silicon Laboratories Si88xxxISO-EVB J1 1 2 VDDA D20 5.6V *1 D21 RED Valid range: 3.3V to 5V +/- 10% Input Power Supply Rev. 0.1 499 R27 499 R26 499 R25 499 R24 JP9 JP4 JP3 JP2 JP1 JP10 TP5 SH R23 10K TP1 VDDA SH A4 A3 A2 A1 U1 VDDA VOUT Si88241 B4 B3 B2 B1 *4 TP3 VOUT JP8 JP7 JP6 JP5 JP11 499 R31 499 R30 499 R29 499 R28 TP4 GNDB Figure 1. Si88xxxISO-EVB Schematic (1 of 2) VDDA *5 *3 TP2 GNDA VDDA GNDA R21 10K VOUT 2 GNDB add zener protection 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 0000000000 *5 D22 RED *2 2 1 J2 DO NOT connect an external power supply to J2 This is an OUTPUT R22 10K VOUT Si88xxxISO-EVB 1. Si88xxxISO-EVB Schematics GNDA VDDA 0.25 R20 JS2 JP12 Can be used to measure input current Rev. 0.1 10uF 2uH T1 B4 B3 B2 B1 COMP VSNS NC VREG VDDB GNDB TP9 16 11 12 13 14 15 R7 49.9K 1.5nF C11 0.1uF 17 C12 JP13 JS1 18 COMP C8 100pF 19 20 GNDB R8 100 D1 DB2440100L 10uF 0.1uF B2 B1 C10 C9 R6 13.3K R5 49.9K Figure 2. Si88xxxISO-EVB Schematic (2 of 2) B4 5 8 T1_SEC B3 Si88241 A4 A3 A2 A1 SH GNDA VDDA VDDP VSW GNDP U1 2 3 TP8 A4 10 9 8 7 6 5 4 3 2 1 TP7 VSW TP6 A3 A2 A1 SH C5 0.1uF C3 0.1uF C2 10uF C1 T1_PRI For VOUT of 3.3V, change R1 to 43.2k and R2 to 20.0k Default EVB Converter Configuration: VDDA = 3.3V to 5V +/- 10% VOUT = 5V ISOLATION VDDA VDDA VOUT Testpoint for COMP pin COMP TP10 COMP VOUT GNDB VOUT Si88xxxISO-EVB 3 Si88xxxISO-EVB 2. Si88xxxISO-EVB Layout Bottom Top Figure 3. Si88xxxISO-EVB Layout 4 Rev. 0.1 Si88xxxISO-EVB 3. Bill of Materials Table 1. Si88xxxISO-EVB Bill of Materials Part Reference Description Mfr Mfr Part Number C1 C2 C10 CAP, 10 µF, 10 V, ±10%, X7R, 1206 Venkel C1206X7R100-106K C3 C5 C9 C12 CAP, 0.1 µF, 10 V, ±10%, X7R, 0603 Venkel C0603X7R100-104K C8 CAP, 100 pF, 50 V, ±10%, X7R, 0603 Venkel C0603X7R500-101K C11 CAP, 1.5 nF, 16 V, ±10%, X7R, 0603 Venkel C0603X7R160-152K D1 DIO, FAST, 40 V, 1.0A, SOD-128 Panasonic DB2440100L D20 DIO, ZENER, 5.6 V, 500 mW, SOD123 On Semi MMSZ5232BT1 D21 D22 LED, RED, 631 nM, 20 mA, 2 V, 54mcd, 0603 Lite-On LTST-C190KRKT J1 J2 CONN, TERM BLOCK 2POS, 5MM PCB Phoenix Contact 1729018 JP1 JP2 JP3 JP4 JP5 JP6 JP7 JP8 JP9 JP10 JP11 JP12 JP13 Header, 2x1, 0.1in pitch, Tin Plated Samtec TSW-102-07-T-S JS1 JS2 Shunt, 1x2, 0.1in pitch, Tin plating Samtec SNT-100-BK-T MH1 MH2 MH3 MH4 HDW, Screw, 4-40 x 1/4" Pan Head, Slotted, Nylon Richco Plastic Co NSS-4-4-01 R5 R7 RES, 49.9K, 1/10W, ±1%, ThickFilm, 0603 Venkel CR0603-10W-4992F R6 RES, 13.3K, 1/16W, ±1%, ThickFilm, 0603 Venkel CR0603-16W-1332F R8 RES, 100 , 1/16W, ±1%, ThickFilm, 0603 Venkel CR0603-16W-1000F R20 RES, 0.25 , 1/2W, ±1%, ThickFilm, 1206 Venkel LCR1206-R250J R21 R22 R23 RES, 10K, 1/10W, ±5%, ThickFilm, 0603 Venkel CR0603-10W-103J R24 R25 R26 R27 R28 R29 R30 R31 RES, 499 , 1/10W, ±1%, ThickFilm, 0603 Venkel CR0603-10W-4990F SO1 SO2 SO3 SO4 HDW, STANDOFF, 1/4" HEX, 4-40x3/4", NYLON Keystone 1902D T1 TRANSFORMER, POWER, FLYBACK, 2.0 µH PRIMARY, 100 nH LEAKAGE, 1:4, 1 TAP, SMT UMEC UTB02185S TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TESTPOINT, BLACK, PTH Kobiconn 151-203-RC U1 IC, ISOLATOR, DC DC Internal Switch, SH, 4 Digital Ch, SO20 WB Silicon Labs Si88241ED-IS Rev. 0.1 5 Si88xxxISO-EVB 4. Si88xxxISO-EVB Ordering Guide Table 2. Si88xxxISO-EVB Ordering Guide 6 Ordering Part Number (OPN) Description Si88xxxISO-KIT Si88xxx dc-dc digital isolator evaluation board kit Rev. 0.1 Si88xxxISO-EVB CONTACT INFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.siliconlabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. Patent Notice Silicon Labs invests in research and development to help our customers differentiate in the market with innovative low-power, small size, analogintensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class engineering team. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. Rev. 0.1 7