PA K 33 PSMN9R8-30MLC LF N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology Rev. 3 — 15 June 2012 Product data sheet 1. Product profile 1.1 General description Logic level enhancement mode N-channel MOSFET in LFPAK33 package. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits Low parasitic inductance and resistance Optimised for 4.5V Gate drive utilising NextPower Superjunction technology Ultra low QG, QGD, & QOSS for high system efficiencies at low and high loads 1.3 Applications DC-to-DC converters Synchronous buck regulator Load switching 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj = 25 °C - - 30 V ID drain current Tmb = 25 °C; VGS = 10 V; see Figure 1 - - 50 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 Tj junction temperature - - 45 W -55 - 175 °C VGS = 4.5 V; ID = 15 A; Tj = 25 °C; see Figure 10 - 10.65 12.4 mΩ VGS = 10 V; ID = 15 A; Tj = 25 °C; see Figure 10 - 8.5 9.8 mΩ Static characteristics RDSon drain-source on-state resistance Dynamic characteristics QGD gate-drain charge VGS = 4.5 V; ID = 15 A; VDS = 15 V; see Figure 12; see Figure 13 - 1.5 - nC QG(tot) total gate charge VGS = 4.5 V; ID = 15 A; VDS = 15 V; see Figure 12; see Figure 13 - 5 - nC PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol D G mbb076 1 2 3 S 4 SOT1210 (LFPAK33) 3. Ordering information Table 3. Ordering information Type number Package PSMN9R8-30MLC Name Description Version LFPAK33 Plastic single ended surface mounted package (LFPAK33); 4 leads SOT1210 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj = 25 °C - 30 V VGS gate-source voltage -20 20 V ID drain current VGS = 10 V; Tmb = 25 °C; see Figure 1 - 50 A VGS = 10 V; Tmb = 100 °C; see Figure 1 - 36 A IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; see Figure 4 - 202 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 45 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C VESD electrostatic discharge voltage MM (JEDEC JESD22-A115) 140 - V Source-drain diode IS source current Tmb = 25 °C - 41 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 202 A VGS = 10 V; Tj(init) = 25 °C; ID = 50 A; Vsup ≤ 30 V; RGS = 50 Ω; unclamped; see Figure 3 - 8 mJ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy PSMN9R8-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 2 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj426 60 ID (A) Pder (%) 40 80 20 40 0 0 Fig 1. 03na19 120 50 100 150 0 Tmb 200 (°C) 0 50 100 150 200 Tmb (°C) Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aaj427 102 IAL (A) 10 (1) (2) 1 10-1 10-3 Fig 3. 10-2 10-1 1 tAL 10 (ms) Single pulse avalanche rating; avalanche current as a function of avalanche time PSMN9R8-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 3 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj428 103 ID (A) Limit RDSon = VDS / ID 102 tp =10 μ s 100 μ s 10 DC 1 ms 1 10 ms 100 ms 10-1 10-1 Fig 4. 1 10 102 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base see Figure 5 - 3.1 3.32 K/W 003aaj429 10 Zth(j-mb) (K/W) δ = 0.5 1 0.2 0.1 0.05 10 δ= P -1 0.02 tp T single shot t tp T 10-2 10-6 Fig 5. 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN9R8-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 4 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit - - V Static characteristics V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 30 ID = 250 µA; VGS = 0 V; Tj = -55 °C 27 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C 1.3 1.64 1.95 V ∆VGS(th)/∆T gate-source threshold voltage variation with temperature - -4 - mV/K IDSS drain leakage current VDS = 30 V; VGS = 0 V; Tj = 25 °C - - 1 µA VDS = 30 V; VGS = 0 V; Tj = 150 °C - - 100 µA VGS = 16 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = -16 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = 4.5 V; ID = 15 A; Tj = 25 °C; see Figure 10 - 10.65 12.4 mΩ VGS = 4.5 V; ID = 15 A; Tj = 150 °C; see Figure 11; see Figure 10 - - 21.1 mΩ VGS = 10 V; ID = 15 A; Tj = 25 °C; see Figure 10 - 8.5 9.8 mΩ VGS = 10 V; ID = 15 A; Tj = 150 °C; see Figure 11; see Figure 10 - - 16.75 mΩ f = 1 MHz 0.9 1.8 3.6 Ω ID = 15 A; VDS = 15 V; VGS = 10 V; see Figure 12; see Figure 13 - 10.9 - nC ID = 15 A; VDS = 15 V; VGS = 4.5 V; see Figure 12; see Figure 13 - 5 - nC ID = 0 A; VDS = 0 V; VGS = 10 V - 10 - nC ID = 15 A; VDS = 15 V; VGS = 4.5 V; see Figure 12; see Figure 13 - 2 - nC - 1.2 - nC IGSS RDSon RG gate leakage current drain-source on-state resistance gate resistance Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGS(th) pre-threshold gate-source charge QGS(th-pl) post-threshold gate-source charge - 0.8 - nC QGD gate-drain charge - 1.5 - nC VGS(pl) gate-source plateau voltage ID = 15 A; VDS = 15 V; see Figure 12; see Figure 13 - 3.1 - V Ciss input capacitance - 690 - pF Coss output capacitance VDS = 15 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; see Figure 14 - 170 - pF Crss reverse transfer capacitance - 52 - pF PSMN9R8-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 5 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit td(on) turn-on delay time - 7.4 - ns tr rise time VDS = 15 V; RL = 1 Ω; VGS = 4.5 V; RG(ext) = 5 Ω - 7.7 - ns td(off) turn-off delay time - 11.7 - ns tf fall time Qoss output charge - 5.3 - ns VGS = 0 V; VDS = 15 V; f = 1 MHz; Tj = 25 °C - 4.9 - nC Source-drain diode VSD source-drain voltage IS = 15 A; VGS = 0 V; Tj = 25 °C; see Figure 15 - 0.84 1.1 V trr reverse recovery time - 12.9 - ns Qr recovered charge IS = 15 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 15 V - 5.3 - nC ta reverse recovery rise time VGS = 0 V; IS = 15 A; dIS/dt = -100 A/µs; VDS = 15 V; see Figure 16 - 7.9 - ns tb reverse recovery fall time - 5 - ns ID (A) 003aaj430 50 10 4.5 003aaj431 30 3.5 RDSon (mΩ) 40 20 30 3 20 2.8 10 2.6 10 VGS (V) = 2.4 2.2 0 0 Fig 6. 1 2 3 VDS(V) 0 4 Output characteristics; drain current as a function of drain-source voltage; typical values PSMN9R8-30MLC Product data sheet 0 Fig 7. 4 8 12 VGS (V) 16 Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 6 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj432 60 003aaj433 50 ID (A) gfs (S) 40 40 30 20 20 Tj = 150 °C 10 Tj = 25 °C 0 0 Fig 8. 10 20 30 40 ID (A) 0 50 Forward transconductance as a function of drain current; typical values 0 Fig 9. 2.8 RDSon (mΩ) 2 3 4 VGS (V) Transfer characteristics; drain current as a function of gate-source voltage; typical values 003aaj436 50 1 003aaj437 2 3 a 10V 40 1.5 VGS=4.5V 30 3.5 1 4.5 0.5 20 10 VGS (V) = 10 0 5 15 25 35 45 ID (A) 55 Fig 10. Drain-source on-state resistance as a function of drain current; typical values PSMN9R8-30MLC Product data sheet 0 -60 0 60 120 Tj (°C) 180 Fig 11. Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 7 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj438 10 VGS (V) VDS 8 ID 6V 6 24 V VGS(pl) VGS(th) 4 VDS = 15 V VGS QGS1 QGS2 QGS 2 QGD QG(tot) 003aaa508 Fig 12. Gate charge waveform definitions 5 10 QG (nC) 15 003aaj440 50 IS (A) Ciss C (pF) 0 Fig 13. Gate-source voltage as a function of gate charge; typical values 003aaj439 103 0 40 Coss 30 Crss 20 102 Tj = 150°C 10 10 10-1 1 10 VDS (V) 102 Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values PSMN9R8-30MLC Product data sheet Tj = 25 °C 0 0 0.3 0.6 0.9 VSD(V) 1.2 Fig 15. Source current as a function of source-drain voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 8 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003a a f 444 ID (A) trr ta tb 0 0.25 IRM I RM t (s ) Fig 16. Reverse recovery timing definition PSMN9R8-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 9 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 7. Package outline Plastic single ended surface mounted package (LFPAK33); 8 leads E A A e1 c1 b1 L SOT1210 E1 mounting base D1 D H 1 4 e b w X A A1 c C θ Lp y C detail X 0 2.5 Dimensions Unit(1) mm 5 mm scale A A1 b b1 c c1 D(1) D1 E(1) E1 e e1 H L Lp w y 3.40 0.25 0.50 max 0.90 0.10 0.35 0.35 0.20 0.30 2.70 2.35 3.40 2.45 nom 0.65 0.65 0.20 0.10 3.20 0.13 0.30 min 0.80 0.00 0.25 0.25 0.10 0.20 2.50 1.90 3.20 2.00 Note 1. Plastic or metal protrusions of 0.15 mm per side are not included. Outline version JEDEC 8° 0° sot1210_po References IEC θ JEITA European projection Issue date 11-12-19 12-03-12 SOT1210 Fig 17. Package outline SOT1210 (LFPAK33) PSMN9R8-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 10 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PSMN9R8-30MLC v.3 20120615 Product data sheet - PSMN9R8-30MLC v.2 - PSMN9R8-30MLC v.1 Modifications: PSMN9R8-30MLC v.2 PSMN9R8-30MLC Product data sheet • • Status changed from objective to product. Various changes to content. 20120607 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 11 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 9. Legal information 9.1 Data sheet status Document status[1] [2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URLhttp://www.nxp.com. 9.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 9.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. 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Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with theTerms and conditions of commercial sale of NXP Semiconductors. PSMN9R8-30MLC Product data sheet Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 12 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published athttp://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 9.4 Trademarks Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. Adelante,Bitport,Bitsound,CoolFlux,CoReUse,DESFire,EZ-HV,FabKey,G reenChip,HiPerSmart,HITAG,I²C-bus logo,ICODE,I-CODE,ITEC,Labelution,MIFARE,MIFARE Plus,MIFARE Ultralight,MoReUse,QLPAK,Silicon Tuner,SiliconMAX,SmartXA,STARplug,TOPFET,TrenchMOS,TriMedia andUCODE — are trademarks of NXP B.V. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the HD Radio andHD Radio logo — are trademarks of iBiquity Digital Corporation. 10. Contact information For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:[email protected] PSMN9R8-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 13 of 14 PSMN9R8-30MLC NXP Semiconductors N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 15 June 2012 Document identifier: PSMN9R8-30MLC