BF1217WR N-channel dual gate MOSFET Rev. 2 — 20 June 2011 Product data sheet 1. Product profile 1.1 General description Enhancement type N-channel field-effect transistor with source and substrate interconnected. Integrated diodes between gates and source protect against excessive input voltage surges. The BF1217WR is encapsulated in the SOT343R plastic package. CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling. 1.2 Features and benefits Excellent low frequency noise performance Superior cross modulation performance during AGC High forward transfer admittance High forward transfer admittance to input capacitance ratio 1.3 Applications Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply voltage digital and analog television tuners professional communication equipment BF1217WR NXP Semiconductors N-channel dual gate MOSFET 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit - - 6 V - - 30 mA - - 180 mW 23 27 38 mS VDS drain-source voltage DC ID drain current DC Ptot total power dissipation Tsp 107 C yfs forward transfer admittance f = 100 MHz; Tj = 25 C; ID = 18 mA Ciss(G1) input capacitance at gate1 f = 100 MHz [2] - 2.5 - pF Crss reverse transfer capacitance f = 100 MHz [2] - 20 - fF NF noise figure - 1.0 - dB - 1.5 - dB 105 107 - dBV - - 150 C [1] f = 400 MHz; YS = YS(opt) f = 800 MHz; YS = YS(opt) Xmod cross modulation Tj junction temperature input level for k = 1 % at 40 dB AGC; fw = 50 MHz; funw = 60 MHz [1] Tsp is the temperature at the soldering point of the source lead. [2] Calculated from S-parameters. [3] Measured in Figure 17 test circuit. [3] 2. Pinning information Table 2. Discrete pinning Pin Description 1 source 2 drain 3 gate 2 4 gate 1 Simplified outline 3 4 Graphic symbol G1 G2 S D 001aam153 2 1 3. Ordering information Table 3. Ordering information Type number BF1217WR BF1217WR Product data sheet Package Name Description Version - SOT343R plastic surface-mounted package; reverse pinning; 4 leads All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 2 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 4. Marking Table 4. Marking Type number Marking Description BF1217WR VA% % = p : made in Hong Kong % = t : made in Malaysia % = w : made in China 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Per MOSFET VDS drain-source voltage DC - 6 V ID drain current DC - 30 mA IG1 gate1 current - 10 mA IG2 gate2 current - 10 mA Tsp 107 C [1] Ptot total power dissipation - 180 mW Tstg storage temperature 65 +150 C Tj junction temperature - 150 C [1] Tsp is the temperature at the soldering point of the source lead. 001aac193 250 Ptot (mW) 200 150 100 50 0 0 50 100 150 200 Tsp (˚C) Fig 1. BF1217WR Product data sheet Power derating curve All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 3 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Rth(j-sp) thermal resistance from junction to solder point Typ Unit 240 K/W 7. Static characteristics Table 7. Static characteristics Tj = 25 C. Symbol Parameter Conditions Min Typ Max Unit VG1-S = VG2-S = 0 V; ID = 10 A 6 - - V V(BR)G1-SS gate1-source breakdown voltage VG2-S = VDS = 0 V; IG1-S = 10 mA 6 - 10 V V(BR)G2-SS gate2-source breakdown voltage VG1-S = VDS = 0 V; IG2-S = 10 mA 6 - 10 V Per MOSFET; unless otherwise specified V(BR)DSS drain-source breakdown voltage VF(S-G1) forward source-gate1 voltage VG2-S = VDS = 0 V; IS-G1 = 10 mA 0.5 - 1.5 V VF(S-G2) forward source-gate2 voltage VG1-S = VDS = 0 V; IS-G2 = 10 mA 0.5 - 1.5 V VG1-S(th) gate1-source threshold voltage VDS = 5 V; VG2-S = 4 V; ID = 100 A 0.3 - 1.0 V VG2-S(th) gate2-source threshold voltage VDS = 5 V; VG1-S = 5 V; ID = 100 A 0.4 - 1.0 V [1] IDS drain-source current VG2-S = 4 V; VDS = 5 V; RG1 = 82 k - - 24 mA IG1-S gate1 cut-off current VG2-S = 0 V; VDS = 0 V; VG1-S = 5 V - - 50 nA IG2-S gate2 cut-off current VG2-S = 4 V; VDS = 0 V; VG1-S = 0 V - - 20 nA [1] RG1 connects gate1 to VGG = 5 V. See Figure 17. BF1217WR Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 4 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 8. Dynamic characteristics Table 8. Dynamic characteristics Common source; Tamb = 25 C; VG2-S = 4 V; VDS = 5 V; ID = 18 mA. Symbol Parameter Conditions yfs f = 100 MHz; Tj = 25 C forward transfer admittance Min Typ Max Unit 23 27 38 mS Ciss(G1) input capacitance at gate1 f = 100 MHz [1] - 2.5 - pF Ciss(G2) input capacitance at gate2 f = 100 MHz [1] - 1.0 - pF f = 100 MHz [1] - 0.8 - pF f = 100 MHz [1] - 20 - fF BS = BS(opt); BL = BL(opt) [1] f = 200 MHz; GS = 2 mS; GL = 0.5 mS - 34 - dB f = 400 MHz; GS = 2 mS; GL = 1 mS - 30 - dB f = 800 MHz; GS = 3.3 mS; GL = 1 mS - 26 - dB f = 400 MHz; YS = YS(opt) - 1.0 - dB f = 800 MHz; YS = YS(opt) - 1.5 - dB at 0 dB AGC 90 104 - dBV at 10 dB AGC - 100 - dBV at 20 dB AGC - 104 - dBV at 40 dB AGC 105 107 - dBV Coss output capacitance reverse transfer capacitance Crss transducer power gain Gtr NF noise figure Xmod cross modulation [1] Calculated from S-parameters. [2] Measured in Figure 17 test circuit. BF1217WR Product data sheet input level for k = 1 %; fw = 50 MHz; funw = 60 MHz All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 [2] © NXP B.V. 2011. All rights reserved. 5 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 8.1 Graphs 001aam154 30 001aam155 30 (1) (1) (2) (3) (4) ID (mA) (2) ID (mA) (5) 20 (3) (4) 20 (5) (6) (6) (7) 10 (8) 10 (9) (7) (10) (11) (12) (13) 0 0 0 0.5 1.0 1.5 2.0 2.5 VG1-S (V) 0 4 6 VDS (V) (1) VG2-S = 4.0 V (1) VG1-S = 2.2 V (2) VG2-S = 3.5 V (2) VG1-S = 2.1 V (3) VG2-S = 3.0 V (3) VG1-S = 2.0 V (4) VG2-S = 2.5 V (4) VG1-S = 1.9 V (5) VG2-S = 2.0 V (5) VG1-S = 1.8 V (6) VG2-S = 1.5 V (6) VG1-S = 1.7 V (7) VG2-S = 1.0 V (7) VG1-S = 1.6 V VDS = 5 V; Tj = 25 C. 2 (8) VG1-S = 1.5 V (9) VG1-S = 1.4 V (10) VG1-S = 1.3 V (11) VG1-S = 1.2 V (12) VG1-S = 1.1 V (13) VG1-S = 1.0 V VG2-S = 4 V; Tj = 25 C. Fig 2. Transfer characteristics; typical values BF1217WR Product data sheet Fig 3. Output characteristics; typical values All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 6 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 001aam156 100 IG1 (μA) 80 001aam157 30 (1) (2) (3) |Yfs| (mS) (1) (2) 20 60 (4) (3) 40 (4) 10 (5) (5) 20 (6) (6) (7) (7) 0 0 0 0.5 1.0 1.5 2.0 2.5 VG1-S (V) 0 5 (1) VG2-S = 4.0 V (2) VG2-S = 3.5 V (2) VG2-S = 3.5 V (3) VG2-S = 3.0 V (3) VG2-S = 3.0 V (4) VG2-S = 2.5 V (4) VG2-S = 2.5 V (5) VG2-S = 2.0 V (5) VG2-S = 2.0 V (6) VG2-S = 1.5 V (6) VG2-S = 1.5 V (7) VG2-S = 1.0 V (7) VG2-S = 1.0 V VDS = 5 V; Tj = 25 C. 20 25 VDS = 5 V; Tj = 25 C. Gate1 current as a function of gate1 voltage; typical values Fig 5. 001aam158 30 Forward transfer admittance as a function of drain current; typical values 001aam159 30 ID (mA) ID (mA) 20 20 10 10 0 0 0 20 40 0 60 1 IG1 (μA) Product data sheet 3 4 5 VDS = 5 V; VG2-S = 4 V; RG1 = 82 k; Tj = 25 C. Drain current as a function of gate1 current; typical values BF1217WR 2 VGG (V) VDS = 5 V; VG2-S = 4 V; Tj = 25 C. Fig 6. 15 ID (mA) (1) VG2-S = 4.0 V Fig 4. 10 Fig 7. Drain current as a function of gate1 supply voltage (VGG); typical values All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 7 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 001aam161 40 (1) ID (mA) ID (mA) (2) 30 001aam162 40 (1) 30 (2) (3) 20 (4) 20 (3) (5) (4) 10 (6) 10 (5) 0 0 0 1 2 3 4 5 VGG = VDS (V) 0 1 (1) RG1 = 20 k (1) VGG = 5.0 V (2) RG1 = 40 k (2) VGG = 4.5 V (3) RG1 = 80 k (3) VGG = 4.0 V (4) RG1 = 120 k (4) VGG = 3.5 V (5) RG1 = 160 k (5) VGG = 3.0 V VG2-S = 4 V; Tj = 25 C. 2 3 4 5 VG2-S (V) (6) VGG = 2.5 V Tj = 25 C; RG1 = 82 k (connected to VGG). Fig 8. Drain current as a function of VDS and VGG; typical values BF1217WR Product data sheet Fig 9. Drain current as a function of gate2 voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 8 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 001aam163 0 gain reduction (dB) 10 001aam164 120 Xmod (dBμV) 110 20 100 30 90 40 80 50 0 1 2 3 4 0 10 VAGC (V) VDS = 5 V; VGG = 5 V; ID(nom) = 19 mA; RG1 = 82 k; f = 50 MHz; Tj = 25 C; see Figure 17. 20 30 40 50 gain reduction (dB) VDS = 5 V; VGG = 5 V; VG2-S(nom) = 4 V; RG1 = 82 k; fw = 50 MHz; funw = 60 MHz; ID(nom) = 19 mA; Tj = 25 C; see Figure 17. Fig 10. Typical gain reduction as a function of the AGC voltage; typical values Fig 11. Unwanted voltage for 1 % cross modulation as a function of gain reduction; typical values 001aam165 40 ID (mA) 30 20 10 0 0 10 20 30 40 50 gain reduction (dB) VDS = 5 V; VGG = 5 V; VG2-S(nom) = 4 V; RG1 = 82 k; fw = 50 MHz; ID(nom) = 19 mA; Tj = 25 C; see Figure 17. Fig 12. Typical drain current as a function of gain reduction; typical values BF1217WR Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 9 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 001aam166 102 001aam167 102 −102 gis, bis (mS) |Yfs| (mS) 10 ϕfs (deg) |Yfs| bis 1 −10 10 ϕfs gis 10−1 10−2 10 102 1 103 10 −1 103 102 f (MHz) f (MHz) VDS = 5 V; VG2-S = 4 V; ID = 19 mA. VDS = 5 V; VG2-S = 4 V; ID = 19 mA. Fig 13. Input admittance as a function of frequency; typical values 001aam168 103 −103 ϕfs (deg) |Yfs| (mS) ϕfs 102 −102 Fig 14. Forward transfer admittance and phase as a function of frequency; typical values 001aam169 10 bos, gos (mS) bos 1 |Yfs| −10 10 1 10 −1 103 102 10−1 gos 10−2 10 VDS = 5 V; VG2-S = 4 V; ID = 19 mA. Product data sheet 103 VDS = 5 V; VG2-S = 4 V; ID = 19 mA. Fig 15. Reverse transfer admittance and phase as a function of frequency; typical values BF1217WR 102 f (MHz) f (MHz) Fig 16. Output admittance as a function of frequency; typical values All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 10 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 8.2 Scattering parameters Table 9. Scattering parameters VDS = 5 V; VG2-S = 4 V; ID = 19 mA; Tamb = 25 C; Z0 = 50 ; typical values. f (MHz) s11 s21 s12 s22 Magnitude (ratio) Angle (deg) Magnitude (ratio) Angle (deg) Magnitude (ratio) Angle (deg) Magnitude (ratio) Angle (deg) 40 0.9960 3.50 2.77 177.20 0.00034 82.80 0.9945 1.00 50 0.9957 4.46 2.76 176.02 0.00046 82.50 0.9944 1.28 100 0.9935 8.66 2.74 172.19 0.00121 81.86 0.9938 2.69 200 0.9880 17.55 2.73 164.42 0.00231 80.28 0.9927 5.39 300 0.9805 26.17 2.69 156.64 0.00331 75.66 0.9909 8.17 400 0.9712 34.58 2.64 149.07 0.00414 71.21 0.9896 10.79 500 0.9589 42.78 2.58 141.74 0.00482 67.42 0.9872 13.30 600 0.9451 50.61 2.52 134.58 0.00526 64.33 0.9850 16.08 700 0.9309 58.23 2.45 127.49 0.00549 61.90 0.9836 18.74 800 0.9166 65.68 2.37 120.79 0.00551 60.77 0.9818 21.05 900 0.9034 72.70 2.29 114.37 0.00536 60.73 0.9796 23.59 1000 0.8894 79.30 2.22 107.90 0.00505 62.45 0.9781 26.44 8.3 Noise data Table 10. Noise data VDS = 5 V; VG2-S = 4 V; ID = 19 mA, Tamb = 25 C; typical values. f (MHz) NFmin (dB) opt rn (ratio) (ratio) (deg) 400 1.0 0.798 29.5 0.907 800 1.5 0.703 57.7 0.749 BF1217WR Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 11 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 9. Test information VAGC R1 10 kΩ C1 C3 4.7 nF 4.7 nF C2 RGEN 50 Ω VI 4.7 nF R2 50 Ω DUT L1 ≈ 2.2 μH RL 50 Ω C4 RG1 VGG 4.7 nF VDS 001aad926 Fig 17. Cross modulation test setup BF1217WR Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 12 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 10. Package outline Plastic surface-mounted package; reverse pinning; 4 leads D SOT343R E B A X HE y v M A e 3 4 Q A A1 c 2 w M B 1 bp Lp b1 e1 detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp b1 c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.4 0.3 0.7 0.5 0.25 0.10 2.2 1.8 1.35 1.15 1.3 1.15 2.2 2.0 0.45 0.15 0.23 0.13 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 97-05-21 06-03-16 SOT343R Fig 18. Package outline SOT343 BF1217WR Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 13 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 11. Abbreviations Table 11. Abbreviations Acronym Description AGC Automatic Gain Control DC Direct Current MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor UHF Ultra High Frequency VHF Very High Frequency 12. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes BF1217WR v.2 20110620 Product data sheet - BF1217WR v.1 - - Modifications: BF1217WR v.1 BF1217WR Product data sheet • Package outline corrected. 20100803 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 14 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. 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No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. BF1217WR Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 15 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BF1217WR Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 20 June 2011 © NXP B.V. 2011. All rights reserved. 16 of 17 BF1217WR NXP Semiconductors N-channel dual gate MOSFET 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 8.2 8.3 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Scattering parameters . . . . . . . . . . . . . . . . . . 11 Noise data. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Test information . . . . . . . . . . . . . . . . . . . . . . . . 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 20 June 2011 Document identifier: BF1217WR