BF1216 Dual N-channel dual gate MOSFET Rev. 01 — 29 April 2010 Product data sheet 1. Product profile 1.1 General description The BF1216 is a combination of two dual gate MOSFET amplifiers with shared source and gate2 leads. The source and substrate are interconnected. Internal bias circuits enable DC stabilization and very good cross modulation performance during AGC. Integrated diodes between the gates and source protect against excessive input voltage surges. The transistor is available as a SOT363 micro-miniature plastic package. CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling. 1.2 Features and benefits Two low noise gain controlled amplifiers in a single package; both with a partly integrated bias Superior cross modulation performance during AGC High forward transfer admittance High forward transfer admittance to input capacitance ratio 1.3 Applications Gain controlled low noise amplifiers for VHF and UHF applications running on a 5 V supply voltage digital and analog television tuners professional communication equipment BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 1.4 Quick reference data Table 1. Quick reference data for amplifier A and B Symbol Parameter Conditions Min Typ Max Unit - - 6 V - - 30 mA - - 180 mW 23 27 38 mS VDS drain-source voltage DC ID drain current DC Ptot total power dissipation Tsp ≤ 107 °C |yfs| forward transfer admittance f = 100 MHz; Tj = 25 °C; ID = 18 mA Ciss(G1) input capacitance at gate1 f = 100 MHz [2] - 2.5 - pF Crss reverse transfer capacitance f = 100 MHz [2] - 25 - fF NF noise figure - 1.0 - dB - 1.5 - dB 105 107 - dBμV - - 150 °C [1] f = 400 MHz; YS = YS(opt) f = 800 MHz; YS = YS(opt) Xmod cross modulation Tj junction temperature [3] input level for k = 1 % at 40 dB AGC; fw = 50 MHz; funw = 60 MHz [1] Tsp is the temperature at the soldering point of the source lead. [2] Calculated from S-parameters. [3] Measured in Figure 17 test circuit. 2. Pinning information Table 2. Discrete pinning Pin Description 1 gate1 (amplifier A) Simplified outline 2 gate2 3 gate1 (amplifier B) 6 4 drain (amplifier B) 5 source 6 drain (amplifier A) 5 Graphic symbol 4 AMP A DA G1A S G2 1 2 3 DB G1B AMP B sym119 3. Ordering information Table 3. Ordering information Type number BF1216 BF1216_1 Product data sheet Package Name Description Version - plastic surface-mounted package; 6 leads SOT363 All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 2 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 4. Marking Table 4. Marking Type number Marking Description BF1216 M5p made in Hong Kong M5t made in Malaysia M5w made in China 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit - 6 V DC - 30 mA - ±10 mA - ±10 mA Per MOSFET VDS drain-source voltage ID drain current IG1 gate1 current IG2 gate2 current Tsp ≤ 107 °C [1] Ptot total power dissipation - 180 mW Tstg storage temperature −65 +150 °C Tj junction temperature - 150 °C [1] Tsp is the temperature at the soldering point of the source lead. 001aac193 250 Ptot (mW) 200 150 100 50 0 0 50 100 150 200 Tsp (˚C) Fig 1. BF1216_1 Product data sheet Power derating curve All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 3 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Rth(j-sp) thermal resistance from junction to solder point Typ Unit 240 K/W 7. Static characteristics Table 7. Static characteristics Tj = 25 °C. Symbol Parameter Conditions Min Typ Max Unit amplifier A 6 - - V amplifier B 6 - - V V(BR)G1-SS gate1-source breakdown voltage VG2-S = VDS = 0 V; IG1-S = 10 mA 6 - 10 V V(BR)G2-SS gate2-source breakdown voltage VG1-S = VDS = 0 V; IG2-S = 10 mA 6 - 10 V Per MOSFET; unless otherwise specified V(BR)DSS drain-source breakdown voltage VG1-S = VG2-S = 0 V; ID = 10 μA VF(S-G1) forward source-gate1 voltage VG2-S = VDS = 0 V; IS-G1 = 10 mA 0.5 - 1.5 V VF(S-G2) forward source-gate2 voltage VG1-S = VDS = 0 V; IS-G2 = 10 mA 0.5 - 1.5 V VG1-S(th) gate1-source threshold voltage VDS = 5 V; VG2-S = 4 V; ID = 100 μA 0.3 - 1.0 V VG2-S(th) gate2-source threshold voltage VDS = 5 V; VG1-S = 5 V; ID = 100 μA 0.4 - 1.0 V amplifier A; VDS(A) = 5 V; RG1(A) = 39 kΩ - - 24 mA amplifier B; VDS(B) = 5 V; RG1(B) = 39 kΩ - - 24 mA amplifier A; VG1-S(A) = 5 V - - 50 nA amplifier B; VG1-S(B) = 5 V - - 50 nA - - 20 nA IDS drain-source current IG1-S IG2-S [1] gate1 cut-off current gate2 cut-off current VG2-S = 4 V [1] VG2-S = 0 V; VDS(A) = VDS(B) = 0 V VG2-S = 4 V; VDS(A) = VDS(B) = 0 V; VG1-S(A) = VG1-S(B) = 0 V RG1 connects gate1 to VGG = 5 V; see Figure 17. BF1216_1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 4 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 8. Dynamic characteristics Table 8. Dynamic characteristics for amplifier A and B Common source; Tamb = 25 °C; VG2-S = 4 V; VDS = 5 V; ID = 19 mA. Symbol Parameter Conditions |yfs| f = 100 MHz; Tj = 25 °C; ID = 18 mA forward transfer admittance Min Typ Max Unit 23 27 38 mS Ciss(G1) input capacitance at gate1 f = 100 MHz [1] - 2.5 - pF Ciss(G2) input capacitance at gate2 f = 100 MHz [1] - 2.4 - pF f = 100 MHz [1] - 0.8 - pF f = 100 MHz [1] - 25 - fF amplifier A; BS = BS(opt); BL = BL(opt) [1] f = 200 MHz; GS = 2 mS; GL = 0.5 mS - 34 - dB f = 400 MHz; GS = 2 mS; GL = 1 mS - 30 - dB - 26 - dB f = 200 MHz; GS = 2 mS; GL = 0.5 mS - 34 - dB f = 400 MHz; GS = 2 mS; GL = 1 mS - 30 - dB f = 800 MHz; GS = 3.3 mS; GL = 1 mS - 26 - dB f = 11 MHz; GS = 20 mS; BS = 0 S - - 5 dB f = 400 MHz; YS = YS(opt) - 1.0 - dB - 1.5 - dB at 0 dB AGC 90 104 - dBμV at 10 dB AGC - 100 - dBμV at 20 dB AGC - 104 - dBμV at 40 dB AGC 105 107 - dBμV Coss output capacitance reverse transfer capacitance Crss transducer power gain Gtr f = 800 MHz; GS = 3.3 mS; GL = 1 mS amplifier B; BS = BS(opt); BL = BL(opt) NF noise figure [1] f = 800 MHz; YS = YS(opt) Xmod cross modulation [1] Calculated from S-parameters. [2] Measured in Figure 17 test circuit. BF1216_1 Product data sheet input level for k = 1 % at 40 dB AGC; fw = 50 MHz; funw = 60 MHz All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 [2] © NXP B.V. 2010. All rights reserved. 5 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 8.1 Graphs for amplifiers A and B 001aal584 30 (1) (2) (3) (4) ID (mA) 001aal585 30 ID (mA) (5) (1) (2) 20 20 (3) (4) (6) (5) (6) 10 10 (7) (8) (7) (9) (10) (11) (12) 0 0 0 0.5 1.0 1.5 2.0 2.5 VG1-S (V) 0 4 6 VDS (V) (1) VG2-S = 4.0 V. (1) VG1-S = 2.1 V. (2) VG2-S = 3.5 V. (2) VG1-S = 2.0 V. (3) VG2-S = 3.0 V. (3) VG1-S = 1.9 V. (4) VG2-S = 2.5 V. (4) VG1-S = 1.8 V. (5) VG2-S = 2.0 V. (5) VG1-S = 1.7 V. (6) VG2-S = 1.5 V. (6) VG1-S = 1.6 V. (7) VG2-S = 1.0 V. (7) VG1-S = 1.5 V. VDS = 5 V; Tj = 25 °C. 2 (8) VG1-S = 1.4 V. (9) VG1-S = 1.3 V. (10) VG1-S = 1.2 V. (11) VG1-S = 1.1 V. (12) VG1-S = 1.0 V. VG2-S = 4 V; Tj = 25 °C. Fig 2. Transfer characteristics; typical values BF1216_1 Product data sheet Fig 3. Output characteristics; typical values All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 6 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 001aal586 100 001aal587 30 (1) IG1 (μA) 80 |Yfs| (mS) (2) (4) (1) (2) (3) 20 (3) 60 (5) (4) 40 10 (5) (6) 20 (6) (7) (7) 0 0 0 0.5 1.0 1.5 2.0 0 5 10 15 20 VG1-S (V) (1) VG2-S = 4.0 V. (1) VG2-S = 4.0 V. (2) VG2-S = 3.5 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3.0 V. (3) VG2-S = 3.0 V. (4) VG2-S = 2.5 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2.0 V. (5) VG2-S = 2.0 V. (6) VG2-S = 1.5 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1.0 V. (7) VG2-S = 1.0 V. VDS = 5 V; Tj = 25 °C. Fig 4. VDS = 5 V; Tj = 25 °C. Gate1 current as a function of gate1 voltage; typical values Fig 5. 001aal588 16 ID (mA) Forward transfer admittance as a function of drain current; typical values 001aal589 20 ID (mA) 12 15 8 10 4 5 0 0 0 20 40 0 60 1 IG1 (μA) Product data sheet 3 4 5 VDS = 5 V; VG2-S = 4 V; RG1 = 39 kΩ; Tj = 25 °C. Drain current as a function of gate1 current; typical values BF1216_1 2 VGG (V) VDS = 5 V; VG2-S = 4 V; Tj = 25 °C. Fig 6. 25 ID (mA) Fig 7. Drain current as a function of gate1 supply voltage (VGG); typical values All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 7 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 001aal590 30 (1) (2) 001aal591 40 ID (mA) ID (mA) 30 20 (3) (1) 20 (2) (3) (4) 10 (4) (5) 10 (5) 0 0 0 1 2 3 4 5 VGG = GDS (V) 0 1 (1) RG1 = 10 kΩ. (1) VGG = 5.0 V. (2) RG1 = 20 kΩ. (2) VGG = 4.5 V. (3) RG1 = 40 kΩ. (3) VGG = 4.0 V. (4) RG1 = 60 kΩ. (4) VGG = 3.5 V. (5) RG1 = 80 kΩ. (5) VGG = 3.0 V. VG2-S = 4 V; Tj = 25 °C. Fig 8. Product data sheet 3 4 5 VG2-S (V) Tj = 25 °C; RG1 = 39 kΩ (connected to VGG). Drain current as a function of VDS and VGG; typical values BF1216_1 2 Fig 9. Drain current as a function of gate2 voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 8 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 001aal592 0 gain reduction (dB) 10 001aal593 120 Xmod (dBμV) 110 20 100 30 90 40 80 50 0 1 2 3 4 0 10 VAGC (V) VDS = 5 V; VGG = 5 V; nominal ID = 19 mA; RG1 = 39 kΩ; f = 50 MHz; Tj = 25 °C; see Figure 17. Fig 10. Typical gain reduction as a function of the AGC voltage; typical values 20 30 40 50 gain reduction (dB) VDS = 5 V; VGG = 5 V; nominal VG2-S = 4 V; RG1 = 39 kΩ; fw = 50 MHz; funw = 60 MHz; nominal ID = 19 mA; Tj = 25 °C; see Figure 17. Fig 11. Unwanted voltage for 1 % cross modulation as a function of gain reduction; typical values 001aal594 40 ID (mA) 30 20 10 0 0 10 20 30 40 50 gain reduction (dB) VDS = 5 V; VGG = 5 V; nominal VG2-S = 4 V; RG1 = 39 kΩ; fw = 50 MHz; nominal ID = 19 mA; Tj = 25 °C; see Figure 17. Fig 12. Typical drain current as a function of gain reduction; typical values BF1216_1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 9 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 001aal595 102 001aal596 102 −102 gis, bis (mS) |Yfs| (mS) 10 ϕfs (deg) |Yfs| bis 1 −10 10 ϕfs gis 10−1 10−2 10 102 1 103 10 −1 103 102 f (MHz) f (MHz) VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 19 mA; and vice versa. VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 19 mA; and vice versa. Fig 13. Input admittance as a function of frequency; typical values Fig 14. Forward transfer admittance and phase as a function of frequency; typical values 001aal597 103 −103 ϕrs (deg) |Yrs| (mS) ϕrs 102 −102 001aal598 10 bos, gos (mS) 1 bos |Yrs| −10 10 1 10 −1 103 102 10−1 gos 10−2 10 VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 19 mA; and vice versa. Fig 15. Reverse transfer admittance and phase as a function of frequency; typical values BF1216_1 Product data sheet 102 103 f (MHz) f (MHz) VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 19 mA; and vice versa. Fig 16. Output admittance as a function of frequency; typical values All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 10 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 8.2 Scattering parameters for amplifiers A and B Table 9. Scattering parameters for amplifiers A and B VDS(A) = 5 V; VG2-S = 4 V; ID(A) = 19 mA; VDS(B) = 0 V; VG1-S(B) = 0 V; Tamb = 25 °C; Z0 = 50 Ω; typical values. f (MHz) s11 s21 s12 s22 Magnitude (ratio) Angle (degree) Magnitude (ratio) Angle (degree) Magnitude (ratio) Angle (degree) Magnitude (ratio) Angle (degree) 40 0.9910 −4.73 2.76 175.80 0.00074 99.46 0.9946 −1.29 100 0.9888 −9.07 2.75 171.94 0.00150 86.12 0.9941 −2.65 200 0.9853 −18.19 2.73 163.86 0.00292 79.56 0.9929 −5.31 300 0.9762 −27.09 2.69 155.90 0.00420 74.12 0.9916 −7.92 400 0.9656 −35.80 2.65 148.17 0.00540 69.71 0.9900 −10.49 500 0.9502 −44.45 2.59 140.50 0.00634 65.32 0.9882 −13.05 600 0.9331 −52.89 2.52 132.96 0.00709 61.01 0.9855 −15.66 700 0.9155 −61.08 2.45 125.69 0.00751 57.66 0.9830 −18.24 800 0.8966 −69.01 2.38 118.59 0.00782 54.58 0.9810 −20.75 900 0.8755 −76.72 2.30 111.71 0.00792 52.37 0.9798 −23.19 1000 0.8550 −84.10 2.22 105.07 0.00783 50.60 0.9785 −25.68 8.3 Noise data for amplifiers A and B Table 10. Noise data for amplifiers A and B VDS(A) = 5 V; VG2-S = 4 V; ID(A) = 19 mA, Tamb = 25 °C; typical values. f (MHz) NFmin (dB) Γopt rn (ratio) (ratio) (degree) 400 1.0 0.788 28.9 0.903 800 1.5 0.673 58.8 0.725 BF1216_1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 11 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 9. Test information VAGC R1 10 kΩ C1 C3 4.7 nF 4.7 nF C2 RGEN 50 Ω VI DUT 4.7 nF R2 50 Ω L1 ≈ 2.2 μH RL 50 Ω C4 RG1 VGG 4.7 nF VDS 001aad926 Fig 17. Cross modulation test setup for one MOSFET BF1216_1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 12 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 10. Package outline Plastic surface-mounted package; 6 leads SOT363 D E B y X A HE 6 5 v M A 4 Q pin 1 index A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC SOT363 JEDEC JEITA SC-88 EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 Fig 18. Package outline SOT363 BF1216_1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 13 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 11. Abbreviations Table 11. Abbreviations Acronym Description AGC Automatic Gain Control MOSFET Metal-Oxide Semiconductor Field-Effect Transistor UHF Ultra High Frequency VHF Very High Frequency 12. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes BF1216_1 20100429 Product data sheet - - BF1216_1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 14 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. 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However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or BF1216_1 Product data sheet malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 15 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BF1216_1 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 29 April 2010 © NXP B.V. 2010. All rights reserved. 16 of 17 BF1216 NXP Semiconductors Dual N-channel dual gate MOSFET 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 8.2 8.3 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Graphs for amplifiers A and B . . . . . . . . . . . . . 6 Scattering parameters for amplifiers A and B . 11 Noise data for amplifiers A and B . . . . . . . . . . 11 Test information . . . . . . . . . . . . . . . . . . . . . . . . 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 29 April 2010 Document identifier: BF1216_1