TVS Diode Arrays (SPA® Diodes) Lightning Surge Protection - LC03-3.3 Series LC03-3.3 Series 3.3V 150A Diode Array RoHS Pb GREEN Description This LC03-3.3 series provides overvoltage protection for applications such as 10/100/1000 BaseT Ethernet, and T3/E3 interfaces. This new protector combines the TVS diode element with a diode rectifier bridge to provide both longitudinal and differential protection in one package. This design results in a capacitive loading characteristic that is log-linear with respect to the signal voltage across the device. This reduces intermodulation (IM) distortion caused by a typical solid-state protection solution. The application schematic provides the connection information and the LC03-3.3 is rated for GR-1089, intra-building transient immunity requirements for telecommunication installations. Pinout Features 1 8 2 7 3 6 4 • SOIC-8 surface mount package (JEDEC MS-012) • Lightning Protection, IEC61000-4-5, 150A (tp=8/20µs) • Combined longitudinal and metallic protection • EFT, IEC61000-4-4, 40A (tp=5/50ns) • Clamping speed of nanoseconds • Low insertion loss, loglinear capacitance 5 • UL 94V-0 epoxy molding • Low clamping voltage SOIC-8 (Top View) Functional Block Diagram • RoHS compliant Applications • T1/E1 Line cards Pin 1 and 8 Line in • T3/E3 and DS3 Interfaces Line out • 10/100/1000 BaseT Ethernet • STS-1 Interfaces Application Example Pin 2, 3, 6, and 7 TeleLink (0461 1.25) Line out Line in Pin 4 and 5 LC03-3.3BTG 1 8 2 7 3 6 4 5 to chipset (Ethernet PHY, T3/E3 PHY, etc.) Additional Information Datasheet Resources Samples Life Support Note: Not Intended for Use in Life Support or Life Saving Applications The products shown herein are not designed for use in life sustaining or life saving applications unless otherwise expressly indicated. © 2013 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 06/04/13 This schematic shows a high-speed data interface protection solution. The LC03-3.3BTG is compatible with the intra-building surge requirements of Telcordia’s GR1089-CORE, and the Basic Level Recommendations of ITU K.20 and K.21. The TeleLink fuse provides overcurrent protection for the long term 50/60 Hz power fault events. TVS Diode Arrays (SPA® Diodes) Lightning Surge Protection - LC03-3.3 Series Thermal Information Rating Units Peak Pulse Current (8/20µs) Parameter 150 A SOIC Package Peak Pulse Power (8/20µs) 3300 W Operating Temperature Range IEC 61000-4-2, Direct Discharge, (Level 4) 30 kV Storage Temperature Range –55 to 150 °C IEC 61000-4-2, Air Discharge, (Level 4) 30 kV Maximum Junction Temperature 150 °C IEC 61000-4-5 (8/20µs) 150 A 260 °C Telcordia GR 1089 (Intra-Building) (2/10µs) 100 A Maximum Lead Temperature (Soldering 20-40s) (SOIC - Lead Tips Only) ITU K.20 (5/310µs) 40 A Parameter Rating Units 170 °C/W –40 to 125 °C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Characteristics (TOP = 25°C) Parameter Symbol Test Conditions Min Typ Max Units VRWM IT≤1µA - - 3.3 V Reverse Breakdown Voltage VBR IT= 2µA 3.3 - - V Snap Back Voltage VSB IT= 50mA 3.3 - - V Reverse Leakage Current IR VRWM= 3.3V, T= 25°C - - 1 µA Clamping Voltage, Line-Ground VC IPP= 50A, tp=8/20 µs - - 13 V Reverse Stand-Off Voltage VC IPP= 100A, tp=8/20 µs - - 17 V RDYN (VC2-VC1)/(IPP2-IPP1) - 0.15 - W Clamping Voltage, Line-Line VC IPP= 50A, tp=8/20 µs - - 15 V Clamping Voltage, Line-Line VC IPP= 100A, tp=8/20 µs - - 20 V RDYN (VC2-VC1)/(IPP2-IPP1) - 0.25 - W Between I/O Pins and Ground VR=0V, f= 1MHz - 9 12 pF Between I/O Pins VR=0V, f= 1MHz - 4.5 6 pF Clamping Voltage, Line-Ground Dynamic Resistance, Line-Ground Dynamic Resistance , Line-Line Junction Capacitance Cj Figure 1: Non-repetitive Peak Pulse Current vs. Pulse Time Figure 2: Current Derating Curve 120 Percentage of Rated Current (%IP) Peak Pulse Current (A) 1000 100 10 1 1 10 100 Pulse decay time (µs) 1000 100 80 60 40 20 0 0 20 40 60 80 100 120 140 160 Ambient Temperature (C) © 2013 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 06/04/13 SP03A-3.3 Absolute Maximum Ratings TVS Diode Arrays (SPA® Diodes) Lightning Surge Protection - LC03-3.3 Series Figure 3: Pulse Waveform Figure 4: Clamping Voltage vs. Peak Pulse Current 18 100% 16 90% 14 Clamp Voltage-VC(V) 110% Percent of IPP 80% 70% 60% 50% 40% Line to Line 12 10 8 Line to Ground 6 4 30% 2 20% 0 10% 0% 0 0.0 5.0 10.0 15.0 20.0 25.0 10 20 30 40 50 60 70 80 90 100 Peak Pulse Current-I PP (A) 30.0 Time (μs) Figure 5: Capacitance vs. Reverse Voltage Figure 6: Forward Voltage vs. Forward Current 10 7 Line to Ground 9 6 Forward Voltage (V) Capacitance (pF) 8 7 6 5 4 Line to Line 3 2 Ground-to-Line 5 4 3 2 1 1 0 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 10 20 30 Bias Voltage (V) 40 50 60 70 80 90 100 Forward Current (A) Soldering Parameters Pre Heat Pb – Free assembly - Temperature Min (Ts(min)) 150°C - Temperature Max (Ts(max)) 200°C - Time (min to max) (ts) 60 – 180 secs Average ramp up rate (Liquidus) Temp (TL) to peak 3°C/second max TS(max) to TL - Ramp-up Rate 3°C/second max Reflow - Temperature (TL) (Liquidus) 217°C - Temperature (tL) 60 – 150 seconds 260 °C Time within 5°C of actual peak Temperature (tp) 20 – 40 seconds Ramp-down Rate 6°C/second max Time 25°C to peak Temperature (TP) 8 minutes Max. Do not exceed 260°C © 2013 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 06/04/13 Critical Zone TL to TP Ramp-up TL TS(max) tL Ramp-do Ramp-down Preheat TS(min) 25 Peak Temperature (TP) +0/-5 tP TP Temperature Reflow Condition tS time to peak temperature Time TVS Diode Arrays (SPA® Diodes) Lightning Surge Protection - LC03-3.3 Series Package Dimensions — Mechanical Drawings and Recommended Solder Pad Outline SOIC-8 Pins 8 JEDEC MS-012 Millimetres LF o Recommended Soldering Pad Outline (Reference Only) Inches Min Max Min Max A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 A2 1.25 1.65 0.050 0.065 B 0.31 0.51 0.012 0.020 c 0.17 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 5.80 6.20 0.228 0.244 E1 3.80 4.00 0.150 0.157 1.27 BSC e 1.27 0.40 L 0.050 BSC 0.050 0.016 Embossed Carrier Tape & Reel Specification — SOIC Package Millimetres E 1.85 0.065 0.073 5.4 5.6 0.213 0.22 2.05 0.077 0.081 D 1.5 1.6 0.059 0.063 1.50 Min 3.9 4.1 40.0 ± 0.20 0.059 Min 0.154 0.161 1.574 ± 0.008 W 11.9 12.1 0.468 0.476 P 7.9 8.1 0.311 0.319 A0 6.3 6.5 0.248 0.256 B0 5.1 5.3 0.2 0.209 K0 2 2.2 0.079 0.087 0.30 ± 0.05 t T= Tape & Reel Max 1.65 1.95 P0 G= Green Min F 10P0 LC03– 3.3 B T G Max P2 D1 Part Numbering System Inches Min 0.012 ± 0.002 Package B = SOIC Series Working Voltage Product Characteristics Part Marking System LF LC03-3.3 XXXXXXXX First Line: Part number Second Line: Date code Ordering Information Part Number Package Marking Min. Order Qty. LC03-3.3BTG SOIC-8 LC03-3.3 2500 Lead Plating Matte Tin Lead Material Copper Alloy Lead Coplanarity 0.004 inches (0.102mm) Substitute Material Silicon Body Material Molded Epoxy Flammability UL 94 V-0 Notes : 1. All dimensions are in millimeters 2. Dimensions include solder plating. 3. Dimensions are exclusive of mold flash & metal burr. 4. Blo is facing up for mold and facing down for trim/form, i.e. reverse trim/form. 5. Package surface matte finish VDI 11-13. © 2013 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 06/04/13 SP03A-3.3 Package