PAM8124

A Product Line of
Diodes Incorporated
PAM8124
HIGH POWER AUDIO
Description
Pin Assignments
TSSOP-24-EP
driving stereo speakers in a single-ended configuration; or a mono
PVCCL 1
SDN 2
PVCCL 3
MUTE 4
LIN 5
RIN 6
VCM 7
AGND 8
AGND 9
PVCCR 10
VCLAMP 11
PVCCR 12
speaker in a bridge-tied-load configuration. The PAM8124 can drive
stereo speakers (SE) as low as 4Ω. Due to the low power dissipation
and high efficiency, up to 95%, the device can be used without any
external heat sink when playing music.
The gain of the amplifier is controlled by 2 gain selectable pins,
offering 20dB, 26dB, 32dB, and 36dB gain selections.
The PAM8124 is available in a TSSOP-24-EP package.
Features
•
30W/Ch into 8Ω BTL Load from 22V Supply
•
15W/Ch into 4Ω SE Load from 22V Supply
•
10W/Ch into 8Ω SE Load from 24V Supply
•
Operate from 10V to 26V
•
Single-Ended Analog Inputs
•
Supports Multiple Output Configurations:
PAM8124
X XX YWW LL
24
23
22
21
20
19
18
17
16
15
14
13
PGNDL
PGNDL
LOUT
BSL
AVCC
SE_BTL
GAIN0
GAIN1
BSR
ROUT
PGNDR
PGNDR
Applications
ƒ
2-Ch Single-Ended (SE, Half-Bridge)
ƒ
1-Ch Bridge-Tied Load (BTL, Full-Bridge)
•
•
Four Selectable Fixed-gain Settings
•
No Pop Noise for Start-up and Shut-down Sequences
•
Internal Oscillator (No External Components Required)
•
High Efficient Class-D Operation Eliminates Need for Heat Sinks
•
Thermal and Short-Circuit Protection with Auto Recovery
•
Space-Saving Surface-Mount TSSOP-24EP Package
•
Pb-Free Package
Televisions
•
Home Sound Systems
•
Active Speakers
Typical Applications Circuit
U1
10V_to_26V
1
2
SD
3
4
Mute
5
L_in
6
R_in
7
C1
1uF
8
9
C3
1uF
10V_to_26V
PAM8124
Document number: DS36627 Rev. 1 - 2
10
11
12
PVCCL
PGNDL
SDN
PGNDL
PVCCL
LOUT
MUTE
LIN
RIN
VCM
BSL
PAM8124
NEW PRODUCT
The PAM8124 is a 15W efficient, Class-D audio power amplifier for
AVCC
SE_BTL
GAIN0
AGND
GAIN1
AGND
BSR
PVCCR
ROUT
VCLAMP
PGNDR
PVCCR
PGNDR
24
C5
220nF
23
R1
4.7K
L1
22
L_out1
C7
470uF
8ohm
33uH
21
C2
20
1uF
10V_to_26V
19
SE_BTL
18
G0
17
16
15
14
G1
C4
1uF
L2
33uH
13
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C6
220nF
R2
4.7K
C8
470uF
8ohm
R_out1
October 2013
© Diodes Incorporated
A Product Line of
Diodes Incorporated
PAM8124
NEW PRODUCT
Pin Descriptions
Pin
1, 3
Name
PVCCL
I/O/P
P
2
SDN
I
4
MUTE
I
5
6
LIN
RIN
I
I
7
8, 9
10, 12
VCM
AGND
PVCCR
O
P
P
11
VCLAMP
P
13, 14
PGNDR
P
15
16
17
18
ROUT
BSR
GAIN1
GAIN0
O
I/O
I
I
19
SE_BTL
I
20
21
22
23, 24
AVCC
BSL
LOUT
PGNDL
P
I/O
O
P
Function
Power supply for left channel H-bridge, not connected to PVCCR or AVCC
Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with compliance to AVCC
A logic high on this pin disables the outputs. A low on this pin enables the outputs. TTL logic levels with
compliance to AVCC
Audio input for left channel
Audio input for right channel
Reference for analog cells
Analog ground for digital/analog cells in core
Power supply for right channel H-bridge, not connected to PVCCL or AVCC
Internally generated voltage supply for bootstrap. Not to be used as a supply or connected to any
component other than the decoupling capacitor.
Power ground for right channel H-bridge
Class-D H-bridge output for right channel
Bootstrap I /O for right channel H-bridge
Gain select most-significant bit. TTL logic levels with compliance to AVCC
Gain select least-significant bit. TTL logic levels with compliance to AVCC
A logic low on this pin enables one single-ended input in BTL configuration. A logic high on this pin
enables two inputs in SE/BTL configuration. TTL logic levels with compliance to AVCC
High-voltage analog power supply
Bootstrap I /O for left channel H-bridge
Class-D H-bridge output for left channel
Power ground for left channel H-bridge
Functional Block Diagram
PAM8124
Document number: DS36627 Rev. 1 - 2
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PAM8124
Absolute Maximum Ratings (@TA = +25°C, unless otherwise specified.)
Parameter
Rating
28
Unit
V
-0.3 to VCC +0.3
V
-0.3 to +5.5
-65 to +150
150
40
V
°C
°C
°C/W
NEW PRODUCT
Supply Voltage (VCC)
Logic Input Voltage (SDN, MUTE, GAIN0, GAIN1, SE_BTL)
Analog Input Voltage (LIN, RIN)
Storage Temperature
Maximum Junction Temperature
Junction to ambient thermal resistance
Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.)
Symbol
Parameter
Min
Max
Unit
VCC
Supply Voltage
10
26
V
TA
Operating Ambient Temperature Range
-40
+85
°C
TJ
Junction Temperature Range
-40
+125
°C
Electrical Characteristics (@TA = +25°C, VCC = 24V, Gain = 20dB, RL = 8Ω unless otherwise specified.)
Symbol
|VOS|
ICC(q)
Parameter
Class-D output offset voltage(measured
differently)
Quiescent supply current
Test Conditions
Min
Typ
Max
Units
Vi = 0V, AV = 36dB
20
100
mV
SDN = 2.5V, MUTE = 0V, No Load
25
40
mA
mA
ICC(MUTE)
Quiescent supply current in mute mode
MUTE = 2.5V, No load
25
40
ICC(SDN)
Quiescent current in shutdown mode
SDN = 0.8V, No load
30
60
RDS(ON)
Drain-source on-state resistance
IO = 0.5A
150
G
Gain
Mute Attenuation
PSRR
Power Supply Rejection Ratio
Output Power at 1% THD+N
PO
Output Power at 10% THD+N
THD+N
Total harmonic distortion + noise
Vn
Output integrated noise floor
Cs
GAIN1 = 0.8V, GAIN0 = 0.8V
18
20
22
GAIN1 = 0.8V, GAIN0 = 2.5V
GAIN1 = 2.5V, GAIN0 = 0.8V
GAIN1 = 2.5V, GAIN0 = 2.5V
Vi = 1Vrms
24
30
34
26
32
36
-60
28
34
38
VRIPPLE = 200mVpp,
f = 1kHz,gain = 20dB
-52
RL = 4Ω, f = 1kHz
14
RL = 8Ω, f = 1kHz
8
RL = 4Ω, f = 1kHz
18
µA
mΩ
dB
dB
dB
W
10
RL = 8Ω, f = 1kHz
RL =4Ω, f = 1kHz, Po = 10W
0.15
RL = 8Ω, f = 1kHz, Po = 5W
0.08
20Hz to 22kHz, A-weighted,
Gain = 20dB
200
%
µV
Crosstalk
PO = 1W, f = 1kHz, Gain = 20dB
-70
dB
SNR
OTP
OTH
Signal-to-noise ratio
Thermal trip point
Thermal hysteresis
THD+N<1%, f = 1kHz, Gain = 20dB
dB
°C
°C
fosc
Oscillator frequency
92
160
60
300
360
PAM8124
Document number: DS36627 Rev. 1 - 2
SE_BTL = 2.5V
SE_BTL = 0.8V
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250
350
kHz
October 2013
© Diodes Incorporated
A Product Line of
Diodes Incorporated
PAM8124
Performance Characteristics (@TA = +25°C, VCC = 24V, f = 1kHz, Gain = 20dB unless otherwise specified.)
NEW PRODUCT
THD+N vs. Output Power (RL = 4Ω, SE)
THD+N vs. Output Power (RL = 8Ω, SE)
20
20
10
10
5
5
2
2
1
%
1
%
0.5
0.5
0.2
0.2
0.1
0.1
0.05
0.06
1m
2m
5m
10m
20m
50m
100m
200m
500m
1
2
5
10
0.03
1m
20 30
2m
5m
10m
20m
50m
200m
500m
1
2
5
10
20
THD+N vs. Frequency (RL = 8Ω, SE)
THD+N vs. Frequency (RL = 4Ω, SE)
20
10
100m
W
W
20
PO = 2W/ 5W/ 8W
(Red / Blue/ Pink)
10
5
5
PO = 1W/ 2W/ 6W
(Red / Blue/ Pink)
2
2
1
1
%
%
0.5
0.5
0.2
0.2
0.1
0.1
0.05
0.05
0.03
20
50
100
200
500
1k
2k
5k
10k
0.02
20
20k
50
100
200
500
Hz
1k
2k
5k
10k
20k
Hz
THD+N vs. Output Power (RL = 8Ω, BTL)
THD+N vs. Frequency (RL = 8Ω, BTL)
20
20
10
10
5
5
PO = 5W/ 10W/ 15W
(Red / Blue/ Pink)
2
2
1
1
%
%
0.5
0.5
0.2
0.1
0.2
0.05
0.1
0.02
0.05
0.03
1m
2m
5m
10m
20m
50m
100m
200m
500m
1
2
5
10
20
50
0.01
20
W
PAM8124
Document number: DS36627 Rev. 1 - 2
50
100
200
500
1k
2k
5k
10k
20k
Hz
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PAM8124
Performance Characteristics (@TA = +25°C, VCC = 24V, f = 1kHz, Gain = 20dB unless otherwise specified.)
Crosstalk vs. Frequency (RL = 8Ω, SE)
Crosstalk vs. Frequency (RL = 4Ω, SE)
+0
+0
NEW PRODUCT
-5
-10
-15
-20
-25
-5
-10
PO = 1W
L to R/ R to L
(Red /Blue)
-15
-20
T
-25
-30
-30
-35
-35
-40
-40
-45
d
B
T
PO = 1W
L to R/ R to L
(Red / Blue)
-45
d
B
-50
-50
-55
-55
-60
-60
-65
-65
-70
-70
-75
-75
-80
-80
-85
-85
-90
-90
-95
-95
-100
20
50
100
200
500
1k
2k
5k
10k
-100
20
20k
50
100
200
500
Hz
+0
T T
T
-5
-5
-10
-10
-15
-15
-20
-20
-25
-25
-30
-45
-50
-50
-55
-55
-60
-60
-65
-65
-70
-70
-75
5k
10k
20k
5k
10k
T T
-75
50
100
200
500
1k
2k
5k
10k
-80
20
20k
50
100
200
Hz
500
1k
2k
Hz
PSRR vs. Frequency (RL = 8Ω, BTL)
T T T
20k
-40
-45
+0
10k
-35
d
B
-40
-80
20
5k
-30
-35
d
B
2k
PSRR vs. Frequency (RL = 8Ω, SE)
PSRR vs. Frequency (RL = 4Ω, SE)
+0
1k
Hz
Noise Floor (RL = 8Ω, SE)
+0
T T T
-5
-10
-10
-20
-15
-30
-20
-40
-25
-30
-50
d
B
r
-35
d
B
-40
-60
-70
-45
A
-80
-50
-55
-90
-60
-100
-65
-110
-70
-120
-75
-80
20
50
100
200
500
1k
2k
5k
10k
20k
-130
20
PAM8124
Document number: DS36627 Rev. 1 - 2
50
100
200
500
1k
2k
20k
Hz
Hz
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© Diodes Incorporated
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PAM8124
Performance Characteristics (@TA = +25°C, VCC = 24V, f = 1kHz, Gain = 20dB unless otherwise specified.)
Frequency Response (RL = 8Ω, SE)
Frequency Response (RL = 8Ω, BTL)
+24
NEW PRODUCT
+24
+23
+22
+21
+23
LFILT = 33µH
CFILT = 0.22µF
CDC = 470µF
+22
+21
+20
+20
+19
+19
d
B
g
A
+17
d
B
g
+16
A
+18
+18
+17
+16
+15
+15
+14
+14
+13
+13
+12
+12
+11
+11
+10
20
50
100
200
500
1k
2k
5k
10k
20k
+10
20
50
100
200
500
1k
2k
Efficiency vs. Output Power (RL = 4Ω)
Efficiency vs. Output Power (RL = 8Ω)
Quiescent Current vs. Supply Voltage
OSC Frequency vs. Supply Voltage
PAM8124
Document number: DS36627 Rev. 1 - 2
5k
10k
20k
Hz
Hz
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A Product Line of
Diodes Incorporated
PAM8124
Performance Characteristics (@TA = +25°C, VCC = 24V, f = 1kHz, Gain = 20dB unless otherwise specified.)
NEW PRODUCT
Case Temperature vs. Output Power (RL = 4Ω)
Case Temperature vs. Output Power (RL = 8Ω)
Two Channels Driving
Two Channels Driving
Application Information
Input Capacitors (Ci)
In the typical application, an input capacitor Ci, is required to allow the amplifier to bias the input signal to the proper DC level for optimum
operation. In this case, Ci and the minimum input impedance Ri form is a high-pass filter with the corner frequency determined in the follow
equation:
fC =
1
( 2π RiCi)
It is important to consider the value of Ci as it directly affects the low frequency performance of the circuit. For example, when Ri is 40kΩ and the
specification calls for a flat bass response are down to 20Hz. Equation is reconfigured as followed:
Ci =
1
( 2π Rifc )
When input resistance variation is considered Ci is 200nF, so one would likely choose a value of 220nF. A further consideration for this capacitor
is the leakage path from the input source through the input network (Ci, Ri + Rf) to the load. This leakage current creates a DC offset voltage at
the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason, a low-leakage tantalum or ceramic
capacitor is the best choice.
Gain Setting Control
The gain of the PAM8124 is set by two input terminals, GAIN0 and GAIN1.
The gains listed in following table are realized by changing the taps on the input resistors inside the amplifier. This causes the input impedance to
be dependent on the gain setting. The actual gain settings are controlled by ratios of resistors, so the gain variation from part-to-part is small.
However, the input impedance from part-to-part at the same gain may shift by ±20% due to shifts in the actual resistance of the input resistors.
Table 1: Gain Setting
Gain1
Gain0
Amplifier Gain (dB),
Typical
Input Impedance (kΩ),
Typical (Ri)
0
0
1
1
0
1
0
1
20
26
30
36
40
20
10
6.67
PAM8124
Document number: DS36627 Rev. 1 - 2
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PAM8124
Application Information (cont.)
Input Resistance
NEW PRODUCT
Changing the gain setting can vary the input resistance of the amplifier from its smallest value (6.67kΩ ±20%) to the largest value (40kΩ ±20%).
As a result, if a single capacitor is used in the input high-pass filter, the –3dB cutoff frequency may change when changing gain steps.
The –3dB frequency can be calculated using the following Equation. Use the Ri values given in Table 1.
fC =
1
( 2π RiCi)
Single-Ended Output Capacitor
In single-ended (SE) applications, the dc blocking capacitor forms a high-pass filter with the speaker impedance. The frequency response rolls off
with decreasing frequency at a rate of 20dB/decade. The cutoff frequency is determined by:
f coh =
1
2πR L CSE
Table 2 shows some common component values and the associated cutoff frequencies:
Table 2: Common Filter Responses
RL-Speaker Impedance (Ω)
4
6
8
CSE-DC Blocking Capacitor (µF)
fc = 60Hz (-3dB)
fc = 40Hz (-3dB)
fc = 20Hz (-3dB)
680
1000
2200
470
680
1500
330
470
1000
Output Filter and Frequency Response
For the best frequency response, a flat pass band output filter (second-order Butterworth) may be used. The output filter components consist of
the series inductor and capacitor to ground at the LOUT and ROUT pins. There are several possible configurations, depending on the speaker
impedance and whether the output configuration is single-ended (SE) or bridge-tied load (BTL). Table 3 lists the recommended values for the filter
components. It is important to use a high-quality capacitor in this application. A rating of at least X7R is required.
Table 3: Recommended Filter Output Components
Output Configuration
Speaker Impedance(Ω)
4
Single Ended (SE)
8
Bridge Tied Load (BTL)
8
PAM8124
Document number: DS36627 Rev. 1 - 2
Filter Inductor(µH)
22
33
22
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Filter Capacitor(nF)
680
220
680
October 2013
© Diodes Incorporated
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PAM8124
NEW PRODUCT
Application Information (cont.)
BTL Filter Configuration
SE Filter Configuration
Power and Heat Dissipation
Choose speakers that are able to stand large output power from the PAM8124. Otherwise, speaker may suffer damage.
Heat dissipation is very important when the device works in full power operation. Two factors affect the heat dissipation, the efficiency of the
device that determines the dissipation power, and the thermal resistance of the package that determines the heat dissipation capability.
Generally, class-D amplifiers are high efficiency and need no heat sink. Operating at higher powers a heat sink still may not be necessary if the
PCB is carefully designed to achieve good thermal dissipation.
How to Reduce EMI
Most applications require a ferrite bead filter for EMI elimination shown at Figure 1. The ferrite filter reduces EMI around 1MHz and higher. When
selecting a ferrite bead, choose one with high impedance at high frequencies, but low impedance at low frequencies.
Ferrite Bead
OUT+
200pF
Ferrite Bead
OUT-
200pF
Figure 1. Ferrite Bead Filter to Reduce EMI
Dual-Side PCB
To achieve good heat dissipation, the PCB's copper plate should be thicker than 35um and the copper plate on both sides of the PCB should be
utilized for heat sink. The thermal pad on the bottom of the device should be soldered to the plate of the PCB, and via holes, usually 9 to 16,
should be drilled in the PCB area under the device and deposited copper on the vias should be thick enough so that the heat can be dissipated to
the other side of the plate. There should be no insulation mask on the other side of the copper plate. It is better to drill more vias on the PCB
around the device if possible.
PAM8124
Document number: DS36627 Rev. 1 - 2
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PAM8124
Application Information (cont.)
MUTE Operation
NEW PRODUCT
The MUTE pin is an input for controlling the output state of the PAM8124. A logic high on this pin causes the outputs to run at a constant 50%
duty cycle. A logic low on this pin enables the outputs. This pin may be used as a quick disable or enable of the outputs.
Shutdown Operation
The PAM8124 employs a shutdown operation mode to reduce supply current to the absolute minimum level during periods of non-use to save
power. The SDN input terminal should be pulling high during normal operation when the amplifier is in use. Pulling SDN low causes the outputs to
mute and the amplifier to enter a low-current state. SDN should never be left unconnected to prevent the amplifier from unpredictable operation.
For the best power-off pop performance, the amplifier should be set in shutdown mode prior to removing the power supply voltage.
For the best start-up pop performance, the amplifier should be set in mute mode prior to restarting the amplifier.
Internal Bias Generator Capacitor Selection
The internal bias generator (VCM) provides the internal bias for the preamplifier stage. The external input capacitors and this internal reference
allow the inputs to be biased within the optimal common-mode range of the input preamplifiers.
The selection of the capacitor value on the VCM terminal is critical for achieving the best device performance. During startup or recovery from
shutdown state the VCM capacitor determines the rate at which the amplifier starts up. The startup time is not critical for the best de-pop
performance since any heard pop sound is the result of the class-D output switching-on other than that of the startup time. However, at least a
0.47µF capacitor is recommended for the VCM capacitor.
Another function of the VCM capacitor is to bypass high frequency noise on the internal bias generator.
Power Supply Decoupling, CS
The PAM8124 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic
distortion (THD) as low as possible. Power supply decoupling also prevents oscillations caused by long lead between the amplifier and the
speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply
leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor of
0.1µF is typically recommended, placed as close as possible to the device's PVCC lead. To filter lower-frequency noises a large aluminium
electrolytic capacitor of 470µF or greater is recommended, placed near the audio power amplifier. The 10µF capacitor also serves as a local
storage capacitor for supplying current during large signal transients on the amplifier outputs.
BSL and BSR Capacitors
The half H-bridge output stages use NMOS transistors therefore requiring bootstrap capacitors for the high side of each output to turn on correctly.
A ceramic capacitor 220nF or more rated for over 25V must be connected from each output to its corresponding bootstrap input. Specifically, one
220nF capacitor must be connected from LOUT to BSL and another 220nF capacitor from ROUT to BSR. It is recommended to use 1μF BST
capacitor to replace 220nF for lower than 100Hz applications.
VCLAMP Capacitors
To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, an internal regulator is used to clamp the
gate voltage. A 1µF capacitor must be connected from VCLAMP to ground and must be rated for at least 25V. The voltages at the VCLAMP
terminals vary with VCC and may not be used to power any other circuitry.
Using Low-ESR Capacitors
Low-ESR capacitors are recommended throughout this application section. A real (with respect to ideal) capacitor can be modeled simply as a
resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The
lower the equivalent value of this resistance the more the real capacitor behaves as an ideal capacitor.
Short-Circuit Protection
The PAM8124 has short circuit protection circuitry on the outputs to prevent damage to the device when output-to-output shorts (BTL mode),
output-to-GND shorts, or output-to-VCC shorts occur. Once a short-circuit is detected on the outputs, the output drive is immediately disabled.
This is not a latched fault. If the short was removed, the normal operation is restored.
PAM8124
Document number: DS36627 Rev. 1 - 2
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PAM8124
Application Information (cont.)
Thermal Protection
tolerance on this trip point from device to device. Once the die temperature exceeds the set thermal point, the device enters into the shutdown
state and the outputs are disabled. This is not a latched fault, the thermal fault is cleared once the temperature of the die is reduced by 60°C. The
device begins normal operation at this point without external system intervention.
Over Voltage Protection and Under Voltage Lock-out (OVP and UVLO)
An over voltage protection (OVP) circuit is integrated in PAM8124, when the supply voltage is over 28V the OVP is active and then the output
stage is disabled. The PAM8124 will auto recovery when the supply voltage is lower than the OVP threshold.
The PAM8124 incorporates circuitry designed to detect low supply voltage. When the supply voltage drops to 9V or below, the PAM8124 goes
into a state of shutdown. When the supply voltage is higher than UVLO threshold normal operation is resumed.
Typical Applications Circuits
C7
0.1uF
C10
10uF
C13
470uF
VCC
U1
1
2
SD
3
4
Mute
L_in
R_in
C1
1uF
C2
1uF
R1
5
R2
6
7
C4
1uF
8
9
10
C3
1uF
11
12
PVCCL
PGNDL
SDN
PGNDL
PVCCL
LOUT
MUTE
LIN
RIN
VCM
BSL
PAM8124
NEW PRODUCT
Thermal protection on the PAM8124 prevents damage to the device when the internal die temperature exceeds 160°C. There is a ±15 degree
AVCC
SE_BTL
GAIN0
AGND
GAIN1
AGND
BSR
PVCCR
ROUT
VCLAMP
PGNDR
PVCCR
PGNDR
24
C15
220nF
23
R3
4.7K
L1
22
L_out
C17
470uF
8ohm
33uH
21
C5
1uF
VCC
20
C8
0.1uF
19
18
G0
17
16
C11
10uF
G1
C6
1uF
15
14
13
L2
33uH
C16
220nF
R4
4.7K
C18
470uF
8ohm
R_out
VCC
C9
0.1uF
C12
10uF
C14
470uF
Schematic for Single-Ended (SE) Configuration (8Ω Speaker)
PAM8124
Document number: DS36627 Rev. 1 - 2
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October 2013
© Diodes Incorporated
A Product Line of
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PAM8124
Application Information (cont.)
NEW PRODUCT
Typical Applications Circuits (cont.)
C7
0.1uF
C10
10uF
C13
470uF
VCC
U1
2
3
4
Mute
IN+
IN-
C1
1uF
C2
1uF
R1
5
R2
6
7
C4
1uF
8
9
10
C3
1uF
11
12
PVCCL
PGNDL
SDN
PGNDL
PVCCL
LOUT
MUTE
LIN
RIN
VCM
BSL
AVCC
PAM8124
1
SD
SE_BTL
GAIN0
AGND
GAIN1
AGND
BSR
PVCCR
ROUT
VCLAMP
PGNDR
PVCCR
PGNDR
24
C15
680nF
23
R3
4.7K
L1
22
22uH
21
C5
1uF
VCC
20
C8
0.1uF
19
18
8ohm
G0
17
16
C11
10uF
G1
C6
1uF
15
L2
22uH
14
C16
680nF
13
R4
4.7K
VCC
C9
0.1uF
C12
10uF
C14
470uF
Schematic for Bridge-Tied-Load (BTL) Configuration with Differential Input (8Ω Speaker)
C7
0.1uF
C10
10uF
C13
470uF
VCC
U1
2
SD
3
4
Mute
IN
R1
C1
5
1uF
6
7
C4
1uF
8
9
C3
1uF
10
11
12
PVCCL
PGNDL
SDN
PGNDL
PVCCL
LOUT
MUTE
LIN
RIN
VCM
BSL
AVCC
PAM8124
1
SE_BTL
GAIN0
AGND
GAIN1
AGND
BSR
PVCCR
ROUT
VCLAMP
PGNDR
PVCCR
PGNDR
24
C15
680nF
23
L1
22
21
20
22uH
C5
1uF
VCC
C8
0.1uF
19
18
C11
10uF
8ohm
G0
17
16
R3
4.7K
G1
C6
15
14
13
1uF
L2
22uH
C16
680nF
R4
4.7K
VCC
C9
0.1uF
C12
10uF
C14
470uF
Schematic for Bridge-Tied-Load (BTL) Configuration with Single-Ended Input (8Ω Speaker)
PAM8124
Document number: DS36627 Rev. 1 - 2
12 of 15
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October 2013
© Diodes Incorporated
A Product Line of
Diodes Incorporated
PAM8124
Ordering Information
NEW PRODUCT
PAM8124 X X X
Package Type
Package Configuration
R: TSSOP
Part Number
PAM8124RHR
Shipping Package
H: 24 Pin
R: Tape & Real
Package
TSSOP-24-EP
Standard Package
3000 Units/Tape&Reel
Marking Information
PAM8124
Document number: DS36627 Rev. 1 - 2
PAM8124
X XX YWW LL
PVCCL 1
SDN 2
PVCCL 3
MUTE 4
LIN 5
RIN 6
VCM 7
AGND 8
AGND 9
PVCCR 10
VCLAMP 11
PVCCR 12
24
23
22
21
20
19
18
17
16
15
14
13
PGNDL
PGNDL
LOUT
BSL
AVCC
SE_BTL
GAIN0
GAIN1
BSR
ROUT
PGNDR
PGNDR
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PAM8124: Product Code
X: Internal Code
Y: Year
W: Week
LL: Internal Code
October 2013
© Diodes Incorporated
A Product Line of
Diodes Incorporated
PAM8124
Package Outline Dimensions (All dimensions in mm.)
NEW PRODUCT
Package: TSSOP-24-EP
PAM8124
Document number: DS36627 Rev. 1 - 2
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October 2013
© Diodes Incorporated
A Product Line of
Diodes Incorporated
PAM8124
NEW PRODUCT
IMPORTANT NOTICE
DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes
without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the
application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or
trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume
all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated
website, harmless against all damages.
Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.
Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and
hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or
indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.
Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings
noted herein may also be covered by one or more United States, international or foreign trademarks.
This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the
final and determinative format released by Diodes Incorporated.
LIFE SUPPORT
Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
A. Life support devices or systems are devices or systems which:
1. are intended to implant into the body, or
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the
labeling can be reasonably expected to result in significant injury to the user.
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or to affect its safety or effectiveness.
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any
use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related
information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.
Copyright © 2013, Diodes Incorporated
www.diodes.com
PAM8124
Document number: DS36627 Rev. 1 - 2
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October 2013
© Diodes Incorporated