MP110 900V Offline Switching Regulator DESCRIPTION FEATURES The MP110 is a flyback regulator with an integrated 900V MOSFET. Requiring a minimum number of external components, the MP110 provides excellent power regulation in AC-DC applications that require high reliability. These applications include smart meters, large appliances, industrial controls and products powered by unstable AC grids. • • The regulator uses peak current mode control to provide excellent transient response and easy loop compensation. When the output power falls below a given level, the regulator enters burst mode to lower the stand-by power consumption. • • • • • • • • • The MPS proprietary 900V monolithic process enables an over temperature protection (OTP) that is on the same silicon of the 900V power FET, offering the most precise thermal protection. It also offers a full suite of protection features such as VCC under-voltage lockout, over-load protection, over-voltage protection, and shortcircuit protection. The MP110 is designed to minimize electromagnetic interference for wireless communication in home and building automation applications. The operating frequency is externally programmed with a single resistor so that the power supply’s radiated energy can be designed to avoid the interference to wireless communication. • • • • Internal Integrated 900V MOSFET Programmable switching frequency up to 300kHz Frequency jittering Current-mode operation Internal high voltage current source Low standby power consumption via active burst mode Internal leading-edge blanking Built-in soft-start function Internal slope compensation Built-in PRO pin pull-up auto restart function Over-Temperature Protection (OTP) VCC under-voltage lockout with hysteresis Over-Voltage Protection on VCC Time-based overload protection Short-Circuit Protection (SCP) APPLICATIONS • • • • Smart Power Meters Large Appliances Industrial Controls All AC-DC supplies sold where power grid may be unstable All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. In addition to the programmable frequency, the MP110 employs a frequency jittering function that not only greatly reduces the noise level, but also reduces the cost of EMI filter. The MP110 is available in the PDIP8-7EP package. MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 1 MP110 – 900V OFFLINE SWITCHING REGULATOR TYPICAL APPLICATION T1 * Input 85~420 VAC VCC * Vcc FSET PRO FB MP110 Rev. 1.01 6/4/2014 VOUT 4 5 GND * Drain 3 VCC 2 7 1 8 MP110 Source GND www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 2 MP110 – 900V OFFLINE SWITCHING REGULATOR ORDERING INFORMATION Part Number* MP110GPR Package PDIP8-7EP Top Marking MP110 * For Tape & Reel, add suffix –Z (e.g. MP110GPR–Z); PACKAGE REFERENCE TOP VIEW FB 1 8 PRO 2 7 SOURCE FSET 3 VCC 4 5 DRAIN GND PDIP8-7EP ABSOLUTE MAXIMUM RATINGS (1) Drain ........................................... –0.3V to 900V Vcc .............................................. –0.3V to 30 V All Other Pins ................................. –0.3V to 7 V (2) Continuous Power Dissipation (TA=+25°C) PDIP8-7EP ..............................................1.47W Junction Temperature .............................. 150°C Lead Temperature ................................... 260°C Storage Temperature ............... -60°C to +150°C Thermal Shut Down ................................. 150°C Thermal Shut Down Hysteresis.................. 30°C ESD Capability Human Body Model ......... 2.0kV ESD Capability Machine Model ..................200V Operating Temperature............. –40°C to +85°C Recommended Operation Conditions Thermal Resistance (4) θJA θJC PDIP8-7EP............................. 68 ....... 7 .... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. (3) VCC to GND ........................................ 9V to 20V Operating Junction Temp (TJ) .. -40°C to +125°C MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 3 MP110 – 900V OFFLINE SWITCHING REGULATOR ELECTRICAL CHARACTERISTICS VCC =12V, TJ=-40°C~125°C, Min & Max are guaranteed by characterization, typical is tested under 25°C, unless otherwise noted Parameter Symbol Start-up Current Source (Pin Drain) Supply Current from Drain ICharge Leakage Current from Drain ILeak Break-Down Voltage V(BR)DSS On-State Resistance RDS(ON) Conditions VCC =6V; VDrain=400V VCC =13V; VDrain=400V Ileakage=100μA VCC =10V; IDrain=100mA; Min Typ Max Unit 1.5 2 2.9 mA 15 30 μA 900 V TJ=25℃ 13 17 Ω TJ=125℃ 22 26 Ω Supply Voltage Management (Pin VCC) VCC Upper Level at which the IC Switch On VCC Lower Level at which the IC Switch Off VCC Hysteresis VCC OVP Level VCC Re-Charge Level at which the Protection Occurs Quiescent Current at Protection Phase VCCH 10.6 11.7 13.2 V VCCL 7 8 9 V VCC_HYS 3 3.8 4.6 V VOVP 22.5 24 25.3 V VCCR 4.5 5.3 6 V 600 μA IPro VCC=6V; Vpro=4V Quiescent Current IQ VCC=13V 700 900 uA Operation Current ICC VCC=13V; fS=100kHz 1.7 2 mA Feedback Management (Pin FB) Internal Pull-Up Resistor RFB Internal Pull-Up Voltage VUP FB to Current-Set-Point Division Ratio Internal Soft-Start Time FB Decreasing Level at which the Regulator Enters Burst Mode FB Increasing Level at which the Regulator Leaves Burst Mode kΩ 10 3.8 4.1 4.4 Idiv 3.3 3.5 TSS 3 V ms VBURL 0.4 0.5 0.6 V VBURH 0.58 0.7 0.86 V Over-Load Set Point VOLP 3.6 3.8 4 V Over-Load Delay Time TDelay MP110 Rev. 1.01 6/4/2014 fS=100kHz 82 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. ms 4 MP110 – 900V OFFLINE SWITCHING REGULATOR ELECTRICAL CHARACTERISTICS VCC =12V, TJ=-40°C~125°C, Min & Max are guaranteed by characterization, typical is tested under 25°C, unless otherwise noted Parameter Timing Resistor(Pin FSET) FSET Reference Voltage Frequency Spectrum Jittering Range, in Percentage of Fs Typical Operating Frequency Symbol Conditions VFSET RJittering fS Min Typ Max Unit 1.16 1.23 1.29 V Example: fS=100kHz, then jittering is ±4kHz TJ=25 ℃;R=100kΩ FSET ±4 90 104 % 118 kHz Current Sampling Management (Pin Source) Leading-Edge Blanking for Current Sensor Leading-Edge Blanking for SCP TLEB1 650 ns TLEB2 600 ns Maximum Current Set Point VCS 0.90 0.96 1.02 V Short-Circuit Protection Set Point VSC 1.32 1.42 1.62 V Slope Compensation Ramp SRamp fS=100kHz 40 mV/μs Protection Management (Pin PRO) Protection Voltage VPRO Protection Hysteresis VHY 2.95 3.1 3.3 V 0.2 V 150 °C 30 °C Thermal Shutdown Thermal Shutdown Threshold Thermal Shutdown Recovery Hysteresis MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 5 MP110 – 900V OFFLINE SWITCHING REGULATOR PIN FUNCTIONS Pin # 1 2 3 4 5 7 8 Name Description Feedback. The output voltage from the external compensation circuit is fed into this pin. This pin and the current sense signal from Source determines the PWM duty cycle. A FB feedback voltage of VOLP triggers over-load protection, while VBURL triggers burst-mode operation. The regulator exits burst-mode operation and enters normal operation when the FB voltage reaches VBURH. PRO Protection. Pull-up PRO to shut down the IC with hysteresis. Switching converter frequency set. Connect a resistor to GND to set the switching FSET frequency up to 300kHz. Supply voltage. Connect a 22μF bulk capacitor and a 0.1uF ceramic capacitor for most VCC applications. When VCC rises to VCCH, the IC starts switching; when it falls below VCCL, the IC stops switching. Drain Drain of the internal MOSFET. Input for the start-up high voltage current source. Source Source of the internal MOSFET. Input of the primary current sense signal. GND The IC Ground. MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 6 MP110 – 900V OFFLINE SWITCHING REGULATOR TYPICAL CHARACTERISTICS MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 7 MP110 – 900V OFFLINE SWITCHING REGULATOR TYPICAL CHARACTERISTICS (continued) MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 8 MP110 – 900V OFFLINE SWITCHING REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board of the Design Example section. VIN = 230V, VOUT1 = 12.5V, VOUT2 = 5V, Primary Inductance=2.5mH, NP:NAUX:NS1:NS2 = 125:14:14:9, TA = 25°C, unless otherwise noted. MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 9 MP110 – 900V OFFLINE SWITCHING REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. VIN = 230V, VOUT1 = 12.5V, VOUT2 = 5V, Primary Inductance=2.5mH, NP:NAUX:NS1:NS2 = 125:14:14:9, TA = 25°C, unless otherwise noted. MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 10 MP110 – 900V OFFLINE SWITCHING REGULATOR FUNCTIONAL BLOCK DIAGRAM Vcc Power Management PRO OVP FSET Frequency Control Driving Signal Management OTP OLP FB Burst Mode Control Peak Current Conversion GND Drain Fault Signal Management SCP Current Sensor Comparator LEB1 SCP Comparator LEB2 Source Figure 1: Internal Function Block Diagram MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 11 MP110 – 900V OFFLINE SWITCHING REGULATOR OPERATION The MP110 incorporates all the necessary features required by a reliable switch mode power supply. The proprietary 900V monolithic integration enables a highly integrated power supply solution. It has burst mode operation to minimize the stand-by power consumption at light load. Protection features such as auto-recovery for over-load protection (OLP), short-circuit protection (SCP), over-voltage protection (OVP), and thermal shutdown for over-temperature protection (OTP) contribute to a safer converter design with minimal external components. . PWM Operation The MP110 employs peak current mode control. On the secondary side, the output voltage is divided down by a voltage divider network. This voltage is fed back to the primary side as voltage on the FB pin using an opto-coupler and a shunt regulator. The voltage at the FB pin is compared to the VSense voltage which measures MOSFET switching current. The integrated MOSFET turns on at the beginning of each clock cycle. The current in the transformer magnetizing inductance increases until it reaches the value set by the FB voltage, and then the integrated MOSFET turns off. The lower threshold of VCC UVLO decreases from 8V (VCCL, typical value) to 5.3V (VCCR, typical value) when fault conditions happen, such as SCP, OLP, OVP, and OTP. Soft-Start The MP110 implements an internal soft-start circuit in order to reduce stress on the primary side MOSFET, secondary diode and smoothly establish the output voltage during start-up. The internal soft-start circuit gradually increases the primary current sense threshold which determines the MOSFET peak current during start-up. The pulse width of the power switching device is progressively increased to establish correct operating conditions until the feedback control loop takes charge. Start-up and VCC UVLO Initially, the IC is driven by the internal current source which is drawn from the high-voltage Drain pin. The IC starts switching and the internal high-voltage current source turns off as soon as the voltage on pin VCC reaches 11.7V (VCCH, typical value). At this point, the supply of the IC is taken over by the auxiliary winding of the transformer. When VCC falls below 8V (VCCL, typical value), the regulator stops switching and the internal high-voltage current source turns on again. Figure 3: Soft Start Switching Frequency The switching frequency of MP110 can be set by FSET pin. The frequency can be set by a resistor between FSET pin and GND pin. The oscillator frequency can be attained below: 1 Hz fS = 200 × 10 −9 + 112.5 × 10 −12 × RFSET VFST VFST (1.23V) is the FSET pin reference voltage. Over Voltage Protection (OVP) Monitoring the VCC pin voltage via a 20us time constant filter allows the MP110 to enter OVP during an over-voltage condition, typically when VCC goes above 24V. The regulator will resume operation after the fault disappears. Figure 2: VCC UVLO MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 12 MP110 – 900V OFFLINE SWITCHING REGULATOR Over Load Protection (OLP) MP110 shuts when the power supply undergoes an overload. OLP is achieved by continuously monitoring the FB voltage. A fault signal is triggered when FB pulls up to 3.8V (VOLP, typical value) and after 82ms delay (8192 switching cycle, fS=100kHz), if the fault signal is still present, MP110 shuts down. When the fault disappears, the power supply resumes operation. The OLP delay time can be attained below. TDelay = VFB 0.7V 0.5V VDS 82ms × 100kHz fS Short Circuit Protection (SCP) By monitoring the CS Pin, MP110 shuts down when the voltage rises higher than 1.42V (VSC, typical value) to indicate a short circuit. The MP110 enters a safe low-power mode that prevents any thermal damage or stress damage. As soon as the fault disappears, the power supply resumes operation. Thermal shutdown (OTP) When the junction temperature of the IC exceeds 150℃, the over temperature protection is activated and stops output driver switching to prevent MP110 from any thermal damage. As soon as the junction temperature drops below 120℃, the regulator resumes operation. During the protection period, the regulator enters autorecovery mode. The VCC voltage is discharged to VCCR and is re-charged to VCCH by the internal high voltage current source. Burst Operation To minimize stand-by power consumption, the MP110 implement burst mode at no load and light load. As the load decreases, the FB voltage decreases. The IC stops switching when the FB voltage drops below 0.5V (VBRUL, typical value). As the load power increases, the output voltage drops at a rate dependent on the load. This causes the FB voltage to rise again due to the negative feedback control loop. Once the FB voltage exceeds 0.7V (VBRUH, typical value), the switching pulse resumes. The FB voltage then decreases and the whole process repeats. Burstmode operation alternately enables and disables the switching pulse of the MOSFET. Hence switching loss at no load and light load conditions MP110 Rev. 1.01 6/4/2014 is greatly reduced. Figure 4 shows the burst mode operation of MP110. Figure 4: Burst Mode Operation PRO Pin The PRO pin provides extra protection against abnormal conditions. Use the PRO pin for input OVP or other protections (input UVP, overtemperature protection for key component and so on). If the PRO pin voltage exceeds 3.1V (VPRO, typical value), the IC shuts down to enter autorecovery mode. As soon as the fault disappears, the power supply resumes operation. Peak Current Limit In normal operation, the primary peak current is sensed by a sensing resistor between the Source pin and Ground. The turn-off threshold of the MOSFET is set by FB voltage, VSense=VFB/Idiv. When the sensing resistor voltage reaches the VSense, the MOSFET turns off. The Idiv is the FB to current-set-point division ratio. During over-load condition, the primary peak current threshold is internally limited to the maximum value 0.96V (VCS, typical value) even if VFB voltage exceeds 3.2V to avoid excessive output power and lower the switch voltage rating. During start-up period, the primary peak current threshold internally increases to the maximum current set point VCS gradually. Leading Edge Blanking In order to avoid turning off the MOSFET from mis-trigger spikes shortly after the switch turns www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 13 MP110 – 900V OFFLINE SWITCHING REGULATOR on, the IC implements leading-edge blanking. During the blanking time, any trigger signal on source pin is blocked. An internal leading-edge blanking(LEB) unit containing two LEB times is employed between the Source pin and the current comparator input to avoid premature switching pulse termination due to the parasitic capacitances. During the blanking time, the current comparator is disabled and can not turn off the MOSFET. Current sensor leading edge blanking inhibits the current limitation comparator during 650ns (TLEB1, typical value) and SCP leading edge blanking inhibits the SCP current comparator during 600ns (TLEB2, typical value). Figure 5 shows the primary current sense waveform and the leading edge blanking. TLEB1=650ns TLEB2=600ns Figure 5: Leading Edge Blanking MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 14 MP110 – 900V OFFLINE SWITCHING REGULATOR DC voltage is higher than 70V, or the input capacitor value should be increased. APPLICATION INFORMATION Input Capacitor Choose The bulk capacitors after the rectifier bridge filter the rectified AC input which supply the DC input voltage for the converter. Figure 6 shows the typical DC bus voltage waveform of full bridge rectifier. Vin VDC(max) As a 900V offline regulator, MP110 is very suitable for very high voltage input application. But the general input capacitors with 400V voltage rating can not satisfy the safety requirement. Thus the stack capacitors could be used in very high input voltage application such as 420VAC input which refers to the Figure7. Bus voltage DC input voltage R1 VDC(min) VAC C1 R2 85~420VAC t D3 Figure 6: Input voltage waveform When the full-bridge rectifier is used, the input capacitor is usually set as 2μF/W for the universal input condition (85~265VAC). Halve the capacitor values for high voltage input (>185VAC) application. The input power Pin can be estimated as follow. Pin = VO × IO η Where VO is the output voltage, IO is the rated output current, η is the estimated efficiency. Generally, η is between 0.75 and 0.85 depending on the input range and output application. From the waveform above, the AC input voltage VAC and DC input voltage VDC can be got as follow. VDC (VAC ,t) = 2 × VAC 2 − 2 × Pin ×t Cin By setting VAC=VDC, t1 where DC bus voltage reaches to its minimum value can be calculated. So the minimum DC voltage is as follow. VDC(min) = VDC (VAC(min) ,t1) Very low DC input voltage could cause thermal problem in full load. It’s recommend the minimum MP110 Rev. 1.01 6/4/2014 D2 AC input voltage t1 0 D1 D4 R3 C2 R4 Figure 7: Input Stack Capacitor Circuit The C1 and C2 endure the half of input DC voltage rating respectively. The R1~R4 should be use the same value resistor to equalize the C1, C2 voltage stress. And the R1~R4 is recommended to use the 1206 package to satisfy safety requirement. Also, the R1~R4 value should be large enough for energy saving. For example, the total value of R1~R4 is 20MΩ which consumes about 18mW in 600VDC bus voltage. Primary-Side Inductor Design (Lm) Normally, the converter is designed to operate in CCM under low input voltage. CCM is needed to satisfy the output energy requirement in universal input condition. With built-in slope compensation function, MP110 can support CCM when duty cycle exceeds 50%. Set the ratio (KP) of the primary inductor ripple current amplitude vs. the peak current value to 0<KP≤1, where KP=1 for DCM. Figure 8 shows the relevant waveforms. A larger inductor leads to a smaller KP, which can www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 15 MP110 – 900V OFFLINE SWITCHING REGULATOR reduce RMS current but increase transformer size. For 5W application, an optimal KP value is usually between 0.8 and 1 for the universal input range and 1 for a 230VAC input range. Current-Sense Resistor VCS SRamp×TON KP=Iripple/Ipeak Ipeak×Rsense Ipeak Iripple Iav TON Ivalley Figure 8: Typical Primary-Current Waveform For CCM at minimum input, the converter duty cycle is: D= (VO + VF ) × N (VO + VF ) × N + VDC(min) Where: VF is the secondary diode’s forward voltage, N is the transformer turns ratio. The MOSFET turn-on time is D TON = fS Figure 9: Slope Compensation waveform Figure 9 shows the slope compensation waveform. When the sum of the sense resistor voltage and the slope compensation voltage reaches the peak current limit VCS, MP110 turns off the internal MOSFET. The maximum peak current limit is 0.96V (VCS, typical value) and the slope compensation slew rate is 40mV/us. Considering the margin, use 0.95×VCS as the peak current limit at full load. The voltage on sense resistor is given by the following equation: . Vsense = 0.95 × VCS − SRamp × TON So the value of the sense resistor is Rsense = fS is operating frequency. Vsense Ipeak The input average current, ripple current, peak Select the current sense resistor with appropriate current and valley current of the primary side are power rating based on the power loss: described as follows: Ipeak + Ivalley 2 1 2 Psense = + × Ipeak − Ivalley × D × Rsense Pin IAV = 2 12 VDC(min) ( Iripple = K P × Ipeak Ipeak IAV = K (1 − P ) × D 2 ) PRO pin Extra protection can be enable thru the MP110 PRO pin. A typical input over-voltage protection circuitry is shown in figure 10. Ivalley =(1 − K P ) × Ipeak The following equation estimates Lm as Lm = MP110 Rev. 1.01 6/4/2014 VDC(min) × TON Iripple www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 16 MP110 – 900V OFFLINE SWITCHING REGULATOR Bus Voltage 600V transformer, which bring about the IC very high junction temperature. R5 R6 R7 PRO R8 PCB Layout Guide CPro Figure 10: Input Over Voltage Protection Setup The input over voltage protection point can be calculated by the following function: VINOVP = VPRO × In order to deliver maximum power, a proper heatsink for MP110 should be designed for optimum thermal performance. In addition, it’s recommended to set the operating frequency less than 150kHz in order to achieve better thermal performance and better EMI in application. R5 + R6 + R7 + R8 R8 1206 packages should be used for resistors R5~R8 for safety consideration and the total value should be larger than 10MΩ for energy saving purpose. The switching voltage noise could be introduced by large R5~R8 value which disturbs the PRO pin protection action. One ceramic cap with around 1nF should be paralleled with PRO pin and GND pin. It should be located near the IC to decouple the switching voltage noise. Frequency Jittering MP110 provides the frequency jittering function which simplifies the input EMI filter design and also decreases the system cost. MP110 has the optimized frequency jittering with ±4% frequency deviation range and 256TS carrier cycle which can effectively improve EMI by spreading the energy dissipation over the frequency range. PCB layout is important to achieve reliable operation, good EMI performance, and good thermal performance. Follow these guidelines to optimize performance. 1) Minimize the power stage switching stage loop area. This includes the input loop (C2– C1-T1–U1–R12/R13–C2), the auxiliary winding loop (T1–D6–C6–T1), the output loop (T1–D8–C9–T1 and T1–D7–C7–T1) and the RCD loop (T1–D5–R16/R17/C3–T1) 2) The input loop GND and control circuit should be separate and only connect at C2. 3) Connecting the heatsink to the primary GND plane improves EMI and thermal dissipation. 4) Place the control circuit capacitors (such as those for FB, PRO and VCC pins) close to IC to decouple switching voltage noise. 5) Enlarge the GND pad near the IC for good thermal dissipation. 6) Keep the EMI filter far away from the switching point. 7) The two outputs clearance distance should satisfy the insulation requirement. Thermal MP110 is popular for high input voltage application with 900V integrated MOSFET. The thermal is the key factor to influence the output power especially the high input voltage and high operating frequency. The turn-on loss is dominant in high input voltage caused by the parasitic cap of secondary side diode and MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 17 MP110 – 900V OFFLINE SWITCHING REGULATOR Input Loop Output2 Loop Output1 Loop Auxiliary Winding Loop a) Top Design Example The following is a design example using the application guidelines for the given specifications: VIN 85 to 420VAC VOUT1 12.5V IOUT1 0.4A VOUT2 5V IOUT2 0.05A fS 100kHz The detailed application schematic is shown in Figure 12. The typical performance and circuit waveforms have been shown in the typical performance characteristics section. For more device applications, please refer to the related evaluation board datasheets. b) Bottom Figure 11: PCB Layout MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 18 MP110 – 900V OFFLINE SWITCHING REGULATOR TYPICAL APPLICATION CIRCUITS Primary inductance: 2.5mH N1:N2:N3:N4:N5=18:125:14:14:9 FR1 NC 10/1W D1 R1 2.2M/1206 CX1 1N4007 0.22uF/275V 1N4007 C1 22uF/400V LX1 R2 85Vac to 420Vac R8 5.1M /1206 D2 R16 R9 5.1M /1206 R17 499k/1206 499k/1206 C3 N5 1 N2 2.2nF/630V/1206 7448640416 /18mH CX2 C2 D3 2.2M/1206 1N4007 N N4 N3 D5 S1ML/1kV/1A VOUT2 L78L05 C7 22uF/50V B1100/100V/1A R18 C11 10/1206 1nF /250V/0805 D8 MBRS3200/200V/3A 6 4 C8 1uF /50V 5V/50mA GND VOUT1 C9 1000uF /25V C10 1uF /50V 12.5V/0.4A GND(L) CY1 D4 1N4007 5 3 R10 5.1M /1206 22uF/400V R3 9 2 2.2M/1206 0.22uF/275V 10 N1 U3 D7 L L T1 L R11 5.1M /1206 R19 1k 1nF R22 40.2k/1% D6 BAV21W/200V/0.2A U2 R4 10M/1206 5 R5 1M/1206 Drain VCC FSET 7 R6 1M/1206 Pro R7 51k/0805 R15 2.49/0805 U1 MP110 R12 5.1/1%/1206 R13 5.1/1% /1206 8 Source Pro GND FB 4 EL817B 3 2 R20 2k Pro 1 C6 22uF/50V C5 0.1uF R14 100k/1% R21 C12 20k 100nF U4 C4 1nF TL431K/2.5V R23 10k/1% C13 1nF Figure 12: Typical Application Schematic 3mm wall NC 3mm wall 3T N5 3T N4 1T N3 1T N2 1T N1 1T b) Winding Diagram a) Connection Diagram Figure 13: Transformer Structure MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 19 MP110 – 900V OFFLINE SWITCHING REGULATOR Table 2—Winding Order Tape (T) Winding Margin Wall PRI side Terminal Start—>End Margin Wall SEC side Wire Size (φ) Turns ( T ) N1 0mm 1—>NC 0mm 0.18mm*2 18 N2 0mm 2—>1 0mm 0.18mm*1 125 N3 0mm 4—>3 0mm 0.15mm*1 14 N4 0mm 5—>6 0mm 0.4mm*1 14 N5 3mm 10—>9 3mm 0.2mm*1 9 1 1 1 1 3 3 MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 20 MP110 – 900V OFFLINE SWITCHING REGULATOR FLOW CHART MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 21 MP110 – 900V OFFLINE SWITCHING REGULATOR EVOLUTION OF THE SIGNALS IN PRESENCE OF FAULTS Fault Condition MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 22 MP110 – 900V OFFLINE SWITCHING REGULATOR PACKAGE INFORMATION PDIP8-7EP PIN 1 ID MARKING TOP VIEW SIDE VIEW NOTE : 1) 2) 3) 4) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS . PACKAGE LENGTH AND WIDTH DO NOT INCLUDE MOLD FLASH , OR PROTRUSIONS. JEDEC REFERENCE IS MS-001, VARIATION BA . DRAWING IS NOT TO SCALE . NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP110 Rev. 1.01 6/4/2014 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 23